Datasheet IRF3808PBF Specification

PD - 94972A

IRF3808PbF

Typical Applications

l

Industrial Motor Drive

Benefits

l

Advanced Process Technology

l

Ultra Low On-Resistance

l

Dynamic dv/dt Rating

l

175°C Operating Temperature

l

Fast Switching

l

Repetitive Avalanche Allowed up to Tjmax

l

Lead-Free

G

HEXFET® Power MOSFET

D

V

= 75V

DSS

R

S

= 0.007Ω

DS(on)

= 140A

I

D

Description

This Advanced Planar Stripe HEXFET ® Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this HEXFET power MOSFET are a 175°C junction operating temperature, low RθJC, fast switching speed and improved repetitive avalanche rating. This combination makes the design an extremely efficient and reliable choice for use in a wide variety of applications.

TO-220AB

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 140 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 97 A I

DM

PD @TC = 25°C Power Dissipation 330 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt  5.5 V/ns T

J

T

STG

Pulsed Drain Current  550

Linear Derating Factor 2.2 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 430 mJ Avalanche Current 82 A Repetitive Avalanche Energy See Fig.12a, 12b, 15, 16 mJ

Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

°C

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θCS

R

θJA

Junction-to-Case ––– 0.45 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62

HEXFET(R) is a registered trademark of International Rectifier.

www.irf.com 1

07/23/10

IRF3808PbF

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff. Effective Output Capacitance  ––– 1140 ––– VGS = 0V, VDS = 0V to 60V

oss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Notes:

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

 Starting T

RG = 25Ω, I

 I

SD

TJ ≤ 175°C

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

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Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.086 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– 5.9 7.0 mΩ VGS = 10V, ID = 82A  Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA Forward Transconductance 100 ––– ––– S VDS = 25V, ID = 82A

Drain-to-Source Leakage Current

––– ––– 20

––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V Gate-to-Source Reverse Leakage ––– ––– -200

VDS = 75V, VGS = 0V

µA

nA

VGS = -20V Total Gate Charge ––– 150 220 ID = 82A Gate-to-Source Charge ––– 31 47 nC VDS = 60V Gate-to-Drain ("Miller") Charge ––– 50 76 VGS = 10V Turn-On Delay Time ––– 16 ––– VDD = 38V Rise Time ––– 140 ––– ID = 82A Turn-Off Delay Time ––– 68 ––– RG = 2.5Ω

ns

Fall Time ––– 120 ––– VGS = 10V 

4.5

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact Input Capacitance ––– 5310 ––– VGS = 0V Output Capacitance ––– 890 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 130 ––– ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 6010 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 570 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz

Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode) 

––– –––

140

550

showing the

A

p-n junction diode. Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 82A, VGS = 0V  Reverse Recovery Time ––– 93 140 ns TJ = 25°C, IF = 82A Reverse RecoveryCharge ––– 340 510 nC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

 C

eff. is a fixed capacitance that gives the same charging time

oss

= 25°C, L = 0.130mH

J

= 82A. (See Figure 12).

AS

≤ 82A, di/dt ≤ 310A/µs, V

DD

≤ V

(BR)DSS

as C  Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A.

,

 Limited by T

oss

while V

is rising from 0 to 80% V

DS

, see Fig.12a, 12b, 15, 16 for typical repetitive

Jmax

DSS

avalanche performance.

G

.

D

S

D

S

IRF3808PbF

1000

I , Drain-to-Source Current (A)

100

10

D

1

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

20µs PULSE W IDTH

°

T = 2 5 C

J

0.1 1 10 100

V , Drai n-to- Source Vol tage ( V)

DS

1000.00

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

VGS

TOP

15V 10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM

4.5V

V , Drai n-to-Source Voltage (V)

DS

4.5V

20µs PULSE WIDTH

°

T = 175 C

J

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.0

137A

I =

D

)

Α (

t n e

r r

u C e

c r

100.00

u o S

o

t

n

i a

r D

,

D

I

10.00

TJ = 25°C

TJ = 175°C

V

= 15V

DS

20µs PULSE WIDTH

1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0

2.5

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

V =

GS

°

10V

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs. Temperature

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IRF3808PbF

100000

) F

10000

p

( e c n a

t

i c a p a

C ,

1000

C

V

= 0V, f = 1 MHZ

GS

C

= C

iss

rss

oss

= C

gs

gd

ds

C

+ Cgd, C

+ C

gd

Ciss

Coss

Crss

100

1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000.00

SHORTED

ds

12

D

I =

82A

10

8

6

4

GS

2

V , Gate-to-Source Voltage (V)

0

0 40 80 120 160

Q , Total Gate Charge (nC)

G

V = 60V

DS

V = 37V

DS

V = 15V

DS

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

10000

) A

( t

100.00

n e

r

r u

C n

i a

r

10.00

D e

s

r e v e

R ,

1.00

D S

I

TJ = 175°C

TJ = 25°C

0.10

0.0 0.5 1.0 1.5 2.0

VSD, Source-toDrain Voltage (V)

Fig 7. Typical Source-Drain Diode

V

GS

= 0V

) A

( t

1000

n e

r

r u

C e

c

r u

100

o S

o

t

n

i a

r

10

D ,

Tc = 25°C

D

I

Tj = 175°C Single Pulse

1

1 10 100 1000

Fig 8. Maximum Safe Operating Area

OPERATION IN THIS AREA LIMITED BY RDS(on)

V

, Drain-toSource Voltage (V)

DS

100µsec

1msec

10msec

Forward Voltage

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IRF3808PbF

140

LIMITED BY PACKAGE

120

100

80

60

D

I , Drain Current (A)

40

20

0

25 50 75 100 125 150 175

T , Case Temperature ( C)

C

°

Fig 9. Maximum Drain Current Vs.

Case Temperature

1

R

V

DS

V

GS

R

G

D

D.U.T.

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

+

V

DD

-

D = 0.50

thJC

0.20

0.1

0.10

0.05

0.02

0.01

Thermal Response (Z )

0.001

0.00001 0.0001 0.001 0.01 0.1 1

SINGLE PULSE

(THERMAL RESPONSE)

t , Rectangular Pulse Duration (sec)

1

P

DM

Not es:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

J DM thJC C

t

1

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF3808PbF

A

15V

DRIVER

+

-

V

R

G

20V

V

DS

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

V

G

Q

GD

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

V

GS

3mA

.3µF

D.U.T.

+

V

DS

-

DD

800

TOP

640

480

320

160

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150

Starting Tj, Junction Temperature ( C)

BOTTO M

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

3.5

) V

( e

3.0

g a

t

l o V

d

l

2.5

o h s e

r h

t

2.0

e

t a

G

) h

t

(

1.5

S G

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175 200

TJ , Temperature ( °C )

ID = 250µA

I

D 34A

58A

82A

°

I

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

I

D

G

Fig 14. Threshold Voltage Vs. Temperature

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1000

IRF3808PbF

Duty Cycle = Single Pulse

) A

(

100

t n e

r

r u

C e

h c n a

l

10

a v

A

1

1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

0.01

0.05

0.10

Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

500

TOP Single Pulse

) J

400

m

( y

g

r e n

300

E e

h c n a

l

200

a v

A ,

R A

100

E

0

25 50 75 100 125 150 175

BOTTOM 10% Duty Cycle ID = 140A

Starting TJ , Junction Temperature (°C)

Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T

. This is validated for

jmax

every part type.

2. Safe operation in Avalanche is allowed as long asT not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. P

= Average power dissipation per single

D (ave)

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

av

·f

jmax

is

P

= 1/2 ( 1.3·BV·Iav) = DT/ Z

Fig 16. Maximum Avalanche Energy

Vs. Temperature

D (ave)

I

2DT/ [1.3·BV·Zth]

av =

E

= P

AS (AR)

D (ave)·tav

thJC

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IRF3808PbF

Peak Diode Recovery dv/dt Test Circuit

D.U.T*

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance Current Transformer

-

+



-



-

+



R

G

V

GS

• dv/dt controlled by R

• ISD controlled by Duty Factor "D"

G

• D.U.T. - Device Under Test

+

V

DD

-

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.

Period

D =

P. W .

Period

VGS=10V

[ ] ***

D.U.T. ISDWaveform

Reverse Recovery Current

Re-Applied Voltage

D.U.T. VDSWaveform

Inductor Curent

*** V

= 5.0V for Logic Level and 3V Drive Devices

GS

Fig 17. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

®

power MOSFETs

V

DD

[ ]

I

[ ]

SD

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TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

TO-220AB Part Marking Information

IRF3808PbF

EXAMPLE : T HIS IS AN IRF 1010

Note: "P" in assembly line position

LOT CODE 1789 ASS EMBLE D ON WW 19, 2000 IN THE AS SEMBLY LINE "C"

i ndi cates "L ead - F ree"

INTERNATIONAL

RE CTIF IER

LOGO

AS S E MB L Y LOT CODE

PART NUMBER

DATE CODE YEAR 0 = 2000 WEEK 19 LINE C

TO-220AB package is not recommended for Surface Mount Application

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.07/2010

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