Datasheet IRF3808S, IRF3808L Datasheet (International Rectifier)

AUTOMOTIVE MOSFET

Typical Applications

● Integrated Starter Alternator

● 42 Volts Automotive Electrical Systems

Benefits

● Advanced Process Technology

● Ultra Low On-Resistance

● Dynamic dv/dt Rating

● 175°C Operating Temperature

● Fast Switching

● Repetitive Avalanche Allowed up to Tjmax

Description

Designed specifically for Automotive applications, this Advanced
Planar Stripe HEXFET ® Power MOSFET utilizes the latest pro­cessing techniques to achieve extremely low on-resistance per
silicon area. Additional features of this HEXFET power MOSFET
are a 175°C junction operating temperature, low RθJC, fast switch­ing speed and improved repetitive avalanche rating. This combina­tion makes the design an extremely efficient and reliable choice for
use in higher power Automotive electronic systems and a wide
variety of other applications.

G

PD - 94338A

IRF3808S

IRF3808L

HEXFET® Power MOSFET

D

V

= 75V

DSS

R

S

D2Pak

IRF3808S

= 0.007Ω

DS(on)

I

= 106AV

D

TO-262

IRF3808L

Absolute Maximum Ratings

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 106V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 75V A
I

DM

PD @TC = 25°C Power Dissipation 200 W

V

GS

E

AS

I

AR

E

AR

dv/dt Peak Diode Recovery dv/dt S 5.5 V/ns
T

J

T

STG

Pulsed Drain Current Q 550

Linear Derating Factor 1.3 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche EnergyR 430 mJ
Avalanche CurrentQ 82 A
Repetitive Avalanche EnergyW See Fig.12a, 12b, 15, 16 mJ

Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Thermal Resistance

Parameter Typ. Max. Units

R

θJC

R

θJA

Junction-to-Case ––– 0.75 °C/W
Junction-to-Ambient (PCB Mounted, Steady State)** ––– 40

HEXFET(R) is a registered trademark of International Rectifier.

www.irf.com 1

03/08/02

IRF3808S/IRF3808L

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

g

fs

I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

C

eff. Effective Output Capacitance U ––– 1140 ––– VGS = 0V, VDS = 0V to 60V

oss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Notes:

Q Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

R Starting T

RG = 25Ω, I

S I

SD

TJ ≤ 175°C

T Pulse width ≤ 400µs; duty cycle ≤ 2%.

2 www.irf.com

Drain-to-Source Breakdown Voltage 75 ––– ––– VVGS = 0V, ID = 250µA

/∆T

Breakdown Voltage Temp. Coefficient ––– 0.086 ––– V/°C Reference to 25°C, ID = 1mA

J

Static Drain-to-Source On-Resistance ––– 5.9 7.0 mΩ VGS = 10V, ID = 82A T
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
Forward Transconductance 100 ––– ––– SVDS = 25V, ID = 82A

Drain-to-Source Leakage Current

––– ––– 20
––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C

Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200

VDS = 75V, VGS = 0V

µA

nA

VGS = -20V
Total Gate Charge ––– 150 220 ID = 82A
Gate-to-Source Charge ––– 31 47 nC VDS = 60V
Gate-to-Drain ("Miller") Charge ––– 50 76 VGS = 10VT
Turn-On Delay Time ––– 16 ––– VDD = 38V
Rise Time ––– 140 ––– ID = 82A
Turn-Off Delay Time ––– 68 ––– RG = 2.5Ω

ns

Fall Time ––– 120 ––– VGS = 10V T

4.5

Internal Drain Inductance

Internal Source Inductance ––– –––

––– –––

7.5

Between lead,

6mm (0.25in.)

nH

from package

and center of die contact
Input Capacitance ––– 5310 ––– VGS = 0V
Output Capacitance ––– 890 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 130 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 6010 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 570 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz

Parameter Min. Typ. Max. Units Conditions
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode) Q

––– –––

––– –––

106V

550

showing the

A

p-n junction diode.
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 82A, VGS = 0VT
Reverse Recovery Time ––– 93 140 ns TJ = 25°C, IF = 82A
Reverse RecoveryCharge ––– 34 0 510 nC di/dt = 100A/µs

T



Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

U C

eff. is a fixed capacitance that gives the same charging time

oss

as C

oss

while V

is rising from 0 to 80% V

DS

DSS

V Calculated continuous current based on maximum allowable

= 25°C, L = 0.130mH

J

= 82A. (See Figure 12).

AS

≤ 82A, di/dt ≤ 310A/µs, V

DD

≤ V

(BR)DSS

junction temperature. Package limitation current is 75A.

W Limited by T

,

avalanche performance.

, see Fig.12a, 12b, 15, 16 for typical repetitive

Jmax

** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to

application note #AN-994.

G

G

.

D

S

D

S

IRF3808S/IRF3808L

)

1000

100

10

D

I , Drain-to-Source Current (A)

1

1000.00

VGS

TOP

15V
10V

8.0V

7.0V

6.0V

5.5V



5.0V

BOTTOM

4.5V

4.5V

20µs PULSE WIDTH



0.1 1 10 100

V , Drain-to-Source Voltage (V)

DS

T = 25 C

J

°

1000

100

10

D

I , Drain-to-Source Current (A)

1

0.1 1 10 100

VGS

TOP

15V
10V

8.0V

7.0V

6.0V

5.5V



5.0V

BOTTOM

4.5V

V , Drain-to-Source Voltage (V

DS

4.5V

20µs PULSE WIDTH



T = 175 C

J

°

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

3.0

137A

I =



D

)

(Α

100.00

TJ = 175°C

TJ = 25°C

, Drain-to-Source Current

D

I

10.00

1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0

V

= 15V

DS

20µs PULSE WIDTH

2.5

2.0

1.5

(Normalized)

1.0

0.5

DS(on)

R , Drain-to-Source On Resistance

0.0

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

T , Junction Temperature ( C)

J

V =

10V



GS

°

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs. Temperature

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IRF3808S/IRF3808L

100000

10000

V

= 0V, f = 1 MHZ

GS

C

= C

iss
rss
oss

= C

= C

gs
gd
ds

C
C

+ Cgd, C

+ C

gd

Ciss

1000

C, Capacitance(pF)

Coss

Crss

100

1 10 100

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000.00

SHORTED

ds

12

D

I =

82A



10

8

6

4

GS

2

V , Gate-to-Source Voltage (V)

0

0 40 80 120 160

Q , Total Gate Charge (nC)

G

V = 60V

DS

V = 37V

DS



V = 15V

DS

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

10000

OPERATION IN THIS AREA

100.00

10.00

TJ = 175°C

1000

100

LIMITED BY RDS(on)

100µsec

TJ = 25°C

, Reverse Drain Current (A)

1.00

SD

I

0.10

0.0 0.5 1.0 1.5 2.0
VSD, Source-toDrain Voltage (V)

Fig 7. Typical Source-Drain Diode

V

GS

= 0V

10

, Drain-to-Source Current (A)

Tc = 25°C

D

I

Tj = 175°C
Single Pulse

1

1 10 100 1000

V

, Drain-toSource Voltage (V)

DS

Fig 8. Maximum Safe Operating Area

1msec

10msec

Forward Voltage

4 www.irf.com

IRF3808S/IRF3808L

(

)

120



LIMITED BY PACKAGE

100

80

60

40

D

I , Drain Current (A)

20

0

25 50 75 100 125 150 175

T , Case Temperature

C

°

C

Fig 9. Maximum Drain Current Vs.

Case Temperature

1

R

V

DS

V

GS

R

G

D

D.U.T.

10V

Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

V

DS

90%

10%
V

GS

t

d(on)tr

t

d(off)tf

Fig 10b. Switching Time Waveforms

+

V

DD

-

D = 0.50

thJC

0.20

0.1

0.10

P

0.05

Thermal Response (Z )

0.02

0.01

0.01

0.00001 0.0001 0.001 0.01 0.1 1 10

SINGLE PULSE

(THERMAL RESPONSE)



t , Rectangular Pulse Duration (sec)

1

Notes:

1. Duty factor D = t / t



2. Peak T = P x Z + T

J DM thJC C

DM

t



1 2

1

t

2

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRF3808S/IRF3808L

A

)

15V

DRIVER

+

-

V

R

20V

V

DS

G

t

L

D.U.T

I

AS

0.01

p

Ω

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

Q

GD

DD

800

TOP

640

480

320

160

AS

E , Single Pulse Avalanche Energy (mJ)

0

25 50 75 100 125 150

Starting Tj, Junction Temperature( C



BOTTOM

°

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

3.5

I

D
34A
58A
82A

V

G

Charge

3.0

2.5

ID = 250µA

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

V

GS

.3µF

D.U.T.

3mA

I

G

Current Sampling Resistors

+

V

-

I

D

Fig 13b. Gate Charge Test Circuit

DS

2.0

Gate threshold Voltage (V)

1.5

GS(th)

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175 200

TJ , Temperature ( °C )

Fig 14. Threshold Voltage Vs. Temperature

6 www.irf.com

IRF3808S/IRF3808L

10000

1000

Duty Cycle = Single Pulse

100

10

0.01

0.05

0.10

Avalanche Current (A)

1

0.1

1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax

500

400

TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 140A

Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T

. This is validated for

jmax

every part type.

300

2. Safe operation in Avalanche is allowed as long asT
not exceeded.

jmax

3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.

200

, Avalanche Energy (mJ)

AR

100

E

4. P

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Average power dissipation per single

D (ave)

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Fig 16. Maximum Avalanche Energy

Vs. Temperature

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t
Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

P

= 1/2 ( 1.3·BV·Iav) =

D (ave)

I

av =

E

AS (AR)

2

∆∆

∆T/ [1.3·BV·Zth]

∆∆

= P

·f

av

D (ave)·tav

∆∆

∆T/ Z

∆∆

thJC

www.irf.com 7

is

IRF3808S/IRF3808L

Peak Diode Recovery dv/dt Test Circuit

D.U.T*

+

S

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance
Current Transformer

-

+

R

-

T

-

+

Q

R

G

V

GS

• dv/dt controlled by R

• ISD controlled by Duty Factor "D"

G

• D.U.T. - Device Under Test

+

V

DD

-

* Reverse Polarity of D.U.T for P-Channel

Driver Gate Drive

P.W.

Period

D =

P.W.

Period

VGS=10V

[ ] ***

D.U.T. ISDWaveform

Reverse
Recovery
Current

Re-Applied
Voltage

D.U.T. VDSWaveform

Inductor Curent

*** V

= 5.0V for Logic Level and 3V Drive Devices

GS

Fig 17. For N-channel HEXFET

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

®

power MOSFETs

V

DD

[ ]

I

[ ]

SD

8 www.irf.com

D2Pak Package Outline

IRF3808S/IRF3808L

10.54 (.415)

1.40 (.055)
MA X.

1.78 (.070)

1.27 (.050)

1.40 (.055)

3X

1.14 (.045)

5.08 (.200)

NOTE S:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIMENSION : INCH.
4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS.

2

Pak Part Marking Information

D

10.29 (.405)

- A ­2

1 3

15.49 (.610)

14.73 (.580)

0.93 (.037)

3X

0.69 (.027)

0.2 5 ( .0 10 ) M B A M

4.69 (.185)

4.20 (.165)

5.28 (.208)

4.78 (.188)

0.55 (.022)

0.46 (.018)

- B -

1.32 (.052)

1.22 (.048)

2.79 (.110)

2.29 (.090)

1.39 (.055)

1.14 (.045)

LEAD ASSIGNMENTS
1 - G ATE
2 - D RA IN
3 - S OURCE

10.16 (.400)
REF.

6.47 (.255)

6.18 (.243)

2.61 (.103)

2.32 (.091)

8.89 (.350)
REF.

MINIMUM RECOMMENDED FOOTPRINT

11.43 (.450)

8.89 (.350)

17.78 (.700)

3.81 (.150)

2.08 (.082)
2X

2.54 (.100)
2X

THIS IS AN IRF530S WITH

LO T CO DE 8024
A SSEMBLED O N WW 02, 2000
IN THE ASSEMBLY LINE "L"

INTERNATIONAL

REC TIFIER

LOGO

F530S

PART NUMBER

DA TE CODE

ASSEMBLY
LOT C ODE

YEA R 0 = 20 00
WEE K 02
LINE L

www.irf.com 9

IRF3808S/IRF3808L

EXAMPL E: T HIS I S AN IRL3103L

LO T CO DE 1789

ASSEMBLY

PART NUMBER

DA TE CODE

WEE K 19
LINE C

LOT C ODE

YEAR 7 = 1997

A SSEM BLED O N WW 19, 1997
IN THE ASSEMBLY LINE "C"

LOGO

REC TIFIER

INTERNATIO NA L

TO-262 Package Outline

TO-262 Par t Mar king Information

10 www.irf.com

D2Pak Tape & Reel Information

)

)

)

)

)

)

)

)

(

)

)

)

)

(

)

)

)

TRR

1.60 (.063

1.50 (.059

4.10 (.161

3.90 (.153

IRF3808S/IRF3808L

1.60 (.063)

1.50 (.059)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

1.85 (.073

1.65 (.065

TRL

10.90 (.429)

10.70 (.421)

FEED DIRECTION

13.50 (.532

12.80 (.504

330.00

14.173

MAX.

NOTES :

1. COMFO R MS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

11.60 (.457)

11.40 (.449)

1.75 (.069)

1.25 (.049)

16.10 (.634)

15.90 (.626)

15.42 (.609)

15.22 (.601)

27.40 (1.079

23.90 (.941
4

26.40 (1.039

24.40 (.961

3

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

60.00 (2.362
M IN .

30.40

1.197

M A X.

4

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: [phone]

TAC Fax: [phone]

Visit us at www.irf.com for sales contact information.03/02

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