Datasheet irf3710z Datasheet

Page 1
PD - 94632
AUTOMOTIVE MOSFET
IRF3710Z
HEXFET® Power MOSFET
Features
O Advanced Process Technology O Ultra Low On-Resistance O Dynamic dv/dt Rating O 175°C Operating Temperature O Fast Switching O Repetitive Avalanche Allowed up to Tjmax
G
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automo­tive applications and a wide variety of other applications.
Absolute Maximum Ratings
Parameter Units
ID @ TC = 25°C I
@ TC = 100°C
D
I
DM
PD @TC = 25°C Maximum Power Dissipation W
V
GS
E
AS
(tested)
E
AS
I
AR
E
AR
T
J
T
STG
Conti n uous Drai n Cur r e nt, V Conti n uous Drai n Cur r e nt, V Pulsed Drain Current
Linear D er ating Factor W/°C Gate-to-Source Volt age V
Single Puls e Avalanche En er gy (Therm ally Limited ) Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive A v alanch e Energy
Operating Junction and °C Stor ag e Temperat ur e Ra ng e
Soldering Temperature, for 10 seconds Mount ing torque, 6-32 or M 3 s crew
c
c
@ 10V (Si licon Limited)
GS
@ 10V (See Fi g. 9)
GS
i
h
d
Thermal Resistance
Parameter Typ. Max. Units
R
JC
θ
R
CS
θ
R
JA
θ
Junction-to-Case ––– 0.92 °C/W Case-to-Sin k , Fl at, Greased Surf ac e
Junction-to-Ambient ––– 62
HEXFET(R) is a registered trademark of International Rectifier.
www.irf.com 1
V
DSS
R
DS(on)
ID = 59A
S
TO-220AB
Max.
59
42 240 160
1.1
± 20
170 200
See Fig.12a,12b,15,16
-55 to + 175
300 (1. 6m m fr o m case )
10 lbf•in (1.1N•m)
0.50 –––
= 100V
= 18mΩ
A
mJ
A
mJ
03/11/03
Page 2
IRF3710Z
/
g
g
Static @ TJ = 25°C (unless otherwise specified)
V
(BR)DSS
∆ΒV R
DS(on)
V
GS(th)
DSS
Drain-to-Sou r c e Br e akdown Voltage 100 ––– ––– V
∆T
Breakdown Voltage Temp. Coefficient ––– 0.10 ––– V/°C
J
Stat ic D r ai n- to-Sou rce On-Res i s tance ––– 14 18 Gate Thr es h old Voltage 2.0 ––– 4.0 V
fs For ward Tra nsconductan c e 35 ––– ––– S
I
I
DSS
GSS
Drain-to-Sou r c e Le akage Current ––– ––– 20 µ A
Gate-to-Source Forward Leakage ––– ––– 200 nA
Gate-to-Sou rce Reverse Leaka Q Q Q t t t t L
L
C C C C C C
g gs
gd d(on) r d(off) f
D
S
iss oss rss oss oss oss
eff.
Total Gate Charge ––– 82 120 nC Gate-to-Source Charge ––– 19 28 Gate-to-Drai n ( " M iller") Ch arge ––– 27 40 Turn-On Delay Time ––– 17 ––– ns Rise Time ––– 77 ––– Turn-Off Delay Time ––– 41 ––– Fall Time ––– 56 ––– Internal Drain Inductance ––– 4.5 ––– nH Between lead,
Internal Source Indu ctance ––– 7.5 ––– from package
Input Capacitance ––– 2900 ––– pF Output Capacitance ––– 290 ––– Reverse Transfer Capacitance ––– 150 ––– Output Capacitance ––– 1130 ––– Output Capacitance ––– 170 ––– Effe c tive Out pu t C ap ac itance – –– 280 –––
Parameter Min. Typ. Max. Units
––– ––– 250
e ––– ––– -200
Conditions
VGS = 0V, ID = 250µA Referen ce to 25°C, I V
= 10V, ID = 35A
Ω
m
GS
VDS = VGS, ID = 250µA V
= 50V, ID = 35A
DS
V
= 100V, VGS = 0V
DS
V
= 100V, VGS = 0V, TJ = 125°C
DS
V
= 20V
GS
V
= -20V
GS
I
= 35A
D
= 80V
V
DS
V
GS
V
DD
I
= 35A
D
R
G
V
GS
6mm (0.25in.)
and center of die contact V
GS
V
DS
ƒ = 1.0MHz , See Fig . 5 V
GS
V
GS
VGS = 0V, VDS = 0V to 80V
f
= 10V = 50V
= 6.8Ω
f
= 10V
= 0V = 25V
= 0V, VDS = 1.0V, ƒ = 1.0MHz = 0V, VDS = 80V, ƒ = 1. 0M Hz
= 1mA
D
f
D
G
S
Diode Characterist ics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Contin uous Source Current ––– ––– 59 (Body Diode) A
Pulsed Source Current ––– ––– 240 (Body Diode)
c
Diode Forward Vol tage Reverse Recovery Time
Reverse Recovery Charge ––– 100 160 nC Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Paramete r Min. Typ. Max. Units
 Limited by T
RG = 25Ω, I recommended for use above this value.
I
≤ 35A, di/dt ≤ 380A/µs, V
SD
TJ ≤ 175°C.
, starting TJ = 25°C, L = 0.27mH,
Jmax
= 35A, VGS =10V. Part not
AS
≤ V
DD
(BR)DSS
MOSFET symbol showing the
integral reverse
p-n junct ion diode. ––– ––– 1.3 V –––5075ns
TJ = 25°C, IS = 35A, VGS = 0V
T
= 25°C, IF = 35A, VDD = 25V
J
di/dt = 100A/µs
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.C
eff. is a fixed capacitance that gives the same charging time
oss
as C
while V
oss
Limited by T
avalanche performance.
,
This value determined from sample failure population. 100%
tested to this value in production.
is rising from 0 to 80% V
DS
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
Conditions
f
.
DSS
G
2 www.irf.com
D
S
f
Page 3
IRF3710Z
1000
TOP 15V
)
100
A
(
t
n
e
r
r
u
10
C e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
D
I
BOTTOM 4.5V
1
0.1
VGS
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
20µs PULSE WIDTH Tj = 25°C
0.01
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
1000
) A
(
t
n
e
r
r
u C e
c
r
u
o S
-
o
t
-
n
i
a
r D
, I
1000
TOP 15V
100
BOTTOM 4.5V
10
D
VGS
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
20µs PULSE WIDTH Tj = 175°C
1
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
120
)
)
Α
(
t
100
n
e
r
r
u C e
c
r
10
u
o S
-
o
t
-
n
i
a
r
1
D
,
D
I
TJ = 25°C
V
0
2 4 6 8 10
20µs PULSE WIDTH
DS
TJ = 175°C
= 25V
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
S
(
100
e
c
n
a
t
c
80
u
d
n
o
c
s
n
60
a
r T
d
r
a
40
w
r
o F
,
S
20
F
G
0
0 10 20 30 40 50 60 70
VDS = 15V 20µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
www.irf.com 3
Page 4
IRF3710Z
100000
10000
) F
p
(
e
c
n
a
t
i
1000
c
a
p
a C
, C
100
10
1 10 100
= 0V, f = 1 MHZ
V
GS
C
= C
iss
C
= C
rss
gd
C
= C
oss
ds
+ Cgd, C
gs
+ C
Ciss
Coss
gd
Crss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000.00
) A
(
100.00
t
n
e
r
r
u C n
i
a
r D e
s
r
e
v
e R
,
D S
I
10.00
1.00
0.10
TJ = 175°C
TJ = 25°C
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD, Source-to-Drain Voltage (V)
SHORTED
ds
V
GS
= 0V
12.0 ID= 35A
)
10.0
V
( e
g
a
t
l
8.0
o V
e
c
r
u
6.0
o S
-
o
t
-
e
t
4.0
a G
,
S G
2.0
V
VDS= 80V VDS= 50V VDS= 20V
0.0 0 20406080100
Q
Total G ate Charge (nC)
G
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000
) A
(
t
100
n
e
r
r
u C e
c
r
10
u
o S
-
o
t
-
n
i
a
r
1
D ,
Tc = 25°C
D
I
Tj = 175°C Single Pulse
0.1 1 10 100 1000
V
OPERATION IN THIS AREA LIMITED BY RDS(on)
, Drain-toSource V oltage (V)
DS
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF3710Z
60
50
) A
(
40
t
n
e
r
r
u
30
C n
i
a
r D
20
,
D
I
10
0
25 50 75 100 125 150 175
TC , Case Temper ature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
10
3.0
e
c
n
a
t
s
i
s
e R n O e
c
r
u
o S
-
o
t
-
n
i
a
r D
,
)
n
o
( S D
R
ID = 59A V
= 10V
GS
2.5
2.0
)
d
e
z
i
l
1.5
a m
r
o N
(
1.0
0.5
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
)
C
1
J
h
t
Z (
e
s
n
o
p
s
e R
l
a m
r
e
h T
0.001
D = 0.50
0.20
0.1
0.01
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
0.10
0.05
0.02
0.01 SINGLE PULSE
( THERMAL RESPONSE )
t1 , Rectangular Pulse Dur ation (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
Page 6
IRF3710Z
A
15V
DRIVER
+
V
DD
-
R
20V
V
V
DS
G
GS
t
L
D.U.T
I
AS
Ω
0.01
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
300
)
J m
( y
250
g
r
e
n E
e
200
h
c
n
a
l
a
150
v A
e
s
l
u
100
P e
l
g
n
i S
50
,
S A
E
0
25 50 75 100 125 150 175
TOP 15A
BOTTOM35A
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
5.0
I
D
25A
) V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
( e
g
4.0
a
t
l
o V
d
l
o
h
s
3.0
e
r
h
t e
t
a G
)
h
2.0
t
( S G
V
1.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage vs. Temperature
6 www.irf.com
Page 7
1000
IRF3710Z
Duty Cycle = Singl e Pulse
100
) A
(
t
n
e
r
r
u C
10
e
h
c
n
a
l
a
v A
1
0.1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
200
TOP Single Pulse BOTTOM 10% Duty Cycle
)
J
150
m
( y
g
r
e
n E
e
100
h
c
n
a
l
a
v A
,
50
R A
E
0
25 50 75 100 125 150 175
ID = 35A
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T every part type.
2. Safe operation in Avalanche is allowed as long asT not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
·f
av
D (ave)·tav
thJC
www.irf.com 7
is
Page 8
IRF3710Z
Reverse Recovery Current
Driver Gate Drive
P.W.
D.U.T. ISDWaveform
D.U.T. VDSWaveform
D.U.T
+
-
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance Current Transformer
-
+
V
DD
R
G
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
+
-
Re-Applied Voltage
Inductor Curent
* V
GS
Period
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P.W.
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
+
V
DD
-
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (. 555)
13.47 (. 530)
10.54 (.415)
10.29 (.405)
1 2 3
4
6.47 (. 255)
6.10 (. 240)
1.15 (.045) MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185)
4.20 (.165)
- B -
1.32 (.0 52)
1.22 (.0 48)
IRF3710Z
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
0.93 (.037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES: 1 DIM ENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DI MENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUD E BURR S.
2X
0.69 (.027)
0.36 (.014) M B A M
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
TO-220AB Part Marking Information
R
0
F
1
I
0
1
A
N
S
P
L
E
E
X
M
A
TO-220AB package is not recommended for Surface Mount Application.
I
I
:
S
H
T
9
8
7
C
O
L A I
N
1
D
O
E
T
S
S T
O
E
D
L
B
E
M E
H
W
N
A
S
S
E
L
Y
B
M
7
9
9
1
,
9
1
W
"
"
L
C
E
I
N
E
RNA
T
T
N
I
I
O
A
L
N
I
F
T
E
C
I
E
R
R
O
L
O
G
Y
L
B
S
S
E
M
A
O
E
C
O
D
L
T
P
D
A E
Y W
E
L
I
N
B
NUM
T
A
R
T
D
O
E
E
C
9
=
7
9
1
A
R
9
1
E
K
E
C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
R
E
7
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 03/03
www.irf.com 9
Loading...