This is an N-Channel enhancement mode silicon gate power
field effect transistor designed for applications such as
switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
They can be operated directly from integrated circuits.
Formerly developmental type TA9399.
Ordering Information
PART NUMBERPACKAGEBRAND
IRF350TO-204AAIRF350
NOTE: When ordering, include the entire part number.
Features
• 15A, 400V
•r
DS(ON)
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.300Ω
Components to PC Boards”
Symbol
D
G
S
Packaging
DRAIN
(FLANGE)
JEDEC TO-204AA
GATE (PIN 1)
TOP VIEW
SOURCE (PIN 2)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
700mJ
-55 to 150
300
260
o
C
o
C
o
C
NOTE:
1. TJ = 25oC to 125oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Drain to Source Breakdown VoltageBV
Gate to Threshold VoltageV
GS(TH)VGS
Zero-Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)
Gate to Source Leakage CurrentI
Drain to Source On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
0.8
30
VGS = 10V
J
40
VGS = 20V
= 25oC.
6070
0.7
0.6
0.5
0.4
, DRAIN TO SOURCE
0.3
ON RESISTANCE (Ω)
DS(ON)
r
0.2
0
050
r
MEASURED WITH CURRENT PULSE OF
DS(ON)
2.0µs DURATION. INITIAL T
(HEATING EFFECT OF 2.0µs PULSE IS MINIMAL)
1020
ID,DRAIN CURRENT (A)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCEvs GATE
VOLTAGE AND DRAIN CURRENT
2.2
ID = 8A
V
= 10V
GS
1.8
1.4
1.0
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0.2
-4040
0
T
, JUNCTION TEMPERATURE (oC)
J
FIGURE 9. NORMALIZED DRAIN TOSOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
645
80
120
160
4
Page 5
IRF350
Typical Performance Curves
1.25
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
0-404080120160
, JUNCTION TEMPERATURE (oC)
T
J
Unless Otherwise Specified (Continued)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
20
VDS > I
PULSE DURATION = 80µs
16
12
TJ = 125oC
8
D(ON)
x r
DS(ON)MAX
TJ = 25oC
TJ = -55oC
4000
3200
2400
1600
C, CAPACITANCE (pF)
800
0
010
C
ISS
C
OSS
C
RSS
V
DS,
2030
DRAIN TO SOURCE VOLTAGE (V)
VGS = 0V, f = 1MHz
= CGS + C
C
C
C
ISS
RSS
OSS
= C
≈ C
GD
GD
+ C
DS
4050
GD
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
2
2
10
10
TJ = 150oC
TJ = 25oC
TJ = 25oC
TJ = 150oC
, TRANSCONDUCTANCE (S)
4
fs
g
0
481216020
ID,DRAIN CURRENT (A)
, SOURCE TO DRAIN CURRENT (A)
SD
I
1
01234
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 18A
15
10
5
GATE TO SOURCE VOLTAGE (V)
GS,
V
0
2856841120140
Q
g(TOT),
VDS = 80V
VDS = 200V
VDS = 320V
TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
Page 6
IRF350
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
t
ON
t
d(ON)
t
R
L
+
V
R
G
DD
-
V
DS
90%
0
r
10%
DUT
V
GS
V
GS
10%
0
50%
PULSE WIDTH
FIGURE 17. SWITCHING TIME TEST CIRCUITFIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
D
S
CURRENT
I
D
SAMPLING
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
DUT
V
DS
V
DD
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
I
G(REF)
0
12V
BATTERY
0
0.2µF
50kΩ
I
G(REF)
CURRENT
REGULATOR
0.3µF
G
IG CURRENT
SAMPLING
RESISTORRESISTOR
t
d(OFF)
90%
V
GS
t
OFF
50%
t
f
10%
90%
FIGURE 19. GATE CHARGE TEST CIRCUITFIGURE 20. GATE CHARGE WAVEFORMS
6
Page 7
IRF350
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporationreserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
7
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
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Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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