This N-Channel enhancementmode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdownavalanchemodeof operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17414.
Ordering Information
PART NUMBERPACKAGEBRAND
IRF330TO-204AAIRF330
NOTE: When ordering, use the entire part number .
File Number
Features
• 5.5A, 400V
•r
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 1.000Ω
DS(ON)
Components to PC Boards”
Symbol
D
G
1570.4
Packaging
DRAIN
(FLANGE)
JEDEC TO-204AA
GATE (PIN 1)
S
SOURCE (PIN 2)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300mJ
-55 to 150
300
260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 125oC.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
C
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Drain to Source Breakdown VoltageBV
Gate Threshold VoltageV
GS(TH)VGS
Zero Gate Voltage Drain CurrentI
On-State Drain Current (Note 2)I
D(ON)VDS
Gate to Source Leakage CurrentI
Drain to Source On Resistance (Note 2)r
FIGURE 6. SATURATION CHARACTERISTICSFIGURE 7. TRANSFER CHARACTERISTICS
3
VGS = 10V
2
, DRAIN TO SOURCE
1
ON RESISTANCE (Ω)
DS(ON)
r
0
5101520025
ID, DRAIN CURRENT (A)
VGS = 20V
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
3
2
, DRAIN CURRENT (A)
D
I
1
0
10
30
0
2.2
1.8
1.4
1.0
ON RESISTANCE
0.6
NORMALIZED DRAIN TO SOURCE
0.2
VGS, GATE TO SOURCE VOLTAGE (V)
ID = 2.0A
= 10V
V
GS
-404080120
125oC
25oC
-55oC
23471
0
TJ, JUNCTION TEMPERATURE (oC)
56
FIGURE 9. NORMALIZED DRAIN TOSOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4
Page 5
IRF330
Typical Performance Curves
1.25
ID = 250µA
1.15
1.05
0.95
BREAKDOWN VOLTAGE
0.85
NORMALIZED DRAIN TO SOURCE
0.75
-404080120
FIGURE 10. NORMALIZED DRAINTOSOURCE BREAKDOWN
0160
TJ, JUNCTION TEMPERATURE (oC)
Unless Otherwise Specified (Continued)
2000
1600
1200
800
C, CAPACITANCE (pF)
400
0
0
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VGS = 0V
f = 1MHz
C
ISS
C
OSS
C
RSS
1020304050
VDS, DRAIN TO SOURCE VOLTAGE (V)
VOLTAGE vs JUNCTION TEMPERATURE
10
80µs PULSE TEST
8
6
4
, TRANSCONDUCTANCE (S)
2
fs
g
0
010
246
ID, DRAIN CURRENT (A)
TJ = -55oC
TJ = 25oC
TJ = 125oC
8
100
80µs PULSE TEST
10
TJ = 150oC
, SOURCE TO DRAIN CURRENT (A)
SD
I
0.1
01234
VSD, SOURCE TO DRAIN VOLTAGE (V)
TJ = 25oC
TJ = 25oC
VGS= 0V, f = 1MHz
C
= CGS + C
ISS
C
= C
RSS
C
OSS
GD
≈ C
DS
TJ = 150oC
GD
+ C
GD
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENTFIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
16
12
8
4
, GATE TO SOURCE VOLTAGE (V)
GS
V
0
ID = 5.5A
8162432040
Q
g(TOT)
VDS = 320V
V
= 200V
DS
V
= 80V
DS
, TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
Page 6
IRF330
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
0.01Ω
0
t
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUITFIGURE 16. UNCLAMPED ENERGY WAVEFORMS
t
P
I
AS
t
AV
V
DS
V
DD
t
ON
t
d(ON)
t
R
L
+
V
R
G
DD
-
V
DS
0
r
90%
10%
DUT
V
GS
V
GS
10%
0
50%
PULSE WIDTH
FIGURE 17. SWITCHING TIME TEST CIRCUITFIGURE 18. RESISTIVE SWITCHING WAVEFORMS
V
DS
(ISOLATED
SUPPLY)
SAME TYPE
AS DUT
V
DD
Q
g(TOT)
Q
gd
Q
gs
12V
BATTERY
0.2µF
50kΩ
CURRENT
REGULATOR
0.3µF
t
d(OFF)
90%
V
GS
t
OFF
50%
t
f
90%
10%
D
G
I
0
G(REF)
IG CURRENT
SAMPLING
RESISTORRESISTOR
DUT
S
CURRENT
I
D
SAMPLING
0
V
DS
I
G(REF)
0
V
DS
FIGURE 19. GATE CHARGE TEST CIRCUITSFIGURE 20. GATE CHARGE WAVEFORMS
6
Page 7
IRF330
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
7
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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