Datasheet IRF3205ZSPBF Datasheet

Features

Pulsed Drain C

c

Single Pulse Aval

gy

d

Single Pulse Aval

gy T

d Value

h

Aval

c

R

gy

g

l Advanced Process Technology l Ultra Low On-Resistance l 175°C Operating Temperature l Fast Switching l Repetitive Avalanche Allowed up to Tjmax

l Lead-Free

PD - 95129A

IRF3205ZPbF

IRF3205ZSPbF

IRF3205ZLPbF

HEXFET® Power MOSFET

D

V

= 55V

DSS

G

R

DS(on)

= 6.5mΩ

Description

This HEXFET® Power MOSFET utilizes the latest

S

ID = 75A

processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications.

TO-220AB

IRF3205ZPbF

D2Pak

IRF3205ZSPbF

TO-262

IRF3205ZLPbF

Absolute Maximum Ratings

ID @ TC = 25°C

ID @ TC = 100°C

@ TC = 25°C

I

D

I

DM

PD @TC = 25°C

V

GS

E

AS (Thermally limited)

(Tested )

E

AS

I

AR

E

AR

T

J

T

STG

Parameter Units

Continuous Drain Current, V

urrent

Power Dissipation W

Linear Derating Factor W/°C Gate-to-Source Voltage V

anche Ener

anche Current

epetitive Avalanche Ener

Operating Junction and

Storage Temperature Range °C

Soldering Temperature, for 10 seconds

Mounting Torque, 6-32 or M3 screw



GS

@ 10V

este

i

(Silicon Limited)

(Package Limited)

See Fig.12a, 12b, 15, 16

300 (1.6mm from case )

Max.

110

440

170

1.1

± 20

180

250

-55 to + 175

y

in (1.1Nym)

10 lbf

78

75

A

mJ

A

mJ

Thermal Resistance

Parameter Typ. Max. Units

R

JC

θ

R

CS

θ

R

JA

θ

R

JA

θ

Junction-to-Case

Case-to-Sink, Flat Greased Surface

Junction-to-Ambient

Junction-to-Ambient (PCB Mount)

i

j

––– 0.90 °C/W

0.50 –––

––– 62

––– 40

www.irf.com 1

07/23/10

IRF3205ZS/LPbF

/

µ

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

V

(BR)DSS

∆V

(BR)DSS

R

DS(on)

V

GS(th)

gfs Forward Transconductance 71 ––– ––– S I

DSS

I

GSS

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

L

D

L

S

C

iss

C

oss

C

rss

C

oss

C

oss

eff.

C

oss

Source-Drain Ratings and Characteristics

I

S

I

SM

V

SD

t

rr

Q

rr

t

on

Drain-to-Source Breakdown Voltage 55 ––– ––– V

∆T

Breakdown Voltage Temp. Coefficient ––– 0.051 ––– V/°C

J

Static Drain-to-Source On-Resistance ––– 4.9 6.5

mΩ

Gate Threshold Voltage 2.0 ––– 4.0 V

Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200

Total Gate Charge ––– 76 110

Gate-to-Source Charge ––– 21 ––– nC

Gate-to-Drain ("Miller") Charge ––– 30 –––

Turn-On Delay Time ––– 18 –––

Rise Time –––95–––

Turn-Off Delay Time ––– 45 ––– ns

Fall Time –––67–––

Internal Drain Inductance ––– 4.5 ––– Between lead,

nH 6mm (0.25in.)

Internal Source Inductance ––– 7.5 ––– from package

Input Capacitance ––– 3450 –––

Output Capacitance ––– 550 –––

Reverse Transfer Capacitance ––– 310 ––– pF

Output Capacitance ––– 1940 –––

Output Capacitance ––– 430 –––

Effective Output Capacitance ––– 640 –––

Parameter Min. Typ. Max. Units

Continuous Source Current ––– ––– 75

(Body Diode) A Pulsed Source Current ––– ––– 440

(Body Diode) Diode Forward Voltage ––– ––– 1.3 V

Reverse Recovery Time ––– 28 42 ns

Reverse Recovery Charge ––– 25 38 nC

Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

c

Conditions

VGS = 0V, ID = 250µA

Reference to 25°C, I

= 10V, ID = 66A

V

GS

= 1mA

D

e

VDS = VGS, ID = 250µA

V

= 25V, ID = 66A

DS

V

= 55V, VGS = 0V

DS

= 55V, VGS = 0V, TJ = 125°C

V

DS

= 20V

V

GS

= -20V

V

GS

I

= 66A

D

= 44V

V

DS

VGS = 10V

e

VDD = 28V

= 66A

I

D

= 6.8 Ω

R

G

VGS = 10V

e

and center of die contact VGS = 0V

= 25V

V

DS

ƒ = 1.0MHz

VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

= 0V, VDS = 44V, ƒ = 1.0MHz

V

GS

= 0V, VDS = 0V to 44V

V

GS

f

Conditions

MOSFET symbol

showing the integral reverse

p-n junction diode. T

= 25°C, IS = 66A, VGS = 0V

J

TJ = 25°C, IF = 66A, VDD = 25V

s

di/dt = 100A/

e

2 www.irf.com

IRF3205ZS/LPbF

1000

V

TOP 15V

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

, I

10V

7.0V

6.0V

5.5V

100

5.0V BOTTOM 4.5V

10

D

1

0.1 1 10 100

GS

8.0V

4.5V

20µs PULSE WIDTH Tj = 25°C

VDS, Drain-to-Source Voltage (V)

1000

) A

(

t n e

r

100

r u

C e

c

r u o S

o

t

-

10

n

i a

r D

,

D

I

1

4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0

TJ = 25°C

V

DS

20µs PULSE WIDTH

= 25V

VGS, Gate-to-Source Voltage (V)

TJ = 175°C

1000

V

TOP 15V

) A

( t n e

r

r u

C e

c

r u o S

o

t

n

i a

r D

, I

10V

7.0V

6.0V

5.5V

5.0V BOTTOM 4.5V

100

D

10

0.1 1 10 100

GS

8.0V

4.5V

20µs PULSE WIDTH Tj = 175°C

VDS, Drain-to-Source Voltage (V)

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

120

) S

(

100

e c n a

t c

80

u d n o c s

60

n a

r T

d

r a

40

w

r o F , s

20

f G

0

0 20406080100

ID, Drain-to-Source Current (A)

TJ = 175°C

V

= 10V

DS

20µs PULSE WIDTH

TJ = 25°C

Fig 3. Typical Transfer Characteristics

Fig 4. Typical Forward Transconductance

Vs. Drain Current

www.irf.com 3

IRF3205ZS/LPbF

6000

5000

) F

4000

p

( e

c n a

t

3000

i c a p a

C

2000

, C

1000

0

1 10 100

V

= 0V, f = 1 MHZ

GS

C

= C

gs

gd

ds

Ciss

Coss

Crss

+ Cgd, C

+ C

iss

C

rss

C

oss

VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

1000.0

) A

( t n e

r

r u

C n

i a

r D e

s

r e v e

R ,

D S

I

100.0

10.0

TJ = 175°C

TJ = 25°C

1.0

0.1

0.2 0.6 1.0 1.4 1.8 2.2

VSD, Source-toDrain Voltage (V)

20

SHORTED

ds

gd

ID= 66A

) V

(

16

e g a

t

l o V

12

e c

r u o S

o

8

t

e

t a

G ,

S

4

G

V

0

0 20 40 60 80 100 120

VDS= 44V

VDS= 28V VDS= 11V

Q

Total Gate Charge (nC)

G

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

V

GS

= 0V

10000

) A

1000

( t n e

r

r u

C

100

e c

r u o S

-

10

o

t

n

i a

r D ,

1

D

I

Tc = 25°C Tj = 175°C Single Pulse

0.1 1 10 100 1000

V

OPERATION IN THIS AREA LIMITED BY RDS(on)

100µsec

1msec

10msec

, Drain-toSource Voltage (V)

DS

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4 www.irf.com

IRF3205ZS/LPbF

120

LIMITED BY PACKAGE

100

) A

(

80

t n e

r

r u

C

60

n

i a

r D

,

40

D

I

20

0

25 50 75 100 125 150 175

TC , Case Temperature (°C)

Fig 9. Maximum Drain Current Vs.

Case Temperature

1

2.5

e c n a

t s

i s e

R n O e

)

c

d

r

e

u

z

i

o

l

S

a

m

o

t

r

-

o

n

i

N

(

a

r D

,

) n o

( S D

R

ID = 66A

V

= 10V

GS

2.0

1.5

1.0

0.5

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

Fig 10. Normalized On-Resistance

Vs. Temperature

D = 0.50

)

C J h

t

0.1

Z (

e s n o p s e

R l a

0.01

m

r e h T

0.001

1E-006 1E-005 0.0001 0.001 0.01 0.1

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE ( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5

IRF3205ZS/LPbF

A

15V

DRIVER

+

V

DD

-

R

20V

V

DS

G

GS

L

D.U.T

I

AS

Ω

0.01

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

I

AS

Fig 12b. Unclamped Inductive Waveforms

Q

G

10 V

Q

GS

Q

GD

350

) J

m

(

300

y g

r e n E

250

e h c n

200

a

l a v A

150

e s

l u P

e

100

l g n

i S

,

50

S A

E

0

25 50 75 100 125 150 175

I

TOP 27A 47A BOTTOM 66A

Starting TJ, Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

4.0

D

) V

V

G

Charge

Fig 13a. Basic Gate Charge Waveform

L

0

1K

DUT

VCC

( e

g a

t

l o

3.0

V d

l o h s e

r h

t e

t a

2.0

G

) h

t

( S G

V

1.0

-75 -50 -25 0 25 50 75 100 125 150 175

ID = 250µA

TJ , Temperature ( °C )

Fig 13b. Gate Charge Test Circuit

Fig 14. Threshold Voltage Vs. Temperature

6 www.irf.com

IRF3205ZS/LPbF

1000

Duty Cycle = Single Pulse

Allowed avalanche Current vs

100

) A

( t n e

r

r u

C

10

e h c n a

l a v A

1

0.1

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

0.01

0.05

0.10

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to

avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax

200

TOP Single Pulse

) J

160

m

( y

g

r e n

120

E e

h c n a

l

80

a v

A ,

R A

40

E

BOTTOM 10% Duty Cycle ID = 66A

Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T every part type.

2. Safe operation in Avalanche is allowed as long asT not exceeded.

. This is validated for

jmax

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. P

avalanche pulse.

= Average power dissipation per single

D (ave)

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I

= Allowable avalanche current.

av

7. ∆T = Allowable rise in junction temperature, not to exceed

T

(assumed as 25°C in Figure 15, 16).

0

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Fig 16. Maximum Avalanche Energy

Vs. Temperature

jmax

t

Average time in avalanche.

av =

D = Duty cycle in avalanche = t Z

(D, tav) = Transient thermal resistance, see figure 11)

thJC

P

= 1/2 ( 1.3·BV·Iav) = DT/ Z

D (ave)

I

2DT/ [1.3·BV·Zth]

av =

E

AS (AR)

= P

·f

av

D (ave)·tav

thJC

www.irf.com 7

is

IRF3205ZS/LPbF





Reverse Recovery Current

Driver Gate Drive

P.W.

D.U.T. ISDWaveform

D.U.T. VDSWaveform

Inductor Curent

* V

GS

D.U.T

+

-

R

G

+



Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

-

• Low Leakage Inductance Current Transformer



-

• dv/dt controlled by R

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

G

+

V

DD

Re-Applied Voltage

+

-

Period

Body Diode Forward

Current

di/dt

Diode Recovery

dv/dt

Body Diode Forward Drop

Ripple ≤ 5%

= 5V for Logic Level Devices

D =

P. W .

Period

VGS=10V

V

DD

I

SD

*

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

R

D.U.T.

D

+

V

DD

-

V

DS

V

GS

R

G

10V

Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

V

DS

90%

10% V

GS

t

d(on)tr

t

d(off)tf

Fig 18b. Switching Time Waveforms

8 www.irf.com

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

IRF3205ZS/LPbF

TO-220AB Part Marking Information

EXAMPLE : THI S IS AN IRF 1010

Note: "P" in assembly line position

LOT CODE 1789 ASS EMBL ED ON WW 19, 2000 IN THE ASSEMBLY LINE "C"

indicates "Lead - Free"

INTE RNATIONAL

RECT IFIER

LOGO

ASSEMBLY LOT CODE

TO-220AB package is not recommended for Surface Mount Application

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

www.irf.com 9

PART NUMBER

DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C

IRF3205ZS/LPbF

2

Pak (TO-263AB) Package Outline

D

Dimensions are shown in millimeters (inches)

D2Pak (TO-263AB) Part Marking Information

THIS IS AN IRF530S WITH

LOT CODE 8024 ASS E MBL ED ON WW 02, 20 00 IN THE AS SE MBLY LINE "L "

INTE RNATIONAL

RECTIFIER

LOGO

AS S E MB L Y LOT CODE

F530S

OR

INTE RNATIONAL

RECTIF IER

LOGO

AS S E MB L Y LOT CODE

F530S

PART NUMBER

DATE CODE P = DE S I GN AT E S L E AD - F R EE

PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

10 www.irf.com

PART NUMBER

DATE CODE YEAR 0 = 2000 WEEK 02 LINE L

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

IRF3205ZS/LPbF

TO-262 Part Marking Information

THIS IS AN IRL3103L

EXAMPLE:

LOT CODE 1789 ASSE MBL ED ON WW 19, 1997 IN THE ASSEMBLY LINE "C"

Note: "P" in assembly line pos it ion i ndicates "L ead-F ree"

INTE RNATIONAL

RECTIFIER

LOGO

ASSEMBLY LOT CODE

OR

INTE RNATIONAL

RECTIFIER

LOGO

ASSEMBLY LOT CODE

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

www.irf.com 11

PART NUMBER

DATE CODE YEAR 7 = 1997 WE EK 19 LINE C

PART NUMBER

DATE CODE P = D ES IGNAT E S L EAD -FR E E

PRODUCT (OPTIONAL)

YEAR 7 = 1997 WE EK 19 A = ASSEMBLY SITE CODE

IRF3205ZS/LPbF

D2Pak Tape & Reel Infomation

Dimensions are shown in millimeters (inches)

TRR

4.10 (.161)

3.90 (.153)

FEED DIRECTION

TRL

FEED DIRECTION

1.85 (.073)

1.65 (.065)

10.90 (.429)

10.70 (.421)

1.60 (.063)

1.50 (.059)

11.60 (.457 )

11.40 (.449 )

16.10 (.634)

15.90 (.626)

1.60 (.063)

1.50 (.059)

1.75 (.069)

1.25 (.049)

15.42 (.609)

15.22 (.601)

0.368 (.0145)

0.342 (.0135)

24.30 (.957)

23.90 (.941)

4.72 (.136)

4.52 (.178)

330.00 (14.173) MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CO NTROLLING DIMENSION: M ILLIMETER.

3. DIMENSION MEASURED @ HUB.

Notes:



Repetitive rating; pulse width limited by

4. INCLU DES FLANGE DISTORTIO N @ OUTER EDGE.

max. junction temperature. (See fig. 11).

 Limited by T

RG = 25Ω, I

, starting TJ = 25°C, L = 0.08mH

Jmax

= 66A, VGS =10V. Part not

AS

recommended for use above this value.

 Pulse width ≤ 1.0ms; duty cycle ≤ 2%.  C

eff. is a fixed capacitance that gives the

oss

same charging time as C from 0 to 80% V

DSS

.

oss

while V

DS

is rising

This product has been designed and qualified for the Industrial market.

13.50 (.532)

12.80 (.504)

27.40 (1.079)

23.90 (.941)

4

60.00 (2.362) MIN.

30.40 (1.197) MAX.

4

 Limited by T

26.40 (1.039)

24.40 (.961)

3

, see Fig.12a, 12b, 15, 16 for typical repetitive

Jmax

avalanche performance.

 This value determined from sample failure population. 100%

tested to this value in production.

 This is only applied to TO-220AB pakcage.  This is applied to D

4 or G-10 Material). For recommended footprint and soldering

techniques refer to application note #AN-994.

2

Pak, when mounted on 1" square PCB (FR-

Data and specifications subject to change without notice.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 07/2010

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