Datasheet irf2804 Datasheet

Page 1
PD - 94436B
AUTOMOTIVE MOSFET
IRF2804
HEXFET® Power MOSFET
Features
● Advanced Process Technology
● Ultra Low On-Resistance
● 175°C Operating Temperature
● Fast Switching
● Repetitive Avalanche Allowed up to Tjmax
G
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and im­proved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon limited) 280 ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig.9) 200 A ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package limited) 75 I
DM
PD @TC = 25°C Power Dissipation 330 W
V
GS
E
AS
E
(tested) Single Pulse Avalanche Energy Tested Value 1160
AS
I
AR
E
AR
T
J
T
STG
Pulsed Drain Current 1080
Linear Derating Factor 2.2 W/°C Gate-to-Source Voltage ± 20 V Single Pulse Avalanche Energy 670 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A Repetitive Avalanche Energy mJ Operating Junction and -55 to + 175 Storage Temperature Range Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
D
V
= 40V
DSS
R
S
DS(on)
ID = 75A
= 2.3mΩ
TO-220AB
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.45 Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W Junction-to-Ambient ––– 62
HEXFET(R) is a registered trademark of International Rectifier.
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12/11/02
Page 2
IRF2804
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 2210 ––– VGS = 0V, VDS = 0V to 32V
oss
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
 Limited by T
L=0.24mH, RG = 25Ω, I Part not recommended for use above this value.
I
SD
TJ ≤ 175°C
2 www.irf.com
Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.031 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– 1.8 2.3 mΩ VGS = 10V, ID = 75A Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA Forward Transconductance 130 ––– ––– S VDS = 10V, ID = 75A
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage ––– ––– 200 V Gate-to-Source Reverse Leakage ––– ––– -200
––– ––– 20 ––– ––– 250 VDS = 40V, VGS = 0V, TJ = 125°C
µA
nA
= 40V, VGS = 0V
V
DS
= 20V
GS
VGS = -20V Total Gate Charge ––– 160 240 ID = 75A Gate-to-Source Charge ––– 41 62 nC VDS = 32V Gate-to-Drain ("Miller") Charge ––– 66 99 VGS = 10V Turn-On Delay Time ––– 13 ––– VDD = 20V Rise Time ––– 120 ––– ID = 75A Turn-Off Delay Time ––– 130 ––– RG = 2.5Ω
ns
Fall Time ––– 130 ––– VGS = 10V
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact Input Capacitance ––– 6450 ––– VGS = 0V Output Capacitance ––– 1690 ––– pF VDS = 25V Reverse Transfer Capacitance ––– 840 ––– ƒ = 1.0MHz, See Fig. 5 Output Capacitance ––– 5350 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz Output Capacitance ––– 1520 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Parameter Min. Typ. Max. Units Conditions Continuous Source Current MOSFET symbol (Body Diode) Pulsed Source Current integral reverse (Body Diode)
––– –––
––– –––
280
1080
showing the
A
p-n junction diode. Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V Reverse Recovery Time ––– 56 84 ns TJ = 25°C, IF = 75A, VDD = 20V Reverse Recovery Charge ––– 67 100 nC di/dt = 100A/µs  Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Pulse width ≤ 1.0ms; duty cycle ≤ 2%. C
eff. is a fixed capacitance that gives the same charging time
, starting TJ = 25°C,
Jmax
= 75A, VGS =10V.
AS
≤ 75A, di/dt ≤ 220A/µs, V
DD
≤ V
(BR)DSS
,
oss
as C Limited by T
oss
while V
is rising from 0 to 80% V
DS
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
DSS
.
avalanche performance. This value determined from sample failure population. 100% tested to this value in production.
G
G
D
S
D
S
Page 3
IRF2804
10000
) A
( t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
1000
100
10
VGS TOP 15V 10V
8.0V
7.0V
6.0V
5.5V
5.0V BOTTOM 4.5V
4.5V
20µs PULSE WIDTH
1
0.1 1 10 100
Tj = 25°C
VDS, Drain-to-Source Voltage (V)
1000
)
Α
(
t n e
r
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
TJ = 175°C
100
TJ = 25°C
10
V
= 10V
DS
1
4.0 5.0 6.0 7.0 8.0 9.0
20µs PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
10000
) A
( t n e
r
r
1000
u C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
100
VGS
V
TOP 15V
TOP 15V
10V
10V
8.0V
7.0V
7.0V
6.0V
6.0V
5.5V
5.5V
5.0V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
GS
8.0V
4.5V
20µs PULSE WIDTH
10
0.1 1 10 100
Tj = 175°C
VDS, Drain-to-Source Voltage (V)
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
300
) S
(
250
e c n a
t c
200
u d n o c s
150
n a
r T
d
r
100
a w
r o F ,
50
s
f
G
0
0 40 80 120 160 200
ID, Drain-to-Source Current (A)
V
= 10V
DS
20µs PULSE WIDTH
TJ = 25°C
TJ = 175°C
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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Page 4
IRF2804
) F
p
( e
c n a
t
i c a p a
C ,
C
12000
10000
8000
6000
4000
2000
0
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
is s
rss
oss
= C
= C
gs
gd
ds
C
C
+ Cgd, C
+ C
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
) A
( t n e
r
r u
C n
i a
r D e
s
r e v e
R ,
D S
I
100.0
10.0
TJ = 175°C
1.0 TJ = 25°C
0.1
0.2 0.6 1.0 1.4 1.8 2.2
VSD, Source-toDrain Voltage (V)
gd
ds
Cis s
Cos s
Crss
SHORTED
V
GS
= 0V
10000
) A
( t
1000
n e
r
r u
C e
c r
u o S
­o
t
­n
i a
r D ,
D
I
20
ID= 75A
) V
(
16
e g a
t
l o
V
12
e c
r u o S
­o
8
t
­e
t a
G ,
S
4
G
V
VDS= 32V
VDS= 20V VDS= 8.0V
0
0 40 80 120 160 200 240
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
OPERATION IN THIS AREA LIMITED BY RDS(on)
100
10
Tc = 25° C Tj = 175°C Single Pulse
1
0 1 10 100 1000
V
, Drain-toSource Voltage (V)
DS
100µsec
1msec
10msec
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
Page 5
IRF2804
300
LIMITED BY PACKAGE
250
) A
(
200
t n e
r
r u
150
C n
i a
r D
,
100
D
I
50
0
25 50 75 100 125 150 175
TC , Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
2.0
e c n a
t s
i s e
R n O e
)
c
d
r
e
u
z
i
o
l
S
a
­m
o
t
r
-
o
n
i
N
(
a
r D
,
) n o
( S D
R
ID = 75A
V
= 10V
GS
1.5
1.0
0.5
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
)
Z (
e s n o p
s e
R l a
m
r e h T
C J h
t
0. 001
D = 0.50
0.1
0. 01
1E- 006 1E-005 0. 0001 0. 001 0. 01 0. 1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE ( THERMAL RESPONSE )
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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Page 6
IRF2804
A
15V
DRIVER
+
V
DD
-
R
20V
V
V
DS
G
GS
L
D.U.T
I
AS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
1600
) J
m (
y g
r e
1200
n E
e h c
n a
l a
800
v A
e s
l u P
e
l
400
g n
i S
, S A
E
0
25 50 75 100 125 150 175
I
TOP 31A 53A BOTTOM 75 A
Starting TJ, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0
D
) V
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
DS
-
I
D
Fig 13b. Gate Charge Test Circuit
( e
g a
t
l o
3.0
V d
l o h s e
r h
t e
t a
2.0
G
) h
t
( S G
V
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
ID = 250µA
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
6 www.irf.com
Page 7
IRF2804
10000
Duty Cycle = Single Pulse
1000
) A
( t n e
r
r u
C
100
e h c n a
l a v A
10
1
1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
0.01
0.05
0.10
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
800
TOP Single Pulse BOTTOM 10% Duty Cycle
) J
m
600
( y
g
r e n E
e
400
h c n a
l a v A ,
200
R A
E
ID = 75A
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T every part type.
2. Safe operation in Avalanche is allowed as long asT not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) = DT/ Z
D (ave)
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
·f
av
D (ave)·tav
thJC
www.irf.com 7
is
Page 8
IRF2804
+
-
+
-
Reverse Recovery Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
D.U.T
+
-
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
-
• Low Leakage Inductance Current Transformer
-
+
V
DD
R
G
• dv/dt controlled by R
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
G
Re-Applied Voltage
Inductor Curent
* V
GS
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
R
D.U.T.
D
V
DD
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 18b. Switching Time Waveforms
8 www.irf.com
Page 9
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
10.54 (.415)
10.29 (.405)
1 2 3
4
6.47 (.255)
6.10 (.240)
1.15 (.045) MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
IRF2804
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
0.93 (.037)
3X
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANS I Y14.5M, 1982. 3 OUTLINE CONFORMS TO JED EC OUTLINE TO-220A B. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASU REMENTS DO NOT INCLUDE BURRS.
2X
0.69 (.027)
0.36 (.014) M B A M
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
TO-220AB Part Marking Information
(;$03/(7+,6,6$1,5)
/27&2'( $66(0%/('21 ,17+($66(0%
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:
,17(51$7,21
5(&7,),(5
/2*
2
$66(0%/ /27&2'
$
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(
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
3$57180%(5
'$7
(
&2'( <($5 :((. /,1
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&
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/02
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