Page 1
Typical Connection
Features
n Floating channel designed for bootstrap operation
Fully operational to +500V
Tolerant to negative transient voltage
dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels
n Separate logic supply range from 5 to 20V
Logic and power ground ±5V offset
n CMOS Schmitt-triggered inputs with pull-down
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels
n Outputs in phase with inputs
Description
The IR2110 is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. Logic inputs are
compatible with standard CMOS or LSTTL outputs.
The output drivers feature a high pulse current b uff er
stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify
use in high frequency applications. The floating
channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration
which operates up to 500 volts.
Packages
Data Sheet No. PD-6.011E
IR2110
HIGH AND LOW SIDE DRIVER
Product Summary
V
OFFSET
500V max.
IO+/- 2A / 2A
V
OUT
10 - 20V
t
on/off
(typ.) 120 & 94 ns
Delay Matching 10 ns
HIN
up to 500V
TO
LOAD
V
DD
V
B
V
S
HO
LO
COM
HIN
LIN
V
SS
SD
V
CC
LIN
V
DD
SD
V
SS
V
CC
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-25
Page 2
IR2110
B-26 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Parameter V alue
Symbol Definition Min. Max. Units
V
B
High Side Floating Supply Voltage -0.3 525
V
S
High Side Floating Supply Offset V oltage VB - 25 VB + 0.3
V
HO
High Side Floating Output Voltage VS - 0.3 V
B
+ 0.3
V
CC
Low Side Fix ed Supply V oltage -0.3 25
V
LO
Low Side Output Voltage -0.3 VCC + 0.3
V
DD
Logic Supply V oltage -0.3 VSS + 25
V
SS
Logic Supply Offset Voltage VCC - 25 V
CC
+ 0.3
V
IN
Logic Input Voltage (HIN, LIN & SD) VSS - 0.3 V
DD
+ 0.3
dVs/dt Allowable Offset Supply V oltage Transient (Figure 2) — 50 V/ns
P
D
P ackage P ow er Dissipation @ TA ≤ +25° C (14 Lead DIP) — 1.6
(14 Lead DIP w/o Lead 4) — 1.5
(16 Lead DIP w/o Leads 5 & 6) — 1.6
(16 Lead SOIC) — 1.25
R
θJA
Thermal Resistance, Junction to Ambient (14 Lead DIP) — 7 5
(14 Lead DIP w/o Lead 4) — 85
(16 Lead DIP w/o Leads 5 & 6) — 75
(16 Lead SOIC) — 100
T
J
Junction T emperature — 15 0
T
S
Storage T emperature -55 150 °C
T
L
Lead Temperature (Soldering, 10 seconds) — 30 0
Par ameter V alue
Symbol Definition Min. Max. Units
V
B
High Side Floating Supply Absolute Voltage VS + 10 VS + 20
V
S
High Side Floating Supply Offset V oltage Note 1 50 0
V
HO
High Side Floating Output Voltage V
S
V
B
V
CC
Low Side Fix ed Supply V oltage 10 20
V
LO
Low Side Output Voltage 0 V
CC
V
DD
Logic Supply V oltage VSS + 5 VSS + 20
V
SS
Logic Supply Offset Voltage -5 5
V
IN
Logic Input Voltage (HIN, LIN & SD) V
SS
V
DD
T
A
Ambient T emper ature -40 1 25 °C
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits be yond which damage to the de vice may occur . All voltage parameters are
absolute voltages ref erenced to COM. The Thermal Resistance and P o wer Dissipation ratings are measured under board
mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in Figures 36 and 37.
Note 1: Logic operational for VS of -4 to +500V. Logic state held for VS of -4V to -VBS.
°C/W
W
V
V
Page 3
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-27
Parameter Value
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
t
on
Turn-On Propagation Delay 7 — 120 150 VS = 0V
t
off
Turn-Off Propagation Delay 8 — 94 125 VS = 500V
t
sd
Shutdown Propagation Delay 9 — 110 140 VS = 500V
t
r
Turn-On Rise Time 10 — 25 35
t
f
Turn-Off Fall Time 11 — 17 25
MT Delay Matching, HS & LS Turn-On/Off — — — 10 Figure 5
Parameter Value
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
V
IH
Logic “1” Input Voltage 12 9.5 — —
V
IL
Logic “0” Input Voltage 13 — — 6.0
V
OH
High Level Output V oltage, V
BIAS
- V
O
14 — — 1.2 IO = 0A
V
OL
Low Level Output V oltage, V
O
15 — — 0.1 IO = 0A
I
LK
Offset Supply Leakage Current 16 — — 50 VB = VS = 500V
I
QBS
Quiescent VBS Supply Current 17 — 125 230 V
IN
= 0V or V
DD
I
QCC
Quiescent VCC Supply Current 18 — 1 80 340 VIN = 0V or V
DD
I
QDD
Quiescent VDD Supply Current 19 — 15 30 VIN = 0V or V
DD
I
IN+
Logic “1” Input Bias Current 20 — 20 40 VIN = V
DD
I
IN-
Logic “0” Input Bias Current 21 — — 1.0 V
IN
= 0V
V
BSUV+
VBS Supply Undervoltage Positive Going 22 7.5 8.6 9.7
Threshold
V
BSUV-
VBS Supply Undervoltage Negative Going 23 7.0 8.2 9.4
Threshold
V
CCUV+
VCC Supply Undervoltage Positive Going 24 7.4 8.5 9.6
Threshold
V
CCUV-
VCC Supply Undervoltage Negative Going 25 7.0 8.2 9.4
Threshold
I
O+
Output High Short Circuit Pulsed Current 26 2.0 2.5 — VO = 0V, VIN = V
DD
PW ≤ 10 µ s
I
O-
Output Low Short Circuit Pulsed Current 27 2.0 2.5 — VO = 15V, VIN = 0V
PW ≤ 10 µ s
ns
Dynamic Electrical Characteristics
V
BIAS
(VCC, VBS, VDD) = 15V, CL = 1000 pF, T
A
= 25°C and VSS = COM unless otherwise specified. The dynamic
electrical character istics are measured using the test circuit shown in Figure 3.
Static Electrical Characteristics
V
BIAS
(VCC, VBS, VDD) = 15V, T
A
= 25° C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters
are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are
referenced to COM and are applicable to the respective output leads: HO or LO.
V
µA
V
A
Page 4
IR2110
B-28 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Lead
Symbol Description
V
DD
Logic supply
HIN Logic input for high side gate driver output (HO), in phase
SD Logic input for shutdown
LIN Logic input for low side gate driver output (LO), in phase
V
SS
Logic ground
V
B
High side floating supply
HO High side gate drive output
V
S
High side floating supply return
V
CC
Low side supply
LO Low side gate drive output
COM Low side retur n
V
B
SD
LIN
V
DD
PULSE
GEN
RSQ
V
SS
UV
DETECT
DELAY
HV
LEVEL
SHIFT
V
CC
PULSE
FILTER
UV
DETECT
VDD/V
CC
LEVEL
SHIFT
VDD/V
CC
LEVEL
SHIFT
LO
V
S
COM
RSQ
R
S
RQ
HIN
HO
Functional Block Diagram
Lead Definitions
Lead Assignments
14 Lead DIP 14 Lead DIP w/o Lead 4 16 Lead DIP w/o Leads 4 & 5 16 Lead SOIC (Wide Body)
IR2110 IR2110-1 IR2110-2 IR2110S
P art Number
Page 5
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-29
Thickness of Gate Oxide 800Å
Connections Material P oly Silicon
First Width 4 µm
La yer Spacing 6 µm
Thickness 5000Å
Material Al - Si (Si: 1.0% ±0.1%)
Second Width 6 µm
La yer Spacing 9 µm
Thickness 20,000Å
Contact Hole Dimension 8 µm X 8 µm
Insulation Layer Material PSG (SiO2)
Thickness 1.5 µm
P assivation Material PSG (SiO2)
(1) Thickness 1.5 µm
P assivation Material Proprietary*
(2) Thickness Proprietary*
Method of Saw Full Cut
Method of Die Bond Ablebond 84 - 1
Wire Bond Method Thermo Sonic
Material Au (1.0 mil / 1.3 mil)
Leadframe Material Cu
Die Area Ag
Lead Plating Pb : Sn (37 : 63)
P ackage Types 14 & 16 Lead PDIP / 16 Lead SOIC
Materials EME6300 / MP150 / MP190
Remarks: * Patent Pending
Device Information
Process & Design Rule HVDCMOS 4.0 µ m
Transistor Count 220
Die Siz e 100 X 117 X 26 (mil)
Die Outline
Page 6
IR2110
B-30 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient T est Circuit
Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition
Figure 6. Delay Matching Wa veform Definitions
Figure 3. Shutdown Waveform Definitions
SD
t
sd
HO
LO
50%
90%
HIN
LIN
t
r
t
on
t
f
t
off
HO
LO
50%
50%
90% 90%
10% 10%
HIN
LIN
HO
50% 50%
10%
LO
90%
MT
HOLO
MT
Page 7
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-31
Figure 9B. Shutdown Time vs. Voltage
Figure 8A. Turn-Off Time vs. T emperature Figure 8B. Turn-Off Time vs. V oltage
Figure 7A. T urn-On Time vs. T emperature Figure 7B. Turn-On Time vs. V oltage
Figure 9A. Shutdown Time vs. Temperature
0
50
100
150
200
250
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Turn-On Delay Time (n
s)
Max.
Typ.
0
50
100
150
200
250
-50 -25 0 25 50 75 100 125
Temperature (°C)
T
urn-On Delay Time (n
s)
Max.
Typ.
0
50
100
150
200
250
-50 -25 0 25 50 75 100 125
Temperature (°C)
Turn-Off Delay Time (n
s)
Max.
Typ.
0
50
100
150
200
250
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
T
urn-Off Delay Time (n
s)
Max.
Typ.
0
50
100
150
200
250
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
S
hutdown Delay time (n
s)
Max.
Typ.
0
50
100
150
200
250
-50 -25 0 25 50 75 100 125
Temperature (°C)
S
hutdown Delay Time (n
s)
Max.
Typ.
Page 8
IR2110
B-32 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Figure 12A. Logic “1” Input Threshold vs. Temperature Figure 12B. Logic “1” Input Threshold vs. Voltage
Figure 10A. Turn-On Rise Time vs. Temperature
Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage
Figure 10B. T urn-On Rise Time vs. V oltage
0
20
40
60
80
100
-50 -25 0 25 50 75 100 125
Temperature (°C)
Turn-On Rise Time (n
s)
Max.
Typ.
0
20
40
60
80
100
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
Turn-On Rise Time (n
s)
Max.
Typ.
0
10
20
30
40
50
-50 -25 0 25 50 75 100 125
Temperature (°C)
T
urn-Off Fall Time (ns
)
Max.
Typ.
0
10
20
30
40
50
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
T
urn-Off Fall Time (ns
)
Max.
Typ.
0.0
3.0
6.0
9.0
12.0
15.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
L
ogic "1" Input Threshold (V
)
Min.
0.0
3.0
6.0
9.0
12.0
15.0
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
L
ogic "1" Input Threshold (V
)
Min.
Page 9
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-33
Figure 13A. Logic “0” Input Threshold vs. Temperature Figure 13B. Logic “0” Input Threshold vs. Voltage
Figure 14A. High Level Output vs. Temperature Figure 14B. High Level Output vs. Voltag e
Figure 15B. Low Level Output vs. VoltageFigure 15A. Low Level Output vs. Temperature
0.0
3.0
6.0
9.0
12.0
15.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
L
ogic "0" Input Threshold (V
)
Max.
0.0
3.0
6.0
9.0
12.0
15.0
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
L
ogic "0" Input Threshold (V
)
Max.
0.00
1.00
2.00
3.00
4.00
5.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
H
igh Level Output Voltage (V
)
Max.
0.00
0.20
0.40
0.60
0.80
1.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
L
ow Level Output Voltage (V
)
Max.
0.00
1.00
2.00
3.00
4.00
5.00
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
High Level Output Voltage (V
)
Max.
0.0
3.0
6.0
9.0
12.0
15.0
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
L
ogic "1" Input Threshold (V
)
Min.
Page 10
IR2110
B-34 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Figure 16B. Offset Supply Current vs. VoltageFigure 16A. Offset Supply Current vs. Temperature
Figure 18A. V
CC
Supply Current vs. Temperature Figure 18B. V
CC
Supply Current vs. Voltage
Figure 17A. V
BS
Supply Current vs. Temperature Figure 17B. VBS Supply Current vs. Voltag e
0
125
250
375
500
625
10 12 14 16 18 20
V
CC
Fixed Supply Voltage (V)
V
CC
Supply Current (µA
)
Max.
Typ.
0
125
250
375
500
625
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
CC
Supply Current (µA
)
Max.
Typ.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
BS
Supply Current (µA
)
Max.
Typ.
0
100
200
300
400
500
10 12 14 16 18 20
V
BS
Floating Supply Voltage (V)
V
BS
Supply Current (µA
)
Max.
Typ.
0
100
200
300
400
500
0 100 200 300 400 500
V
B
Boost Voltage (V)
O
ffset Supply Leakage Current (µA
)
Max.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Temperature (°C)
O
ffset Supply Leakage Current (µA
)
Max.
Page 11
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-35
Figure 21A. Logic “0” Input Current vs. Temperature Figure 21B. Logic “0” Input Current vs. Volta ge
Figure 19A. VDD Supply Current vs. Temperature Figure 19B. V
DD
Supply Current vs. Voltage
Figure 20A. Logic “1” Input Current vs. Temperature Figure 20B. Logic “1” Input Current vs. Voltage
0
20
40
60
80
100
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
DD
Supply Current (µA
)
Max.
Typ.
0
20
40
60
80
100
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
V
DD
Supply Current (µA
)
Max.
Typ.
0
20
40
60
80
100
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "1" Input Bias Current (µA
)
Max.
Typ.
0
20
40
60
80
100
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
L
ogic "1" Input Bias Current (µA
)
Max.
Typ.
0.00
1.00
2.00
3.00
4.00
5.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
L
ogic "0" Input Bias Current (µA
)
Max.
0.00
1.00
2.00
3.00
4.00
5.00
5 7.5 10 12.5 15 17.5 20
V
DD
Logic Supply Voltage (V)
L
ogic "0" Input Bias Current (µA
)
Max.
Page 12
IR2110
B-36 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
6.0
7.0
8.0
9.0
10.0
11.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
CC
Undervoltage Lockout + (V
)
Max.
Typ.
Min.
6.0
7.0
8.0
9.0
10.0
11.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
BS
Undervoltage Lockout + (V
)
Max.
Typ.
Min.
Figure 22. VBS Undervoltage (+) vs. Temperature Figure 23. VBS Undervoltage (-) vs. Temperature
Figure 24. V
CC
Undervoltage (+) vs. Temperature Figure 25. VCC Undervoltage (-) vs. Temperature
Figure 26A. Output Source Current vs. Temperature Figure 26B. Output Source Current vs. Voltage
6.0
7.0
8.0
9.0
10.0
11.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
BS
Undervoltage Lockout - (V
)
Max.
Typ.
Min.
6.0
7.0
8.0
9.0
10.0
11.0
-50 -25 0 25 50 75 100 125
Temperature (°C)
V
CC
Undervoltage Lockout - (V
)
Max.
Typ.
Min.
0.00
1.00
2.00
3.00
4.00
5.00
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
O
utput Source Current (A
)
Min.
Typ.
0.00
1.00
2.00
3.00
4.00
5.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
Output Source Current (A
)
Min.
Typ.
Page 13
IR2110
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-37
Figure 28. IR2110 TJ vs. Frequency (IRFBC20)
R
GATE
= 33
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 29. IR2110 TJ vs. Frequency (IRFBC30)
R
GATE
= 22
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 27B. Output Sink Current vs. VoltageFigure 27A. Output Sink Current vs. Temperature
Figure 31. IR2110 T
J
vs. Frequency (IRFPE50)
R
GATE
= 10
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 30. IR2110 T
J
vs. Frequency (IRFBC40)
R
GATE
= 15
ΩΩ
ΩΩ
Ω, VCC = 15V
0.00
1.00
2.00
3.00
4.00
5.00
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
O
utput Sink Current (A
)
Min.
Typ.
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V
140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V
140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V
10V
0.00
1.00
2.00
3.00
4.00
5.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
O
utput Sink Current (A
)
Min.
Typ.
Page 14
IR2110
B-38 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
Figure 32. IR2110S TJ vs. Frequency (IRFBC20)
R
GATE
= 33
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 33. IR2110S T
J
vs. Frequency (IRFBC30)
R
GATE
= 22
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 36. Maximum V
S
Negative Offset vs.
V
BS
Supply Voltage
Figure 37. Maximum V
SS
Positive Offset vs.
V
CC
Supply Voltage
Figure 34. IR2110S TJ vs. Frequency (IRFBC40)
R
GATE
= 15
ΩΩ
ΩΩ
Ω, VCC = 15V
Figure 35. IR2110S TJ vs. Frequency (IRFPE50)
R
GATE
= 10
ΩΩ
ΩΩ
Ω, VCC = 15V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V
10V
0
25
50
75
100
125
150
1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz)
J
unction Temperature (°C
)
320V 140V 10V
-10.0
-8.0
-6.0
-4.0
-2.0
0.0
10 12 14 16 18 20
V
BS
Floating Supply Voltage (V)
V
S
Offset Supply Voltage (V
)
Typ.
0.0
4.0
8.0
12.0
16.0
20.0
10 12 14 16 18 20
V
CC
Fixed Supply Voltage (V)
V
SS
Logic Supply Offset Voltage (V
)
Typ.
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