Page 1
Data Sheet No. PD60162 Rev . W
IR2106(4)(S) & (PbF)
HIGH AND LOW SIDE DRIVER
Features
Floating channel designed for bootstrap operation
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V (IR2106(4))
•
Undervoltage lockout for both channels
•
3.3V, 5V and 15V input logic compatible
•
Matched propagation delay for both channels
•
Logic and power ground +/- 5V offset.
•
Lower di/dt gate driver for better noise immunity
•
Outputs in phase with inputs (IR2106)
•
• Also available LEAD-FREE
Description
The IR2106(4)(S) are high voltage,
high speed power MOSFET and
IGBT drivers with independent high
and low side referenced output channels. Proprietary HVIC and latch
immune CMOS technologies enable
ruggedized monolithic construction.
The logic input is compatible with
standard CMOS or LSTTL output,
down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high
side configuration which operates up to 600 volts.
2106/2301//2108//2109/2302/2304
Part
2106/2301
21064
2108 Internal 540ns COM
21084
2109/2302 Internal 540ns COM
21094
2304
Packages
8-Lead SOIC
14-Lead SOIC
Input
logic
HIN/LIN no none
HIN/LIN yes
IN/SD yes
HIN/LIN
Crossconduction
prevention
logic
yes
Dead-Time Ground Pins Ton/Toff
Programmable 0.54~5 µs
Programmable 0.54~5 µs
Internal 100ns
8-Lead PDIP
14-Lead PDIP
Feature Comparison
COM
VSS/COM
VSS/COM
VSS/COM
COM
220/200
220/200
750/200
160/140
Typical Connection
V
CC
V
V
CC
HIN
LIN
(Refer to Lead Assignments for correct pin configuration). This/These
diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for
proper circuit board layout.
HIN
LIN
HO
V
LOCOM
B
S
IR2106
up to 600V
TO
LOAD
up to 600V
HO
V
V
CC
HIN
LIN
V
SS
HIN
LIN
V
V
CC
B
V
S
IR21064
COM
SS
LO
TO
LOAD
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Page 2
IR2106(4)
(S) & ( PBF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
V
SS
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side floating absolute voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
High side floating output voltage VS - 0.3 V
Low side and logic fixed supply voltage -0.3 25
Low side output voltage -0.3 VCC + 0.3
Logic input voltage VSS - 0.3 V
Logic ground (IR21064 only) V
Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
(14 lead PDIP) — 1.6
(14 lead SOIC) — 1.0
Thermal resistance, junction to ambient (8 lead PDIP) — 125
(8 lead SOIC) — 200
(14 lead PDIP) — 75
(14 lead SOIC) — 120
Junction temperature — 150
Storage temperature -50 150
Lead temperature (soldering, 10 seconds) — 300
- 25 V
CC
CC
CC
B
+ 0.3
+ 0.3
+ 0.3
°C/W
V
W
°C
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Page 3
(
IR2106(4)
S & ( PbF)
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
and VSS offset rating are tested with all supplies biased at 15V differential.
S
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage IR2106(4) VS + 10 VS + 20
V
S
V
HO
V
CC
V
LO
V
IN
V
SS
T
A
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
High side floating supply offset voltage Note 1 600
High side floating output voltage V
Low side and logic fixed supply voltage IR2106(4) 10 20
Low side output voltage 0 V
Logic input voltage VSS V
Logic ground (IR21064 only) -5 5
Ambient temperature -40 125 °C
S
V
B
CC
CC
V
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C.
BIAS
)
Symbol Definition Min. Typ. Max. Units Test Conditions
t
on
t
off
MT Delay matching, HS & LS turn-on/off — 0 30
t
t
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Turn-on propagation delay — 220 300 VS = 0V
Turn-off propagation delay — 200 280 VS = 0V or 600V
nsec
Turn-on rise time — 1 5 0 220 VS = 0V
r
Turn-off fall time — 50 80 VS = 0V
f
Page 4
IR2106(4)
(S) & ( PBF)
Static Electrical Characteristics
V
(VCC, VBS) = 15V, VSS = COM and TA = 25°C unless otherwise specified. The VIL, VIH and IIN parameters are
BIAS
referenced to VSS/COM and are applicable to the respective input leads. The VO, IO and Ron parameters are referenced to
COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V
V
V
V
I
I
QBS
I
QCC
I
IN+
I
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
I
OH
OL
LK
IN-
O+
O-
Logic “1” input voltage (IR2106(4))
IH
Logic “0” input voltage (IR2106(4)) —
IL
High level output voltage, V
Low level output voltage, V
BIAS
O
- V
O
2.9
— 0.8 1.4 IO = 20 mA
— 0.3 0.6 IO = 20 mA
Offset supply leakage current — — 50 VB = VS = 600V
Quiescent VBS supply current 20 75 1 30 V
Quiescent VCC supply current 60 120 180 VIN = 0V or 5V
Logic “1” input bias current
VIN = 5V (IR2106(4))
—
Logic “0” input bias current
VCC and V
VIN = 0V (IR2106(4))
supply undervoltage positive going 8.0 8.9 9.8
BS
—
threshold
VCC and VBS supply undervoltage negative going 7.4 8.2 9.0
threshold
Hysteresis 0.3 0.7 —
Output high short circuit pulsed current 120 200 — VO = 0V ,
Output low short circuit pulsed current 250 350 — VO = 15V ,
—
—
5
—
—
20
2
0.8
V
µA
V
mA
VCC = 10V to 20V
= 10V to 20V
V
CC
= 0V or 5V
IN
PW ≤ 10 µs
PW ≤ 10 µs
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Page 5
Functional Block Diagrams
IR2106
HIN
LIN
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
DELAY
HV
LEVEL
SHIFTER
IR2106(4)
UV
PULSE
FILTER
DETECT
UV
DETECT
R
RSQ
(
S & ( PbF)
VB
HO
VS
VCC
LO
COM
)
VB
PULSE
FILTER
UV
DETECT
R
Q
R
S
HO
VS
HIN
IR21064
VSS/COM
LEVEL
SHIFT
PULSE
GENERATOR
HV
LEVEL
SHIFTER
VCC
UV
LIN
VSS/COM
LEVEL
SHIFT
DETECT
DELAY
LO
COM
VSS
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Page 6
IR2106(4)
(S) & ( PBF)
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase
LIN Logic input for low side gate driver output (LO), in phase
VSS Logic Ground (IR21064 only)
V
B
HO High side gate drive output
V
S
V
CC
LO Low side gate drive output
COM Low side return
High side floating supply
High side floating supply return
Low side and logic fixed supply
Lead Assignments
1
V
CC
2
HIN
3
LIN
4
COM
V
HO
V
LO
8
B
7
6
S
5
V
1
CC
HIN
2
LIN
3
COM
4
8 Lead PDIP 8 Lead SOIC
IR2106 IR2106S
V
HO
V
14
13
B
12
11
S
10
9
8
V
1
CC
HIN
2
LIN
3
4
VSS
5
COM
6
LO
7
14 Lead PDIP 14 Lead SOIC
V
1
CC
HIN
2
LIN
3
4
VSS
5
COM
6
LO
7
IR21064 IR21064S
HO
V
HO
V
V
V
LO
8
B
7
6
S
5
14
13
B
12
11
S
10
9
8
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Page 7
HIN
LIN
HO
LO
Figure 1. Input/Output Timing Diagram
IR2106(4)
(
S & ( PbF)
)
HIN
50%
50%
LIN
t
on
t
r
90% 90%
t
off
t
f
HO
LO
Figure 2. Switching Time Waveform Definitions
10% 10%
HIN
LIN
50%
MT
LO
50%
HO
10%
MT
90%
HOLO
Figure 3. Delay Matching Waveform Definitions
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Page 8
IR2106(4)
(S) & ( PBF)
500
400
300
Max
200
Typ.
100
Turn-on Propagation Delay (ns)
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 4A. Turn-on Propagation Delay
vs. T emperature
500
400
500
400
M ax.
300
Typ.
200
100
Turn-on Propagation Delay (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 4B. Turn-on Propagation Delay
vs. Supply Voltage
500
400
300
M ax.
200
Typ.
100
Turn-off Propagation Delay (ns)
0
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 5A. Turn-off Propagation Delay
vs. T emperature
M ax.
300
Typ.
200
100
Turn-off Propagation Delay (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 5B. Turn-off Propagation Delay
vs. Supply V oltage
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Page 9
IR2106(4)
(
S & ( PbF)
)
500
400
300
200
M ax.
Typ.
100
Turn-on Rise Time (n s)
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 6A. T urn-on Rise T ime
vs. Temperature
200
150
500
400
300
Max.
Typ.
200
100
Turn-on Ri se Ti me (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 6B. T urn-on Rise T ime
vs. Supply Voltage
200
150
100
Max.
50
Turn-off Fall Time (ns)
Typ.
0
-50-25 0 25 50 75100125
Te mperature (oC)
Figure 7A. Turn-off Fall T ime
vs. T emperature
Max.
100
Typ.
50
Turn-off Fall Time (ns)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 7B. Turn-off Fall T ime
vs. Supply V oltage
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Page 10
IR2106(4)
(S) & ( PBF)
8
7
6
5
4
Max.
3
I nput Voltage (V)
2
1
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 8A. Logic “1” Input Voltage
vs. T emperature
4.0
3.2
8
7
6
5
4
Max.
3
Input Voltage (V)
2
1
0
10 12 14 16 18 20
VCC Supply Voltage (V)
Figure 8B. Logic “1” Input Voltage
vs. Supply V oltage
4.0
3.2
2.4
1.6
I nput Voltage (V)
Min.
0.8
0.0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 9A. Logic “0” Input Voltage
vs. T emperature
2.4
1.6
Input Voltage ( V)
Min.
0.8
0.0
10 12 14 16 18 20
VCC Supply Voltage (V)
Figure 9B. Logic “0” Input Voltage
vs. Supply Voltage
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Page 11
IR2106(4)
(
S & ( PbF)
)
4
3
2
Max.
1
Typ.
High Level Out put Voltage (V)
0
-50 -25 0 25 50 75 100 125
Te mperature (oC)
Figure 10A. High Level Output Voltage
vs. Temperature
1.5
1.2
4
3
Max.
2
Typ.
1
High Level Output Voltage (V)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 10B. High Level Output Voltage
vs. Supply V oltage
1.5
1.2
0.9
0.6
Max.
0.3
Typ.
Low Level Output Voltage (V)
0
-50-25 0 255075100125
Te mperature (oC)
Figure 11A. Low Level Output Voltage
vs. Temperature
0.9
Max.
0.6
Typ.
0.3
Low Level Output V oltage (V)
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 11B. Low Level Output Voltage
vs. Supply V oltage
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Page 12
IR2106(4)
.
(S) & ( PBF)
500
400
300
200
100
M ax.
Offset Supply Leakage Current ( A)
0
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 12A. Offset Supply Leakage Current
vs. T emperature
400
300
500
400
300
200
100
Max.
Offset Supply Leakage Current ( A)
0
0 100 200 300 400 500 600
VB Boost Voltage (V)
Figure 12B. Offset Supply Leakage Current
vs. Supply V oltage
400
300
200
M ax.
Supply Current ( A)
100
BS
V
Typ.
Min.
0
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 13A. VBS Supply Current
vs. T emperature
200
Max.
Supply Current ( A)
100
BS
V
Typ.
Min
0
10 12 14 16 18 20
VBS Supply Voltage (V)
Figure 13B. VBS Supply Current
vs. Supply Voltage
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Page 13
IR2106(4)
.
(
S & ( PbF)
)
400
300
200
Max.
Typ.
100
V cc Supply Cur rent ( A)
Min.
0
-50 -25 0 25 50 75 100 125
Tem per ature (oC)
Figure 14A. Quiescent VCC Supply Current
vs. Temperature
60
50
400
300
200
Supply Current ( A)
100
CC
V
0
10 12 14 16 18 20
VCC Supply V oltage ( V)
Figure 14B. Quiescent VCC Supply Current
vs. V
60
50
Supply Voltage
CC
Max
Typ.
Min.
40
30
20
Max.
10
Logic "1" Input Current ( A)
Typ.
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 15A. Logic “1” Input Current
vs. Temperature
40
30
Max.
20
10
Logic "1" Input Current ( A)
Typ.
0
10 12 14 16 18 20
VCC Supply V oltage (V)
Figure 15B. Logic “1” Bias Current
vs. Supply V oltage
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Page 14
IR2106(4)
(S) & ( PBF)
5
4
3
Max.
2
1
Logic "0" I nput Current ( A)
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 16A. Logic “0” Input Current
vs. Temperature
12
11
5
4
3
M ax.
2
1
Logic "0" Input Current ( A)
0
10 12 14 16 18 20
VCC Supply Voltage ( V)
Figure 16B. Logic “0” Input Currentt
vs. Supply V oltage
11
10
10
M ax.
Typ.
9
Min.
UVLO Threshold (+) (V )
8
CC
V
7
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 17. VCC Undervoltage Threshold (+)
vs. T emperature
Max.
9
Typ.
8
Min.
UVLO Threshold (-) (V)
7
CC
V
6
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 18. VCC Undervoltage Threshold (-)
vs. T emperature
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Page 15
IR2106(4)
(
S & ( PbF)
)
12
11
M ax.
10
Typ.
9
Min.
UVLO Threshold (+) (V)
8
BS
V
7
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 19. VBS Undervoltage Threshold (+)
vs. T emperature
500
400
11
10
Max.
9
Typ.
8
Min.
7
UVLO Threshold (-) (V)
BS
V
6
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 20. VBS Undervoltage Threshold (-)
vs. T emperature
500
400
300
Typ.
200
Min.
100
Output Source Current ( A)
0
-50 -25 0 25 50 75 100 125
Temperatur e (oC)
Figure 21A. Output Source Current
vs. T emperature
300
200
Typ.
100
Output Source Current ( A)
Min.
0
10 12 14 16 18 20
V
Supply Voltage (V)
BIAS
Figure 21B. Output Source Current
vs. Supply Voltage
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Page 16
IR2106(4)
(S) & ( PBF)
600
500
Typ.
400
Min.
300
200
100
Output Sink Current ( A)
0
-50 -25 0 25 50 75 100 125
Temperature (oC)
Figure 22A. Output Sink Current
vs. T emperature
0
-2
Typ.
-4
-6
-8
Offset Supply Voltage (V)
S
V
-1 0
10 12 14 16 18 20
V
Floating Supply Voltage (V)
BS
600
500
400
300
Typ.
200
Min.
100
Output Sink Current ( A)
0
10 12 14 16 18 20
V
Supply Voltage (V )
BIAS
Figure 22B. Output Sink Currentt
vs. Supply V oltage
140
120
C)
100
o
80
60
Temprature (
40
20
1 10 100 1000
Frequency (KH z)
140V
70V
0V
Figure 23. Maximum VS Negative Offset
vs. Supply V oltage
Figure 24. IR2106 vs. Frequency (IRFBC20),
Rgate=33
ΩΩ
Ω, VCC=15V
ΩΩ
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Page 17
IR2106(4)
(
S & ( PbF)
)
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
Figure 25. IR2106 vs. Fre quen cy (IRFBC30),
R
=22Ω, VCC=15V
gate
140
120
C)
o
100
1 40V 70V
140V
70V
0V
140
120
C)
o
100
80
60
Temperature (
40
140V
70V
0V
20
1 10 100 1000
Frequency (KHz)
Figure 26. IR2106 vs. Frequency (IRFBC40),
R
=15Ω, VCC=15V
gate
140
0V
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KH z)
Figure 27. IR2106 vs. Frequency (IRFPE 50),
=10Ω, VCC=15V
R
gate
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
F igure 28. IR210 64 vs. Frequency (IRFBC20),
=33Ω, VCC=15V
R
gate
140V
70V
0V
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Page 18
IR2106(4)
g
g
(S) & ( PBF)
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
F igure 29. IR21064 vs. Frequency (IRFBC30),
=22Ω, VCC=15V
R
gate
140
120
C)
o
100
80
60
Temperature (
40
140V
140V
70V
0V
70V
0V
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
Figure 30. IR2106 4 vs. Frequency (IRFBC40),
R
=15Ω, VCC=15V
ate
140
120
C)
o
100
80
60
Temperature (
40
140V
70V
0V
140V
70V
0V
20
1 10 100 1000
Frequency (KHz)
Figure 31. IR21064 vs. Frequency (IRFPE50),
R
=10Ω, V
=15V
20
1 10 100 1000
Frequency (KHz)
Figure 32. IR2106S vs. Fre quency (IRFBC20),
R
=33Ω, VCC=15V
ate
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Page 19
IR2106(4)
g
g
(
S & ( PbF)
)
140
120
C)
100
o
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
F igure 33. IR21 06S vs. Frequency (IRFBC30),
=22Ω, VCC=15V
R
gate
140
140V 70V 0V
120
C)
o
100
140V
70V
0V
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
F igure 34. IR21 06S vs. Frequency (IRFBC40),
=15Ω, VCC=15V
R
ate
140
120
C)
o
100
140V 70V
0V
80
60
Tempreture (
40
20
1 10 100 1000
Frequency (KHz)
Figure 35. IR2106S vs. Frequ ency
(IRFPE50), R
=10Ω, VCC=15V
ate
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
Figure 36. IR21064S vs. Fre quency (IRFBC20),
=33Ω, VCC=15V
R
gate
140V
70V
0V
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Page 20
IR2106(4)
(S) & ( PBF)
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
Figure 37. IR21064 S vs. Frequency (IRFBC 30),
=22Ω, VCC=15V
R
gate
140
120
C)
o
100
140V
70V
0V
140
120
C)
o
100
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KH z)
F igure 38. IR21064S vs. Frequency (IRFBC4 0),
=15Ω, VCC=15V
R
gate
140V 70V
0V
1 40V
70V
0V
80
60
Temperature (
40
20
1 10 100 1000
Frequency (KHz)
Figure 39 . I R210 64S vs. Frequency (IRFPE50 ),
=10Ω, VCC=15V
R
gate
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Page 21
Case Outlines
IR2106(4)
(
S & ( PbF)
)
A
87
6
E
e
6X
8X b
0.25 [. 010] C A B
NOTES:
1. DIMENSIONI NG & TOLERANCING PER ASME Y14.5M-1994.
2. CO N TR O L L ING DIM E NS IO N : M IL L IME T E R
3. DIMENSIONS ARE SHOWN I N MILLI MET ERS [INCHES].
4. OUTLI NE CONFORMS TO JEDEC OUTLINE MS-012AA.
D B
5
65
4312
e1
A1
H
0.25 [. 010] A
A
C
0.10 [. 004]
8 Lead PDIP
6.46 [ . 255]
3X 1.27 [ .050 ]
y
8 Lead SOIC
01-3003 01
DIM
FOOTPRINT
8X 0.72 [ .028 ]
8X 1.78 [ .070 ]
MIN MAX
A
.0532
A1
b
c .0075 .0098 0.19 0.25
D
E
e
e1
H
K
L
y
.0688
.0040
.0098
.013
.020
.189
.1968
.1497
.1574
.050 BASIC
.025 BASIC 0.635 BASIC
.2284
.2440
.0099
.0196
.016
.050
0°
K x 4 5 °
8X L
8X c
7
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSI ONS.
MOLD P ROTRUSIONS NOT TO EXC EED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSI ONS.
MOLD P ROTRUSIONS NOT TO EXC EED 0.25 [.010].
7 DIMENSION IS THE LENG TH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-0021 11
8°
01-6014
(MS-001AB)
MILLIMETERSIN C H ES
MIN MAX
1.35
1.75
0.10
0.25
0.33
0.51
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
8°
0°
01-6027
(MS-012AA)
www.irf.com 21
Page 22
IR2106(4)
(S) & ( PBF)
01-6010
14 Lead PDIP
14 Lead SOIC (narrow body)
22 www.irf.com
01-3002 03
01-3063 00
(MS-001AC)
01-6019
(MS-012AB)
Page 23
IR2106(4)
LEADFREE PART MARKING INFORMATION
(
S & ( PbF)
)
Part number
Date code
Pin 1
Identifier
?
MARKING CODE
Lead Free Released
P
Non-Lead Free
Released
IRxxxxxx
YWW?
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2106 order IR2106
8-Lead SOIC IR2106S order IR2106S
14-Lead PDIP IR21064 order IR21064
14-Lead SOIC IR21064S order IR21064S
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
Leadfree Part
8-Lead PDIP IR2106 order IR2106PbF
8-Lead SOIC IR2106S order IR2106SPbF
14-Lead PDIP IR21064 order IR21064PbF
14-Lead SOIC IR21064S order IR21064SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 4/12/2004
www.irf.com 23
This product has been qualified per industrial level
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