Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
•
Undervoltage lockout
•
3.3V , 5V and 15V input logic compatib le
•
Cross-conduction prevention logic
•
Internally set deadtime
•
High side output in phase with input
•
Shut down input turns off both channels
•
Matched propagation delay for both channels
•
Description
The IR2104(s) are high voltage, high speed power
MOSFET and IGBT drivers with dependent high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to
3.3V logic. The output driv ers feature a high pulse current buffer stage designed f or minimum driver cross-conduction. The floating channel can be used to drive an Nchannel power MOSFET or IGBT in the high side configuration which operates from 10 to 600 volts.
Product Summary
V
OFFSET
+/ -130 mA / 270 mA
I
O
V
OUT
t
(typ.)680 & 150 ns
on/off
Deadtime (typ.)520 ns
600V max.
10 - 20V
Packages
8 Lead SOIC
IR2104S
8 Lead PDIP
IR2104
T ypical Connection
up to 600V
V
CC
V
CC
IN
SD
(Refer to Lead Assignment for correct pin configuration) This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
IN
SD
www.irf.com1
V
HO
V
LOCOM
B
TO
S
LOAD
Page 2
IR2104
(S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
SymbolDefinitionMin.Max.Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dVs/dtAllowable offset supply voltage transient—50V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side floating absolute voltage-0.3625
High side floating supply offset voltageVB - 25VB + 0.3
High side floating output voltageVS - 0.3V
Low side and logic fixed supply voltage-0.325
Low side output voltage-0.3VCC + 0.3
Logic input voltage (IN & SD)-0.3V
Package power dissipation @ TA ≤ +25°C(8 lead PDIP)—1.0
(8 lead SOIC)—0.625
Thermal resistance, junction to ambient(8 lead PDIP)—125
(8 lead SOIC)—200
Junction temperature—150
Storage temperature- 55150
Lead temperature (soldering, 10 seconds)—300
CC
B
+ 0.3
+ 0.3
V
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
SymbolDefinitionMin.Max.Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Note 1: Logic operational f or VS of -5 to +600V. Logic state held f or VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
High side floating supply absolute voltageVS + 10VS + 20
High side floating supply offset voltageNote 1600
High side floating output voltageV
Low side and logic fixed supply voltage1020
Low side output voltage0V
Logic input voltage (IN & SD)0V
Ambient temperature-40125
S
V
B
CC
CC
°C
www.irf.com
V
Page 3
IR2104
(S)
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
BIAS
SymbolDefinitionMin. Typ. Max. Units Test Conditions