Page 1
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
OptiMOS®2 Power-Transistor
Features
• Ideal for high-frequency dc/dc converters
1)
• Qualified according to JEDEC
• N-channel, logic level
• Excellent gate charge x R
• Superior thermal resistance
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
Type
IPD09N03LA IPF09N03LA IPS09N03LA IPU09N03LA
for target application
product (FOM)
DS(on)
Product Summary
V
DS
R
DS(on),max
I
D
(SMD version) 8.6
25 V
mΩ
50 A
Package
Marking
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Reverse diode dv /dt dv /dt
Gate source voltage
Power dissipation
Operating and storage temperature
P-TO252-3-11 P-TO252-3-23 P-TO251-3-11 P-TO251-3-1
09N03LA 09N03LA 09N03LA 09N03LA
=25 °C, unless otherwise specified
j
Value
=100 °C
=175 °C
2)
3)
GS
=25 Ω
50 A
45
350
75 mJ
6 kV/µs
±20 V
63 W
-55 ... 175 °C
I
D
I
D,pulse
E
AS
TC=25 °C
T
C
TC=25 °C
ID=45 A, R
=50 A, VDS=20 V,
I
D
di /dt =200 A/µs,
T
j,max
4)
V
GS
P
tot
, T
T
j
TC=25 °C
stg
IEC climatic category; DIN IEC 68-1 55/175/56
Rev. 2.0 page 1 2006-05-11
Page 2
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
Parameter Symbol Conditions Unit
Values
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
SMD version, device on PCB
Electrical characteristics, at T
=25 °C, unless otherwise specified
j
R
thJC
R
thJA
minimal footprint - - 75
6 cm
2
cooling area
5)
- - 2.4 K/W
--50
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
V
(BR)DSSVGS
V
GS(th)
I
DSS
=0 V, ID=1 mA
VDS=VGS, ID=20 µA
VDS=25 V, VGS=0 V,
T
=25 °C
j
V
=25 V, VGS=0 V,
DS
T
=125 °C
j
25 - - V
1.2 1.6 2
- 0.1 1 µA
- 10 100
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
Transconductance
1)
J-STD20 and JESD22
2)
Current is limited by bondwire; with an R
3)
See figure 3
4)
T
=150 °C and duty cycle D <0.25 for VGS<-5 V
j,max
5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
I
GSS
R
DS(on)VGS
R
G
g
fs
=2.4 K/W the chip is able to carry 67 A.
thJC
VGS=20 V, VDS=0 V
=4.5 V, ID=30 A
V
=4.5 V, ID=30 A,
GS
SMD version
=10 V, ID=30 A
V
GS
V
=10 V, ID=30 A,
GS
SMD version
|VDS|>2|ID|R
I
=30 A
D
DS(on)max
- 10 100 nA
-1215
- 11.8 14.8
- 7.4 8.8
- 7.2 8.6
-1-
,
23 46 - S
mΩ
Ω
Rev. 2.0 page 2 2006-05-11
Page 3
IPD09N03LA G IPF09N03LA G
g
IPS09N03LA G IPU09N03LA G
Parameter Symbol Conditions Unit
Values
min. typ. max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Char
e Characteristics
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
6)
C
C
C
t
t
t
t
Q
Q
Q
Q
iss
oss
rss
d(on)
r
d(off)
f
gs
g(th)
gd
sw
V
=0 V, VDS=15 V,
GS
f =1 MHz
V
=15 V, VGS=10 V,
DD
=25 A, R
I
D
V
DD
V
GS
G
=15 V, ID=25 A,
=0 to 5 V
=2.7 Ω
- 1235 1642 pF
- 474 630
-6192
- 7.0 10 ns
- 5.6 8.4
-2030
- 3.4 5.1
- 4.3 5.7 nC
- 2.0 2.6
- 2.8 4.3
- 5.2 7.3
Gate charge total
Gate plateau voltage
Gate charge total, sync. FET
Output charge
Q
V
Q
Q
g
plateau
g(sync)
oss
Reverse Diode
Diode continous forward current
Diode pulse current
Diode forward voltage
Reverse recovery charge
6)
See figure 16 for gate charge parameter definition
I
S
I
S,pulse
V
SD
Q
rr
VDS=0.1 V,
V
=0 to 5 V
GS
VDD=15 V, VGS=0 V
TC=25 °C
VGS=0 V, IF=50 A,
T
=25 °C
j
VR=15 V, IF=IS,
di
/dt =400 A/µs
F
-1013
- 3.5 - V
- 8.7 12 nC
-1014
- - 50 A
- - 350
- 0.97 1.2 V
- - 10 nC
Rev. 2.0 page 3 2006-05-11
Page 4
1 Power dissipation 2 Drain current
P
=f(TC) ID=f(TC); VGS≥10 V
tot
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
70
60
60
50
50
40
40
[W]
tot
P
30
[A]
D
I
30
20
20
10
0
0 50 100 150 200
TC [°C]
10
0
0 50 100 150 200
TC [°C]
3 Safe operating area 4 Max. transient thermal impedance
I
=f(VDS); TC=25 °C; D =0 Z
D
parameter: t
p
=f(tp)
thJC
parameter: D =tp/T
1000
1 µs
limited by on-state
[A]
D
I
resistance
100
DC
10
10 µs
100 µs
1 ms
10 ms
1
0.1 1 10 100
VDS [V]
10
0.5
1
0.2
0.1
[K/W]
thJC
0.05
Z
0.1
0.02
0.01
single pulse
0000001
0.01
10
-6
10
10
10
10
-3
-4
-5
-1
-2
10
tp [s]
10
0
Rev. 2.0 page 4 2006-05-11
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IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
5 Typ. output characteristics 6 Typ. drain-source on resistance
I
=f(VDS); Tj=25 °C R
D
parameter: V
GS
=f(ID); Tj=25 °C
DS(on)
parameter: V
GS
60
50
10 V
4.5 V
4.1 V
28
24
3.2 V
3.5 V
3.8 V
20
[A]
D
I
40
30
3.8 V
3.5 V
]
Ω
[m
DS(on)
R
16
12
20
8
3.2 V
10
3 V
2.8 V
0
0123
VDS [V]
4
0
0204060
ID [A]
7 Typ. transfer characteristics 8 Typ. forward transconductance
I
=f(VGS); |VDS|>2|ID|R
D
parameter: T
j
DS(on)max
gfs=f(ID); Tj=25 °C
4.1 V
4.5 V
10 V
100
80
60
50
40
60
[A]
D
I
[S]
fs
g
30
40
20
20
10
175 °C
0
012345
VGS [V]
25 °C
0
0 102030405060
ID [A]
Rev. 2.0 page 5 2006-05-11
Page 6
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
9 Drain-source on-state resistance 10 Typ. gate threshold voltage
R
=f(Tj); ID=30 A; VGS=10 V V
DS(on)
=f(Tj); VGS=V
GS(th)
parameter: I
DS
D
16
2.5
14
2
12
200 µA
10
]
Ω
[m
DS(on)
R
8
6
98 %
1.5
[V]
typ
GS(th)
V
1
20 µA
4
0.5
2
0
-60 -20 20 60 100 140 180
Tj [°C]
0
-60 -20 20 60 100 140 180
Tj [°C]
11 Typ. Capacitances 12 Forward characteristics of reverse diode
C =f(V
); VGS=0 V; f =1 MHz IF=f(VSD)
DS
4
10000
10
parameter: T
1000
j
25 °C
Ciss
3
1000
10
Coss
C [pF]
2
100
10
10
1
10
Crss
0 5 10 15 20 25 30
VDS [V]
100
175 °C
[A]
F
I
25 °C, 98%
10
1
0.0 0.5 1.0 1.5 2.0
VSD [V]
175 °C, 98%
Rev. 2.0 page 6 2006-05-11
Page 7
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
13 Avalanche characteristics 14 Typ. gate charge
V
IAS=f(tAV); R
parameter: T
=25 Ω
GS
j(start)
=f(Q
GS
parameter: V
); ID=25 A pulsed
gate
DD
100
150 °C
[A]
10
AV
I
1
1 10 100 1000
tAV [µs]
25 °C100 °C
12
10
8
[V]
6
GS
V
4
2
0
0 5 10 15 20
Q
15 Drain-source breakdown voltage 16 Gate charge waveforms
V
=f(Tj); ID=1 mA
BR(DSS)
gate
[nC]
5 V
15 V
20 V
29
V
GS
28
27
26
25
[V]
24
BR(DSS)
V
23
22
21
20
-60 -20 20 60 100 140 180
V
gs(th)
Q
g(th)
Q
gs
Q
g
Q
sw
Q
gd
Q
gate
Tj [°C]
Rev. 2.0 page 7 2006-05-11
Page 8
Package Outline PG-TO252-3-11
PG-TO252-3-11: Outline
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
Footprint: Packaging:
Rev. 2.0 page 8 2006-05-11
Page 9
Package Outline PG-TO252-3-23
PG-TO252-3-23: Outline
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
Footprint:
Rev. 2.0 page 9 2006-05-11
Page 10
Package Outline PG-TO251-3-11
PG-TO251-3-11: Outline
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
PG-TO251-3-21: Outline
Rev. 2.0 page 10 2006-05-11
Page 11
Package Outline PG-TO251-3-21
PG-TO251-3-11: Outline
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
PG-TO251-3-21: Outline
Rev. 2.0 page 11 2006-05-11
Page 12
IPD09N03LA G IPF09N03LA G
IPS09N03LA G IPU09N03LA G
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2006.
All Rights Reserved.
Attention please!
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values
stated herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com ).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Rev. 2.0 page 12 2006-05-11
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