Datasheet ipd80p03p4l-07_ds_10 Datasheet

IPD80P03P4L-07

OptiMOS®-P2 Power-Transistor

Features

• P-channel - Logic Level - Enhancement mode

• AEC qualified

• MSL1 up to 260°C peak reflow

• 175°C operating temperature

• Green package (RoHS compliant)

• 100% Avalanche tested

• Intended for reverse battery protection

Product Summary

V

DS

R

DS(on)

I

D

-30 V

6.8

-80 A

PG-TO252-3-11

mΩ

Type Package Marking

IPD80P03P4L-07 PG-TO252-3-11 4P03L07

Maximum ratings, at T

Parameter Symbol Conditions Unit

Continuous drain current

Pulsed drain current

Avalanche energy, single pulse

Avalanche current, single pulse

Gate source voltage

Power dissipation

=25 °C, unless otherwise specified

j

I

D

TC=25°C,

V

T

V

2)

I

D,pulse

E

AS

I

AS

V

GS

P

tot

TC=25°C

ID=-40A

-

- +5/-16 V

TC=25 °C

=-10V

GS

=100°C,

C

=-10V

GS

Value

1)

2)

-80 A

-65

-320

135 mJ

-80 A

88 W

T

Operating and storage temperature

, T

j

- -55 ... +175 °C

stg

IEC climatic category; DIN IEC 68-1 - - 55/175/56

Rev. 1.0 page 1 2008-07-30

IPD80P03P4L-07

Parameter Symbol Conditions Unit

Values

min. typ. max.

Thermal characteristics

Thermal resistance, junction - case

SMD version, device on PCB

Electrical characteristics, at T

2)

R

thJC

R

thJA

=25 °C, unless otherwise specified

j

- - - 1.7 K/W

minimal footprint - - 62

6 cm

2

cooling area

3)

--40

Static characteristics

Drain-source breakdown voltage

Gate threshold voltage

Zero gate voltage drain current

V

(BR)DSSVGS

V

GS(th)

I

DSS

=0V, ID= -1mA

VDS=VGS, ID=-130µA

VDS=-24V, VGS=0V,
T

=25°C

j

-30 - - V

-1.0 -1.5 -2.0

- -0.03 -1 µA

Gate-source leakage current

Drain-source on-state resistance

I

R

GSS

DS(on)

V

=-24V, VGS=0V,

DS

T

=125°C

j

2)

VGS=-16V, VDS=0V

VGS=-4.5V, ID=-40A

V

=-10V, ID=-80A

GS

- -10 -100

- - -100 nA

- 8.7 12

mΩ

- 5.6 6.8

Rev. 1.0 page 2 2008-07-30

IPD80P03P4L-07

y

g

Parameter Symbol Conditions Unit

Values

min. typ. max.

namic characteristics

D

Input capacitance

Output capacitance

Reverse transfer capacitance

Turn-on delay time

Rise time

Turn-off delay time

Fall time

Gate Char

e Characteristics

Gate to source charge

Gate to drain charge

Gate charge total

2)

C

iss

V

=0V, VDS=-25V,

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

2)

Q

gs

Q

gd

Q

g

GS

f =1MHz

V

=-15V,

DD

V

=-10V, ID=-80A,

GS

R

=3.5Ω

G

=-24V, ID=-80A,

V

DD

V

=0 to -10V

GS

- 4400 5700 pF

- 1220 1600

-3060

-8-ns

-4-

-15-

-60-

-1620nC

-816

-6380

Gate plateau voltage

V

plateau

- -3.7 - V

Reverse Diode

2)

Diode continous forward current

Diode pulse current

2)

Diode forward voltage

Reverse recovery time

Reverse recovery charge

1)

Current is limited by bondwire; with an R

2)

Defined by design. Not subject to production test.

3)

Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain

2)

2)

I

S

I

S,pulse

V

SD

t

rr

Q

rr

= 1.7K/W the chip is able to carry 92A at 25°C.

thJC

=25°C

T

C

VGS=0V, IF=-80A,
T

=25°C

j

V

=-15V, IF=-40A,

R

di

/dt =-100A/µs

F

connection. PCB is vertical in still air.

- - -80 A

- - -320

- - -1.3 V

-50-ns

-40-nC

Rev. 1.0 page 3 2008-07-30

1 Power dissipation 2 Drain current

P

= f(TC); V

tot

≤ -6V ID = f(TC); VGS ≤ -6V

GS

IPD80P03P4L-07

100

80

60

[W]

tot

P

40

20

0

0 50 100 150 200

TC [°C]

100

80

60

[A]

D

-I

40

20

0

0 50 100 150 200

TC [°C]

3 Safe operating area 4 Max. transient thermal impedance

I

= f(VDS); TC = 25 °C; D = 0 Z

D

parameter: t

p

1000

1 µs

10 µs

[A]

D

-I

100

100 µs

1 ms

10

1

0.1 1 10 100

-VDS [V]

= f(tp)

thJC

parameter: D =tp/T

1

10

0

10

0.5

0.1

-1

10

10

10

-2

-3

10

0.05

0.01

single pulse

-6

10

-5

[K/W]

thJC

Z

10

10

-3

-4

10

-2

10

-1

10

0

tp [s]

Rev. 1.0 page 4 2008-07-30

IPD80P03P4L-07

5 Typ. output characteristics 6 Typ. drain-source on-state resistance

I

= f(VDS); Tj = 25 °C R

D

parameter: V

GS

parameter: V

= (ID); Tj = 25 °C

DS(on)

GS

320

10V

5V

20

17

-4V

-4.5V

6 V

240

]

14

Ω

[m

DS(on)

R

11

[A]

D

-I

4.5V

160

4V

80

3.5V

3V

0

0123456

-VDS [V]

8

5

0 80 160 240 320

-ID [A]

7 Typ. transfer characteristics 8 Typ. drain-source on-state resistance

-5V

-10V

I

= f(VGS); V

D

parameter: T

320

240

[A]

160

D

-I

80

0

123456

= -6V R

DS

j

-55 °C

25 °C

175 °C

-VGS [V]

= f(Tj); ID = -80 A; V

DS(on)

= -10 V

GS

9

8

]

7

Ω

[m

DS(on)

R

6

5

4

-60 -20 20 60 100 140 180

Tj [°C]

Rev. 1.0 page 5 2008-07-30

9 Typ. gate threshold voltage 10 Typ. capacitances

IPD80P03P4L-07

V

GS(th)

= f(Tj); V

parameter: -I

2

1.5

[V]

1

GS(th)

-V

0.5

0

-60 -20 20 60 100 140 180

= V

GS

DS

D

1300µA

130µA

C = f(VDS); V

5

10

4

10

3

10

[pF]

= 0 V; f = 1 MHz

GS

Ciss

Coss

C

2

10

Crss

1

10

0 5 10 15 20 25 30

Tj [°C]

-VDS [V]

11 Typical forward diode characteristicis 12 Avalanche characteristics

IF = f(V

parameter: T

) I

SD

j

3

10

2

10

[A]

F

-I

1

10

0

10

175 °C

25 °C

0 0.2 0.4 0.6 0.8 1 1.2 1.4

-VSD [V]

= f(tAV)

AS

parameter: T

100

[A]

10

AV

-I

1

1 10 100 1000

j(start)

150°C

tAV [µs]

25°C

100°C

Rev. 1.0 page 6 2008-07-30

IPD80P03P4L-07

13 Avalanche energy 14 Drain-source breakdown voltage

E

= f(Tj) V

AS

parameter: I

D

BR(DSS)

= f(Tj); ID = -1 mA

300

250

20 A

33

32

200

31

[V]

150

[mJ]

AS

E

40 A

BR(DSS)

-V

30

100

80 A

50

0

25 75 125 175

29

28

-60 -20 20 60 100 140 180

Tj [°C]

15 Typ. gate charge 16 Gate charge waveforms

Tj [°C]

V

= f(Q

GS

gate

parameter: V

12

10

8

[V]

6

GS

-V

4

2

0

0 10203040506070

); ID = -80 A pulsed

DD

Q

gate

[nC]

-6V

-24V

V

V

GS

GS

Q

Q

g

g

Q

Q

gate

gate

Q

Q

Q

gs

gs

Q

gd

gd

Rev. 1.0 page 7 2008-07-30

IPD80P03P4L-07

r

Published by
Infineon Technologies AG
81726 Munich, Germany

© Infineon Technologies AG 2008

All Rights Reserved.

Legal Disclaime

The information given in this document shall in no event be regarded as a guarantee of conditions
or characteristics. With respect to any examples or hints given herein, any typical values stated
herein and/or any information regarding the application of the device, Infineon Technologies hereby
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties
of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact
the nearest Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the
express written approval of Infineon Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body or to support and/or maintain and sustain and/or protect human life.
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Rev. 1.0 page 8 2008-07-30

Revision History

Version Date Changes

IPD80P03P4L-07

Rev. 1.0 page 9 2008-07-30