Datasheet ipd22n08s2l-50_green Datasheet

Page 1
IPD22N08S2L-50
OptiMOS® Power-Transistor
Features
• N-channel Logic Level - Enhancement mode
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• Green package (lead free)
• Ultra low Rds(on)
• 100% Avalanche tested
Type Package Marking
IPD22N08S2L-50 PG-TO252-3-11 2N08L50
Product Summary
V
DS
R
DS(on),max
I
D
75 V
50
25 A
PG-TO252-3-11
mΩ
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Gate source voltage
Power dissipation
Operating and storage temperature
=25 °C, unless otherwise specified
j
I
D
TC=25 °C, VGS=10 V
T
V
1)
I
D,pulse
E
AS
V
GS
P
tot
T
, T
j
TC=25 °C
ID=22A
TC=25 °C
stg
=100 °C,
C
=10 V
GS
Value
27 A
1)
19
108
94 mJ
±20 V
75 W
-55 ... +175 °C
IEC climatic category; DIN IEC 68-1 55/175/56
Rev. 1.0 page 1 2006-07-18
Page 2
IPD22N08S2L-50
Parameter Symbol Conditions Unit
Values
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction ­ambient, leaded
SMD version, device on PCB
Electrical characteristics, at T
1)
R
thJC
R
thJA
R
thJA
=25 °C, unless otherwise specified
j
minimal footprint - - 75
2
cooling area
6 cm
2)
- - 2 K/W
- - 100
--50
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSSVGS
V
GS(th)
=0 V, ID= 1 mA
VDS=VGS, ID=31 µA
75 - - V
1.2 1.6 2.0
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
Drain-source on-state resistance
I
I
R
R
DSS
GSS
DS(on)
DS(on)
VDS=75 V, VGS=0 V, T
=25 °C
j
V
=75 V, VGS=0 V,
DS
T
=125 °C
j
2)
VGS=20 V, VDS=0 V
VGS=5 V, ID=50 A
VGS=10 V, ID=50 A,
- 0.01 1 µA
- 1 100
- 1 100 nA
- 58.0 65
mΩ
- 38.5 50.0 mΩ
Rev. 1.0 page 2 2006-07-18
Page 3
IPD22N08S2L-50
y
g
Parameter Symbol Conditions Unit
Values
min. typ. max.
namic characteristics
D
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Char
e Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
1)
C
iss
V
=0 V, VDS=25 V,
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
1)
Q
gs
Q
gd
Q
g
GS
f =1 MHz
V
=37 V, VGS=10 V,
DD
I
=22 A, R
D
=60 V, ID=22 A,
V
DD
V
=0 to 10 V
GS
=9.1 Ω
G
- 630 - pF
- 160 -
-75-
-6-ns
-20-
-26-
-10-
- 2 2.7 nC
-912
-2133
Gate plateau voltage
V
plateau
- 3.9 - V
Reverse Diode
1)
Diode continous forward current
Diode pulse current
1)
Diode forward voltage
Reverse recovery time
Reverse recovery charge
1)
Defined by design. Not subject to production test.
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
1)
1)
I
S
I
S,pulse
V
SD
t
rr
Q
rr
T
=25 °C
C
VGS=0 V, IF=22 A, T
=25 °C
j
VR=40 V, IF=IS,
di
/dt =100 A/µs
F
VR=40 V, IF=IS,
di
/dt =100 A/µs
F
connection. PCB is vertical in still air.
- - 25 A
- - 100
- 0.9 1.3 V
-44-ns
-66-nC
Rev. 1.0 page 3 2006-07-18
Page 4
1 Power dissipation 2 Drain current
P
= f(TC); V
tot
≥ 6 V ID = f(TC); V
GS
GS
IPD22N08S2L-50
≥ 10 V
80
30
70
25
60
20
50
[W]
40
tot
P
15
[A]
D
I
30
10
20
5
10
0
0 50 100 150 200
TC [°C]
0
0 50 100 150 200
TC [°C]
3 Safe operating area 4 Max. transient thermal impedance
I
= f(VDS); TC = 25 °C; D = 0 Z
D
parameter: t
p
1000
100
1 µs
10 µs
[A]
D
I
100 µs
1 ms
10
1
0.1 1 10 100
[V]
V
DS
= f(tp)
thJC
parameter: D =tp/T
0.5
0
10
0.1
0.05
-1
[K/W]
10
thJC
Z
10
10
0.01
-2
-3
-6
-7
10
10
single pulse
-5
10
10
-4
tp [s]
10
-3
10
10
10
0
-1
-2
Rev. 1.0 page 4 2006-07-18
Page 5
IPD22N08S2L-50
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
I
= f(VDS); Tj = 25 °C R
D
parameter: V
GS
parameter: V
= (ID); Tj = 25 °C
DS(on)
GS
100
10 V
170
3 V
3.5 V
4 V
150
130
[A]
D
I
5 V
50
4.5 V
110
[mW]
DS(on)
R
90
70
4 V
3.5 V
3 V
0
2.5 V
0246810
VDS [V]
50
30
0 10203040
ID [A]
7 Typ. transfer characteristics 8 Typ. Forward transconductance
4.5 V
5 V
10 V
I
= f(VGS); V
D
parameter: T
80
60
40
[A]
D
I
20
0
12345
= 6V g
DS
j
25 °C
175 °C
-55 °C
VGS [V]
= f(ID); Tj = 25°C
fs
parameter: g
40
30
[S]
20
fs
g
10
0
0 10203040
fs
ID [A]
Rev. 1.0 page 5 2006-07-18
Page 6
9 Typ. Drain-source on-state resistance 10 Typ. gate threshold voltage
IPD22N08S2L-50
R
= f(Tj) V
DS(ON)
GS(th)
= f(Tj); V
parameter: ID = 11 A; VGS = 10 V parameter: I
90
80
70
]
Ω
60
[m
DS(on)
50
R
40
30
20
-60 -20 20 60 100 140 180
Tj [°C]
2.5
2
1.5
[V]
GS(th)
V
1
0.5
0
-60 -20 20 60 100 140 180
= V
GS
DS
D
155 µA
31 µA
Tj [°C]
11 Typ. capacitances 12 Typical forward diode characteristicis
C = f(V
); V
= 0 V; f = 1 MHz IF = f(VSD)
GS
10
10
DS
4
3
[pF]
C
2
10
0 5 10 15 20 25 30
VDS [V]
Ciss
Coss
Crss
parameter: T
3
10
2
10
[A]
F
I
1
10
0
10
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
j
25 °C
175 °C
VSD [V]
Rev. 1.0 page 6 2006-07-18
Page 7
13 Typical avalanche energy 14 Typ. gate charge
E
= f(Tj) V
AS
parameter: I
D
GS
= f(Q
); ID = 22 A pulsed
gate
IPD22N08S2L-50
400
5.5 A
12
350
10
300
8
250
200
[mJ]
AS
E
11 A
[V]
GS
V
6
150
4
100
22 A
2
50
0
25 75 125 175
Tj [°C]
0
0102030
Q
15 Typ. drain-source breakdown voltage 16 Gate charge waveforms
gate
[nC]
15 V
60 V
V
BR(DSS)
= f(Tj); ID = 1 mA
90
85
80
[V]
BR(DSS)
V
75
70
65
-60 -20 20 60 100 140 180
Tj [°C]
V
V
GS
GS
Q
Q
g
g
Q
Q
gate
gate
Q
Q
Q
gs
gs
Q
gd
gd
Rev. 1.0 page 7 2006-07-18
Page 8
IPD22N08S2L-50
©
Published by Infineon Technologies AG Am Campeon 1-12 D-85579 Neubiberg
Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices, please contact your nearest Infineon Technologies Office (www.infineon.com)
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Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact your nearest Infineon Technologies Office.
Infineon Technologies' components may only be used in life-support devices or systems with the expressed written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0 page 8 2006-07-18
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