Page 1
TECHNICAL DATA
441
Octal 3-State Inverting
Bus Transceiver
High-Performance Silicon-Gate CMOS
The IN74HC620 is identical in pinout to the LS/ALS620. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
The IN74HC620 is a 3-state transceiver that is used for 2-way
communication between data buses. Two separate enables are
available. The enable for bus A to B is active-high, the enable for bus
B to A is active-low.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA
•
High Noise Immunity Characteristic of CMOS Devices
IN74HC620
ORDERING INFORMATION
IN74HC620N Plastic
IN74HC620DW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Control Inputs
Output
Enable
Direction Operation
L L Data Transmitted
from Bus B to
Bus A (inverted)
H H Data Transmitted
from Bus A to
Bus B (inverted)
H L Buses Isolated
L H (High Impedance
State)
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
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IN74HC620
442
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
V
IN
DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V
V
OUT
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
I
IN
DC Input Current, per Pin
±
20
mA
I
OUT
DC Output Current, per Pin
±
35
mA
I
CC
DC Supply Current, VCC and GND Pins
±
75
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg Storage Temperature -65 to +150
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
VIN, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types -55 +125
°
C
tr, t
f
Input Rise and Fall Time (Figure 1) VCC =2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
ns
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus.
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IN74HC620
443
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol Parameter Test Conditions V
25 °C
to
-55°C
≤
85
°
C
≤
125
°
C
Unit
V
IH
Minimum High-Level
Input Voltage
V
OUT
=0.1 V or VCC-0.1 V
I
OUT
≤
20 µA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
IL
Maximum Low Level Input Voltage
V
OUT
=0.1 V or VCC-0.1 V
I
OUT
≤
20 µA
2.0
4.5
6.0
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
OH
Minimum High-Level
Output Voltage
VIN=VIH or V
IL
I
OUT
≤
20 µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
VIN=VIH or V
IL
I
OUT
≤
6.0 mA
I
OUT
≤
7.8 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.7
5.2
V
OL
Maximum Low-Level
Output Voltage
VIN= VIL or V
IH
I
OUT
≤
20 µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN= VIL or V
IH
I
OUT
≤
6.0 mA
I
OUT
≤
7.8 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.4
0.4
I
IN
Maximum Input
Leakage Current
VIN=VCC or GND, Pin 1 or
19
6.0
±
0.1
±
1.0
±
1.0
µ
A
I
OZ
Maximum ThreeState Leakage
Current
Output in High-Impedance
State
V
IN
= V
IL
or V
IH
V
OUT=VCC
or GND,
I/O Pins
6.0
±
0.5
±
5.0
±
10
µ
A
I
CC
Maximum Quiesce nt
Supply Current
(per Package)
VIN=VCC or GND
I
OUT
=0µA
6.0 8 .0 80 160
µ
A
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IN74HC620
444
AC ELECTRICAL CHARACTERISTICS
(CL=50pF,Input tr=tf=6.0 ns)
V
CC
Guaranteed Limit
Symbol Parameter V
25 °C
to
-55°C
≤85°C≤
125°C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, A to B , B to A
(Figures 1 and 3)
2.0
4.5
6.0
100
20
17
125
35
21
150
30
26
ns
t
PLZ
, t
PHZ
Maximum Propagation Delay , Direction or
Output Enable to A or B (Figures 2 and 4)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
PZL
, t
PZH
Maximum Propagation Delay , Direction or
Output Enable to A or B (Figures 2 and 4)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
ns
C
IN
Maximum Input Capacitance (Pin 1 or Pin 19) - 10 10 10 pF
C
OUT
Maximum Three-State I/O Capacitance
(I/O in High-Impedance State)
-151515pF
Power Dissipation Capacitance (Per Transceiver
Channel)
Typical @25°C,V
CC
=5.0 V
C
PD
Used to determine the no-load dynamic power
consumption:
P
D=CPDVCC
2
f+ICCV
CC
40 pF
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
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IN74HC620
445
Figure 3. Test Circuit Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
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