Page 1
TECHNICAL DATA
Presettable 4-Bit Binary UP/DOWN Counter
High-Performance Silicon-Gate CMOS
The IN74HC193 is identical in pinout to the LS/ALS193. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
The counter ha s two separate clo ck inputs, a Co unt Up Cloc k and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When
the Parallel Load input is taken low the data is loaded independently of
either clock input. This feature allows the counters to be used as
devide-by-n by modifying the count lenght with the preset i nputs. In
addition the counter can also be cleared. This is accomplished by
inputting a high on the Master Reset input. All 4 internal stages are set
to low independently of either clock input.Both a Terminal Count
Down (TC
enable cascading of both up and down counting functions. The TC
output produces a negative going pulse when the counter underflows
and TC
be cascaded by connecting the TC
the Count Up Clock and Count Down Clock inputs, respectively, of the
next device.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA
•
High Noise Immunity Characteristic of CMOS Devices
) and Terminal Count Up (TCU) Outputs are provided to
D
outputs a pulse when the counter overflows. The counter can
U
and TCD outputs of one device to
U
ORDERING INFORMATION
IN74HC193N Plastic
IN74HC193D SOIC
TA = -55° to 125° C for all packages
D
PIN ASSIGNMENT
IN74HC193
258
LOGIC DIAGRAM
PIN 16 =V
PIN 8 = GND
CC
Page 2
IN74HC193
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
I
OUT
I
CC
P
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
20
±
25
±
50
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
mA
mA
mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
VIN, V
T
A
tr, t
f
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
Input Rise and Fall Time (Figure 1) VCC =2.0 V
IN
or V
OUT
)≤VCC.
V
CC
V
CC
and V
IN
=4.5 V
=6.0 V
OUT
should be constrained to the range
0
0
0
CC
1000
500
400
V
°
C
ns
CC
).
259
Page 3
IN74HC193
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
V
V
OH
V
OL
I
IN
Minimum High-Level
IH
Input Voltage
Maximum Low -
IL
Level Input Voltage
Minimum High-Level
Output Voltage
Maximum Low- Level
Output Voltage
Maximum Input
V
=0.1 V or VCC-0.1 V
OUT
≤
I
20 µA
OUT
V
=0.1 V or VCC-0.1 V
OUT
≤
I
20 µA
OUT
VIN=VIH or V
≤
I
OUT
VIN=VIH or V
≤
I
OUT
≤
I
OUT
VIN=VIH or V
≤
I
OUT
VIN=VIH or V
≤
I
OUT
≤
I
OUT
IL
20 µA
IL
4.0 mA
5.2 mA
IL
20 µA
IL
4.0 mA
5.2 mA
VIN=VCC or GND 6.0
Leakage Current
I
CC
Maximum Quiescent
Supply Current
VIN=VCC or GND
=0µA
I
OUT
(per Package)
V
CC
Guaranteed Limit
25 °C
to
≤
85
°
C
≤
125
°
-55°C
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±
0.1
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±
1.0
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±
6.0 8.0 80 160
C
1.0
Unit
V
V
V
V
µ
A
µ
A
FUNCTION TABLE
Inputs Mode
MR PL CP
CP
U
D
HX X X Reset(Asyn.)
L L X X Preset(Asyn.)
L H H No Count
L H H Count Up
L H H Count Down
L H H No Count
X = don’t care
260
The IN74HC193 is an UP/DOWN MODULO-
16 Binary Counte r.
Logic equati ons
For Terminal Count:
TC
= Q0 • Q1 • Q2 • Q3 • CP
U
TCD = Q0 • Q1 • Q2 • Q3 • CP
U
D
Page 4
IN74HC193
AC ELECTRICAL CHARACTERISTICS
(CL=50pF,Input tr=tf=6.0 ns)
Symbol Parameter V
f
max
Minimum Clock Frequency (50 % D ut y Cycle)
(Figures 1 and 6)
t
PLH
, t
Maximum Propagati on Delay, Clock to Q
PHL
(Figures 1 and 6)
t
PLH
, t
Maximum Propagation Delay, PL to Q
PHL
(Figures 3 and 6)
t
PLH
, t
Maximum Propagation Delay, Clock to Terminal
PHL
Count (Figures 2 and 6)
t
TLH
, t
Maximum Output Transition Time,Any Output
THL
(Figures 1 and 6)
C
IN
Maximum Input Capacitance - 10 10 10 pF
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
CC
Guaranteed Limit
25 °C to
-55°C
12
36
43
215
43
37
215
43
37
125
25
21
75
15
13
≤85°C≤
3.2
16
19
270
54
46
270
54
46
155
31
26
95
20
18
125°C
2.6
13
15
325
65
55
325
65
55
190
38
32
110
23
20
Unit
MHz
ns
ns
ns
ns
Power Dissipation Capacitance (Per Package)
C
PD
TIMING REQUIREMENTS
Used to determine the no-load dynamic power
consumption: P
D=CPDVCC
2
f+ICCV
CC
(CL=50pF,Input tr=tf=6.0 ns)
Symbol Parameter V
t
su
Minimum Setup Time, Pn to PL
(Figure 4)
t
h
Minimum Hold Time, P n to PL
(Figure 4)
t
w
t
w
Minimum Pulse Width, Clock (Figure1)2.0
Minimum Pul se Width, PL
(Figure 3)
t
w
Minimum Pul se Width, MR
(Figure 5)
tr, t
Minimum Inp ut Ris e and Fall Times
f
(Figure 1)
V
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
CC
Typical @25°C,V
Guaranteed Limit
25 °C to -55°C
100
20
18
0
0
0
150
30
26
100
20
17
100
20
17
100
500
400
=5.0 V
CC
60 pF
≤85°
125
35
22
0
0
0
190
38
33
125
25
26
125
25
26
100
500
400
≤
C
125°C
150
30
26
0
0
0
225
45
38
150
30
26
150
30
26
100
500
400
Unit
ns
ns
ns
ns
ns
ns
261
Page 5
IN74HC193
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
Figure 3. Switching Waveforms Figure 4. Switching Waveforms
Figure 5. Switching Waveforms Figure 6. Test Circuit
262
Page 6
TIMING DIAGRAM
IN74HC193
263
Page 7
IN74HC193
EXPANDED LOGIC DIAGRAM
264
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