Datasheet IN74HC154N, IN74HC154DW Datasheet (INTEGRAL) [en, hu]

Page 1
TECHNICAL DATA
1-of-16 Decoder/Demultiplexer
High-Performance Silicon-Gate CMOS
The IN74HC154 is identical in pinout to the LS/ALS154. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
This device, when enabled, selects one of 16 active-low outputs. Two active-low Chip Selects are provided to facilitate the chip­select, demultiplexing, and cascading functions. When either Chip Select is high, all outputs are high. The demultiplexing function is accomplished by using the Address inputs to select the desired device output.
The IN74HC154 is primarily used for memory address decoding and data routing applications.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA
•
High Noise Immunity Characteristic of CMOS Devices
IN74HC154
ORDERING INFORMATION
IN74HC154N Plastic
IN74HC154DW SOIC
TA = -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
176
PIN 24 =V
PIN 12 = GND
CC
Page 2
IN74HC154
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
I
OUT
I
CC
P
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
20
±
25
±
50
750 500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
mA mA mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
VIN, V
T
A
tr, t
f
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V Unused outputs must be left open.
DC Supply Voltage (Referenced to GND) 2.0 6.0 V DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125 Input Rise and Fall Time (Figure 1) VCC =2.0 V
IN
or V
OUT
)≤VCC.
V
CC
V
CC
and V
IN
=4.5 V
=6.0 V
OUT
should be constrained to the range
0 0 0
CC
1000
500 400
V
°
C
ns
CC
).
177
Page 3
IN74HC154
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
V
V
OH
V
OL
I
IN
Minimum High-Level
IH
Input Voltage
Maximum Low -
IL
Level Input Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Output Voltage
Maximum Inp ut
V
=0.1 V or VCC-0.1 V
OUT
≤
I
20 µA
OUT
V
=0.1 V or VCC-0.1 V
OUT
 ≤
I
20 µA
OUT
VIN=VIH or V
 ≤
I
OUT
VIN=VIH or V
 ≤
I
OUT
 ≤
I
OUT
VIN=VIH or V
 ≤
I
OUT
VIN=VIH or V
 ≤
I
OUT
 ≤
I
OUT
IL
20 µA
IL
4.0 mA
5.2 mA
IL
20 µA
IL
4.0 mA .5.2 mA
VIN=VCC or GND 6.0
Leakage Current
I
CC
Maximum Quiescen t Supply Current
VIN=VCC or GND
=0µA
I
OUT
(per Package)
V
CC
Guaranteed Limit
25 °C
to
≤
85
°
C
≤
125
°
-55°C
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±
0.1
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±
1.0
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±
6.0 8.0 80 160
C
1.0
Unit
V
V
V
V
µ
A
µ
A
178
Page 4
IN74HC154
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter V
(CL=50pF,Input tr=tf=6.0 ns)
V
CC
Guaranteed Limit
25 °C to
≤85°
C≤125°C
Unit
-55°C
t
t
t
TLH
PLH
PLH
, t
, t
, t
C
IN
C
PD
Maximum Propagation Delay, Input A to
PHL
Output Y (Figures 1and 3)
Maximum Propagation Delay , CS to
PHL
Output Y (Figures 2 and 3)
Maximum Output Transition Time, Any Output
THL
(Figures 2 and 3)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
190
38 32
175
35 30
75 15 13
240
48 41
220
44 37
95 19 16
Maximum Input Capacitance - 10 10 10 pF
Power Dissipation Capacitance (Per Package) Used to determine the no-load dynamic power
consumption: P
D=CPDVCC
2
f+ICCV
CC
Typical @25°C,V
80 pF
=5.0 V
CC
285
57 48
265
53 45
110
22 19
ns
ns
ns
FUNCTION TABLE
Inputs Outputs
CS1 CS2 A3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15
LLLLLLLHHHHHHHHHHHHHHH LLLLLHHLHHHHHHHHHHHHHH LLLLHLHHLHHHHHHHHHHHHH LLLLHHHHHLHHHHHHHHHHHH LLLHLLHHHHLHHHHHHHHHHH LLLHLHHHHHHLHHHHHHHHHH LLLHHLHHHHHHLHHHHHHHHH LLLHHHHHHHHHHLHHHHHHHH LLHLLLHHHHHHHHLHHHHHHH LLHLLHHHHHHHHHHLHHHHHH LLHLHLHHHHHHHHHHLHHHHH LLHLHHHHHHHHHHHHHLHHHH LLHHLLHHHHHHHHHHHHLHHH LLHHLHHHHHHHHHHHHHHLHH LLHHHLHHHHHHHHHHHHHHLH LLHHHHHHHHHHHHHHHHHHHL LHXXXXHHHHHHHHHHHHHHHH HLXXXXHHHHHHHHHHHHHHHH HHXXXXHHHHHHHHHHHHHHHH
X = Don’t Care
179
Page 5
IN74HC154
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
180
Figure 3. Test Circuit
Page 6
EXPANDED LOGIC DIAGRAM
IN74HC154
181
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