Page 1
TECHNICAL DATA
Dual J-K Flip-Flop
with Set and Reset
High-Speed Silicon-Gate CMOS
The IN74ACT109 is identical in pinout to the LS/ALS109,
HC/HCT109. The IN74ACT109 may be used as a level converter for
interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of two J-K flip-flops with individual set, reset,
and clock inputs. Changes at the inputs are reflected at the outputs with
the next low-to-high transition of the clock. Both Q to Q outputs are
available from each flip-flop.
•
TTL/NMOS Compatible Input Levels
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 4.5 to 5.5 V
•
Low Input Current: 1.0 µA; 0.1 µA @ 25°C
•
Outputs Source/Sink 24 mA
IN74ACT109
ORDERING INFORMATION
IN74ACT109N Plastic
IN74ACT109D SOIC
TA = -40° to 85° C for all
packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=V
PIN 8 = GND
CC
FUNCTION TABLE
Inputs Outputs
Set Reset Clock J K Q Q
LH XXXHL
HL XXXLH
LL XXXH*H
HH LLLH
H H H L Toggle
H H L H No Change
HH HHHL
H H L X X No Change
X = Don’t care
*
Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go hi gh
simultaneously.
*
122
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IN74ACT109
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
I
OUT
I
CC
P
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
20
±
50
±
50
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
mA
mA
mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
VIN, V
T
J
T
A
I
OH
I
OL
tr, t
f
*
VIN from 0.8 V to 2.0 V
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
DC Supply Voltage (Referenced to GND) 4.5 5.5 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Junction Temperature (PDIP) 140
Operating Temperature, All Package Types -40 +85
Output Current - High -24 mA
Output Current - Low 24 mA
Input Rise and Fall Time
(except Schmitt Inputs)
IN
or V
OUT
)≤VCC.
*
V
V
=4.5 V
CC
=5.5 V
CC
and V
IN
0
0
should be constrained to the range
OUT
10
8.0
CC
V
°
C
°
C
ns/V
CC
).
123
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IN74ACT109
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
Minimum High-Level
IH
V
=0.1 V or VCC-0.1 V 4 .5
OUT
Input Voltage
V
Maximum Low -
IL
V
=0.1 V or VCC-0.1 V 4 .5
OUT
Level Input Voltage
V
OH
Minimum High-Level
I
OUT
≤ -50 µA
Output Voltage
*
VIN=VIH or V
IL
IOH=-24 mA
I
=-24 mA
OH
V
OL
Maximum Low-Level
I
OUT
≤ 50 µA
Output Voltage
*
VIN=VIH or V
IL
IOL=24 mA
I
=24 mA
OL
I
IN
Maximum Input
VIN=VCC or GND 5.5
Leakage Current
∆
I
CCT
I
OLD
Additional Max
I
/Input
CC
+Minimum Dynamic
V
IN=VCC
V
OLD
- 2.1 V 5.5 1.5 mA
=1.65 V Max 5.5 75 mA
Output Current
I
OHD
+Minimum Dynamic
V
=3.85 V Min 5.5 -75 mA
OHD
Output Current
I
CC
Maximum Quiescent
VIN=VCC or GND 5.5 4.0 40
Supply Current
(per Package)
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
V
5.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
CC
Guaranteed Limits
25 °C-40
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36
±
0.1
°
C to
85°C
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±
1.0
Unit
V
V
V
V
µ
A
µ
A
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IN74ACT109
AC ELECTRICAL CHARACTERISTICS
Symbol Parameter
f
t
t
t
t
C
C
max
PLH
PHL
PLH
PHL
IN
PD
Maximum Clock Frequency (Figur e 1) 145 125 MHz
Propagation Delay , Clock to Q or Q
(Figure 1)
Propagation Delay , Clock to Q or Q
(Figure 1)
Propagation Delay , Set or Reset to Q or Q (Figure2)2.5 9.5 2.0 10.5 ns
Propagation Delay , Set or Reset to Q or Q (Figure2)2.5 10.0 2.0 11.5 ns
Maximum Input Capacitance 4.5 4.5 pF
Power Dissipation Capacitance 35 pF
(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)
Guaranteed Limits
25 °C-40
°
C to 85°C
Min Max Min Max
4.0 11.0 3.5 13.0 ns
3.0 10.0 2.5 11.0 ns
Typical @25°C,VCC=5.0 V
Unit
TIMING REQUIREMENTS
(VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)
Symbol Parameter
t
su
t
h
t
w
Minimum Setup Time, J or K to Clock (Figure 3) 2.0 2.5 ns
Minimum Hold Time, Clock to J or K (Figure 3) 2.0 2.0 ns
Minimum Pulse Width, Set, Reset, Clock
(Figures 1,2)
t
rec
Minimum Rec overy Time, Se t or Reset to Clock
(Figure 2)
Guaranteed Limits
25 °C-40
°
C to
Unit
85°C
5.0 6.0 ns
00ns
125
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IN74ACT109
Figure 1. Switching Waveform Figure 2. Switching Waveform
Figure 3. Switching Waveform
EXPANDED LOGIC DIAGRAM
126
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