The IN74AC161 is identical in pinout to the LS/ALS161,
HC/HCT161. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS
outputs.
The IN74AC161 is programmable 4-bit synchronous modulo-16
counter that feature parallel Load, asynchronous Reset, a Carry Output
for cascading and count-enable controls.
The IN74AC161 is binary counter with asynchronous Reset.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA; 0.1 µA @ 25° C
•
High Noise Immunity Characteristic of CMOS Devices
•
Outputs Source/Sink 24 mA
LOGIC DIAGRAM
TECHNICAL DATA
IN74AC161
ORDERING INFORMATION
IN74AC161N Plastic
IN74AC161D SOIC
TA = -40° to 85° C for all
packages
PIN ASSIGNMENT
Outputs
PIN 16 =V
PIN 8 = GND
ResetLoadEnablePEnableTClockQ0Q1Q2Q3 Function
LXXXXLLLLReset to “0”
HLXXP0P1P2P3Preset Data
HHXLNo changeNo count
HHLXNo changeNo count
HHHHCount upCount
HXXXNo changeNo count
X=don’t care
P0,P1,P2,P3 = logic level of Data inputs
Ripple Carry Out = Enable T • Q0 • Q1 • Q2 • Q3
CC
FUNCTION TABLE
InputsOutputs
213
IN74AC161
MAXIMUM RATINGS
*
SymbolParameterValueUnit
V
CC
V
V
OUT
I
IN
I
OUT
I
CC
P
DC Supply Voltage (Referenced to GND)-0.5 to +7.0V
DC Input Voltage (Referenced to GND)-0.5 to VCC +0.5V
IN
DC Output Voltage (Referenced to GND)-0.5 to VCC +0.5V
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
20
±
50
±
50
750
500
TstgStorage Temperature-65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
mA
mA
mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterMinMaxUnit
V
CC
VIN, V
T
J
T
A
I
OH
I
OL
tr, t
f
*
VIN from 30% to 70% V
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
DC Supply Voltage (Referenced to GND)2.06.0V
DC Input Voltage, Output Voltage (Referenced to GND)0V
OUT
Junction Temperature (PDIP)140
Operating Temperature, All Package Types-40+85
Output Current - High-24mA
Output Current - Low24mA
Input Rise and Fall Time
(except Schmitt Inputs)
IN
or V
OUT
)≤VCC.
CC
*
V
V
V
=3.0 V
CC
=4.5 V
CC
=5.5 V
CC
and V
IN
0
0
0
should be constrained to the range
OUT
CC
150
40
25
V
°
C
°
C
ns/V
CC
).
214
IN74AC161
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
SymbolParameterTest ConditionsV
V
Minimum High-Level
IH
V
=0.1 V or VCC-0.1 V3 .0
OUT
Input Voltage
V
Maximum Low -
IL
V
= VCC-0.1 V or 0.1 V3.0
OUT
Level Input Voltage
V
OH
Minimum High-Level
I
OUT
≤ -50 µA
Output Voltage
*
VIN=VIH or V
IL
IOH=-12 mA
I
=-24 mA
OH
I
=-24 mA
OH
V
OL
Maximum Low-Level
I
OUT
≤ 50 µA
Output Voltage
*
VIN=VIH or V
IL
IOL=12 mA
I
=24 mA
OL
I
=24 mA
OL
I
IN
Maximum Input
VIN=VCC or GND5.5
Leakage Current
I
OLD
+Minimum Dynamic
V
=1.65 V Max5.575mA
OLD
Output Current
I
OHD
+Minimum Dynamic
V
=3.85 V Min5.5-75mA
OHD
Output Current
I
CC
Maximum Quiescent
VIN=VCC or GND5.58.08.0
Supply Current
(per Package)
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Note: I
IN
and I
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
V
4.5
5.5
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
CC
Guaranteed Limits
25 °C-40
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±
0.1
°
C to
85°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±
1.0
CC
Unit
V
V
V
V
µ
A
µ
A
215
IN74AC161
AC ELECTRICAL CHARACTERISTICS
(CL=50pF,Input tr=tf=3.0 ns)
SymbolParameterV
f
t
t
t
max
PLH
PHL
PLH
Maximum Clock Frequency (Figur e 1)3.3
Propagat ion Delay, Clock to Q (Figure 1)3.3
Propagat ion Delay, Clock to Q (Figure 1)3.3
Propagation Delay, Clock to Ripple Carry Out
(Figure 1)
t
PHL
Propagation Delay, Clock to Ripple Carry Out
(Figure 1)
t
PLH
Propagation Delay, Enable T to Ripple Carry
Out (Figure 3)
t
PHL
Propagation Delay, Enable T to Ripple Carry
Out (Figure 3)
t
t
PHL
PHL
Propagation Delay, Reset to Q (Figure 2)3.3
Propagation Delay, Reset to Ripple Carry Out
(Figure 2)
C
IN
Maximum Input Capacitance5.04.54.5pF
*
V
CC
MinMaxMinMax
5.070110
5.0
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5.0
3.3
5.0
Guaranteed Limits
25 °C-40
°
C to
85°C
60
95
2.0
1.5
1.5
1.5
3.0
2.0
3.5
2.0
2.0
1.5
2.5
2.0
2.0
1.5
3.5
2.5
12.0
9.0
12.0
9.5
15.0
10.5
14.0
11.0
9.5
6.5
11.0
8.5
12.0
9.5
15.0
13.0
1.5
1.0
1.5
1.5
2.5
1.5
2.5
2.0
1.5
1.0
2.0
1.5
1.5
1.5
3.0
2.5
13.5
9.5
13.0
10.0
16.5
11.5
15.5
11.5
11.0
7.5
12.5
9.5
13.5
10.0
17.5
13.5
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
C
PD
*
Voltage Range 3.3 V is 3.3 V ±0.3 V
Power Dissipation Capacitance45pF
Voltage Range 5.0 V is 5.0 V ±0.5 V
216
Typical @25°C,VCC=5.0 V
IN74AC161
TIMING REQUIREMENTS
(CL=50pF,Input tr=tf=3.0 ns)
SymbolParameterV
t
su
Minimum Setup Time, Preset Data Inputs to
Clock (Figure 4)
t
h
Minimum Hold Time, Clock to Preset Data Inputs
(Figure 4)
t
su
t
h
t
su
Minimum Setup Time,Load to Clock (Figure 4)3.3
Minimum Hold Time, Cl ock to Load (Figure 4)3.3
Minimum Setup Time, Enable T or Enable P to
Clock (Figure 5)
t
h
Minimum Hold Time, C lock to Enable T or
Enable P (Figure 5)
t
w
t
w
t
w
t
rec
*
Voltage Range 3.3 V is 3.3 V ±0.3 V
Minimum Pulse Width, Clock (Load) (Figure 1)3.3
Minimum Pulse Width, Cl ock (Count)(F igure 1)3.3
Minimum Pulse Width, Reset (Figure 2)3.3
Minimum Recovery Time, Reset t o Clock (Figure2)3.3