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ILX718K
22 pin DIP (Plastic)
E96541B9X-PS
5363-pixel × 3 line CCD Linear Sensor (Color)
Description
The ILX718K is a reduction type CCD linear sensor
developed for color image scanner, and has shutter
function per each color. This sensor reads A4-size
documents at a density of 600 DPI.
Features
• Number of effective pixels: 16089 pixels
(5363 pixels × 3)
• Pixel size: 8µm × 8µm (8µm pitch)
• Distance between line: 64µm (8 Lines)
• Single-sided readout
• Shutter function
• Ultra low lag / High sensitivity
• Single 12V power supply
• Input clock pulse: CMOS 5V drive
• Number of output 3 (R, G, B)
• Package:
22 pin Plastic-DIP (400 mil)
Absolute Maximum Ratings
• Supply voltage VDD 15 V
• Operating temperature –10 to +55 °C
• Storage temperature –30 to +80 °C
Pin Configuration (Top View)
Block Diagram
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
1
5363 R 1
5363 G 1
5363 B 1
VOUT-G
VOUT-B
VDD
NC
NC
V
DD
φ2
φSHUT
-B
φROG-B
φROG-G
VOUT-R
GND
φRS
φLH
GND
φSHUT
-R
φ1
φSHUT
-G
φROG-R
GND
φ2
φ1
11
8
3
2
1
D14
D15
D63
S1
D64
D75
Read Out Gate
CCD Register
S5363
Red
φROG-R
VOUT-R
GND φRS φ1 GND
20
16
15
V
DD φLH VDD φ2φ2
10
Green
22
D14
D15
D63
S1
D64
D75
Read Out Gate
CCD Register
S5363
Driver
φROG-GVOUT-G
12
VOUT-B
21
D14
D15
D63
S1
D64
D75
Read Out Gate
CCD Register
S5363
Blue
φROG-B
13
5
14
9
7
4
φSHUT
-B
φSHUT-G
φSHUT-R
Driver
Driver
Driver
Driver
Driver
GND
Driver
Shutter Drain Shutter Gate
Shutter Drain Shutter Gate
Shutter Drain Shutter Gate
17
6
φ1
Page 2
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ILX718K
Pin Description
Pin No. Symbol Description Pin No. Symbol Description
1
2
3
4
5
6
7
8
9
10
11
VOUT-R
GND
φRS
φLH
GND
φ1
φSHUT-R
φ1
φSHUT-G
φROG-R
GND
Signal out (red)
GND
Clock pulse input
Clock pulse input
GND
Clock pulse input
Clock pulse input
Clock pulse input
Clock pulse input
Clock pulse input
GND
12
13
14
15
16
17
18
19
20
21
22
φROG-G
φROG-B
φSHUT-B
φ2
VDD
φ2
NC
NC
VDD
VOUT-B
VOUT-G
Clock pulse input
Clock pulse input
Clock pulse input
Clock pulse input
12V power supply
Clock pulse input
NC
NC
12V power supply
Signal out (blue)
Signal out (green)
Recommended Supply Voltage
Item
VDD
Min.
11.4
Typ.
12
Max.
12.6
Unit
V
Clock Characteristics
Symbol
Cφ1, Cφ2
CφLH
CφRS
CφROG
CφSHUT
Min.
—
—
—
—
—
Typ.
850
10
10
10
10
Max.
—
—
—
—
—
Unit
pF
pF
pF
pF
pF
Item
Input capacity of φ1, φ2
Input capacity of φLH
Input capacity of φRS
Input capacity of φROG
∗1
Input capacity of φSHUT
∗1
Input Clock Pulse Voltage Condition
High level
Low level
Min.
4.75
—
Typ.
5.0
0
Max.
5.25
0.1
Unit
V
V
Item
φ1, φ2, φLH, φRS, φROG,
φSHUT pulse voltage
∗1
It indicates that φROG-R, φROG-G, φROG-B as φROG, φSHUT-R, φSHUT-G, φSHUT-B as φSHUT.
Clock Frequency
Min.
—
Typ.
1
Max.
5
Unit
MHz
Item Symbol
φ1, φ2, φLH, φRS fφ1, fφ2, fφLH, fφRS
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ILX718K
Electrooptical Characteristics (Note 1)
Ta = 25°C, VDD = 12V, fφRS = 1MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm)
Item Symbol Min. Typ. Max. Unit Remarks
Sensitivity
Sensitivity nonuniformity
Saturation output voltage
Saturation
exposure
Dark voltage average
Dark signal nonuniformity
Image lag
Supply current
Total transfer efficiency
Output impedance
Offset level
Dynamic range
RR
RG
RB
PRNU
VSAT
SER
SEG
SEB
VDRK
DSNU
IL
IVDD
TTE
ZO
VOS
DR
1.3
2.1
1.6
—
2
0.74
0.46
0.58
—
—
—
—
92
—
—
1000
2.0
3.2
2.5
4
3.2
1.6
1
1.28
0.3
1.5
0.02
26
98
250
6.5
10670
2.7
4.3
3.4
20
—
—
—
—
2
5
—
50
—
—
—
—
V/(lx · s)
%
V
lx · s
mV
mV
%
mA
%
Ω
V
—
Note 2
Note 3
Note 4
Note 5
Note 6
Note 6
Note 7
—
—
—
Note 8
Note 9
Red
Green
Blue
Red
Green
Blue
Note
1) In accordance with the given electrooptical characteristics, the black level is defined as the average value
of D2, D3 to D12.
2) For the sensitivity test light is applied with a uniform intensity of illumination.
3) PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2.
VOUT-G = 500mV (Typ.)
PRNU = × 100 [%]
Where the 5363 pixels are divided into blocks of 114 (Last block is 119 pixel). The maximum output of
each block is set to VMAX, the minimum output to VMIN and the average output to VAVE.
4) Use below the minimum value of the saturation output voltage.
5) Saturation exposure is defined as follows.
SE =
Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB.
6) Optical signal accumulated time τ int stands at 10ms.
7) VOUT-G = 500mV (Typ.)
8) Vos is defined as indicated bellow.
VOUT indicates VOUT-R, VOUT-G, and VOUT-B.
9) Dynamic range is defined as follows.
DR =
When the optical signal accumulated time is shorter, the dynamic range gets wider because the optical
signal accumulated time is in proportion to the dark voltage.
(VMAX – VMIN) /2
VAVE
A
VOS
VOUT
GND
VSAT
R
VSAT
VDRK
A
Page 4
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ILX718K
2
1
3
4
5438
D1
D2
D3
D13
D14
D15
D61
D62
D63
S1
S2
S5361
S5362
S5363
D64
D65
D70
D71
D75
Optical black (49 pixels)
Dummy signal (63 pixels)
1-line output period (5438 pixels)
φROG
φ1
φLH
φ2
φRS
V
OUT
5
0
5
0
5
0
5
0
Clock Timing Chart 1
Note) The transfer pulses (φ1, φ2, φLH) must have more than 5438 cycles.
V
OUT indicates VOUT-R, VOUT-G, VOUT-B.
Page 5
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ILX718K
Clock Timing Chart 2
t4 t5
t2
t1 t3
t7
t6
φROG
φ1
φ2
Clock Timing Chart 3
t7
φ1
φLH
φ2
V
OUT
t6
t9
t10 t11
t13
t12
t8
φRS
Page 6
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ILX718K
2
1
3
4
5438
φROG
φ1
φLH
φ2
φRS
φSHUT
5
0
5
0
5
0
5
0
Integration Time
Clock Timing Chart 4 (Shutter Operation)
Note) Shutter pulse must not be low level during from 2 to 5438 of φ1.
Page 7
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ILX718K
Clock Pulse Recommended Timing
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
Min.
50
800
800
0
0
0
0
45
45
0
0
—
—
Typ.
100
1000
1000
5
5
20
20
250
∗
1
250
∗
1
10
10
10
10
Max.
—
—
—
10
10
60
60
—
—
30
30
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Item
φROG, φ1 pulse timing
φROG pulse high level period
φROG, φ1 pulse timing
φROG pulse rise time
φROG pulse fall time
φ1 pulse rise time /φ2 pulse fall time
φ1 pulse fall time /φ2 pulse rise time
φRS pulse high level period
φRS, φLH pulse timing
φRS pulse rise time
φRS pulse fall time
Signal output delay time
∗1
These timing is the recommended condition under fφRS = 1MHz.
Page 8
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ILX718K
1
2
3
4
5
8
11
12
15
16
19
20
21
22
V
OUT-R
GND
φRS
φLH
GND
φSHUT-
R
φ1
φSHUT-
G
φROG
-R
GND
V
OUT-G
V
OUT-B
V
DD
NC
NC
V
DD
φ2
φSHUT
-B
φROG
-B
φROG
-G
IC1
2Ω100Ω 100Ω100Ω
Tr1
VOUT-R
0.1µF 47µF/16V
12V
5.1kΩ
VOUT-G
φRS φLH
φ1
φROG-R
Tr1
100Ω 100Ω
Tr1
5.1kΩ 5.1kΩ
V
OUT-B
2Ω
IC1
φ2 φROG
-GφROG-B
IC1: 74AC04
Tr1: 2SC2785
φSHUT-B
14
13
φSHUT-R φSHUT-G
7
9
10
18
17
6
φ1
φ2
∗
Data rate fφRS = 1MHz
Application Circuit
∗
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Page 9
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ILX718K
Example of Representative Characteristics (VDD = 12V, Ta = 25°C)
1
0.8
0.6
0.4
0.2
0
450400 550500 650600 700
Wavelength [nm]
Relative sensitivity
Spectral sensitivity characteristics (Standard characteristics)
1
0
Ta – Ambient temperature [°C]
Output voltage rate
Dark signal output temperature characteristics
(Standard characteristics)
10
5
0.5
0.1
10 20 30 40 50 60 1
τ int – Integration time [ms]
Output voltage rate
Integration time output voltage characteristics
(Standard characteristics)
1
0.5
0.1
5 10
V
DD [V]
V
OS
– Offset level [V]
Offset level vs. VDD characteristics
(Standard characteristics)
12
12
10
8
6
4
2
0
11.4 12.6
Ta = 25°C
∆VOS
∆VDD
0.3
Ta – Ambient temperature [°C]
V
OS
– Offset level [V]
Offset level vs. temperature characteristics
(Standard characteristics)
12
10
8
6
4
2
0
0
∆VOS
∆Ta
–0.5mV/°C
10 20 30 40 50 60
Page 10
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ILX718K
Notes of Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Packages
The following points should be observed when handling and installing packages.
a) Remain within the following limits when applying static load to the package:
(1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter
of the glass portion.)
(2) Shearing strength: 29N/surface
(3) Tensile strength: 29N/surface
(4) Torsional strength: 0.9Nm
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the package to crack or dust to be generated.
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating.
(4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer.
(5) Applying the metal a crash or a rub against the plastic portion.
Note that the preceding notes should also be observed when removing a component from a board
after it has already been soldered.
d) The notch of the plastic portion is used for directional index, and that can not be used for reference of
fixing. In addition, the cover glass and seal resin may overlap with the notch or ceramic may overlap
with the notch of the plastic portion.
Plastic portion
Cover glass
39N
Ceramic portion
Adhesive
(1)
29N
(3)
0.9Nm
(4)
29N
(2)
Page 11
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ILX718K
3) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
Page 12
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ILX718K
Package Outline Unit: mm
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
DRAWING NUMBER
Plastic, Ceramic
GOLD PLATING
42ALLOY
LS-B21(E)
1. The height from the bottom to the sensor surface is 2.38 ± 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5.
*The dimension of cover glass is 54.2 X 9.0mm or 53.0 X 7.3mm.
5.43g
M
1
22
11
12
7.93 ± 0.3
10.16
55.7 ± 0.3
2.54
0.51
0.25
*7.3 or 9.0
*53.00 or 54.2
3.58
H
V
22pin DIP(400mil)
42.904(8µmX5363pixels)
No.1 Pixel(Green)
10.0 ± 0.3
0˚to 9˚
4.28 ± 0.5
0.3
4.0 ± 0.5
5.0 ± 0.3
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