Datasheet ILX555K Datasheet (Sony)

Page 1
ILX555K
10680 pixel
× 3 line CCD Linear Sensor (Color)
Description
The ILX555K is a reduction type CCD linear sensor developed for color image scanner. This sensor reads A4-size documents at a density of 1200DPI.
Features
• Number of effective pixels:
32040 pixels (10680 pixels × 3)
• Pixel size: 3.5µm × 3.5µm (3.5µm pitch)
• Distance between line: 28µm (8 lines)
• Single-sided readout
• Ultra low lag
• Single 12V power supply
• Maximum data rate: 5MHz/Color
• Input Clock Pulse: CMOS 5V drive
• Number of output 3 (R, G, B)
• Package: 22 pin Plastic DIP (400mil)
Absolute Maximum Ratings
• Supply voltage VDD 15 V
• Operating temperature –10 to +55 °C
Pin Configuration (Top Vie w)
Block Diagram
D75
GND
20
D74
D70
S10680
22 pin DIP (Plastic)
-R
φROG 8
Driver
D75 D74
D70
S10680
-G
φROG 14
Driver
D75 D74
D70
S10680
-B
φROG 9
Driver
7
15
φ2
φ1
φRS
GND
OUT-G
V
φROG
φROG
V
NC
φ1
DD
φ2
NC
NC
Red
S1
1
2
3
4
5
6
7
8
-R
9
-B
10
11
10680 1B
10680 1G
10680 1R
22
21
20
19
18
17
16
15
14
13
12
NC
φ2
GND
GND
V
OUT-B
V
OUT-R
NC
φ1
φROG
NC
NC
19
GND
-G
Read out gate
D69
D19 D18
Output
amplifier
17
OUT-R
V
CCD register
Green
S1
Read out gate
D69
D19 D18
Output
amplifier
5
OUT-G
V
CCD register
Blue
S1
Read out gate
D69
D19 D18
Output
amplifier
18
OUT-B
V
CCD register
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E01114A18-PS
21
2
4 6 3
φ2
φ1
φRS
DD
GND V
Page 2
Pin Description
ILX555K
Pin No. Symbol Description
1 2 3 4 5 6 7 8
9 10 11
NC
φ1 φRS
GND V
OUT-G
VDD
φ2 φROG-R φROG-B
NC NC
NC Clock pulse input Clock pulse input GND Signal output (green) 12V power supply Clock pulse input Clock pulse input Clock pulse input NC NC
Recommended Supply Voltage
Item Min.
VDD 11.4
Typ.
12.0
Max.
12.6
Pin No. Symbol Description
12 13 14 15 16 17 18 19 20 21 22
NC NC
φROG φ1
NC VOUT-R VOUT-B GND GND φ2 NC
NC NC
-G
Clock pulse input Clock pulse input NC Signal output (red) Signal output (blue) GND GND Clock pulse input NC
Unit
V
Clock Characteristics
Item Min. Input capacity of φ1, φ2 Input capacity of φRS Input capacity of φROG
Symbol Cφ1, Cφ2 CφRS CφROG
— — —
Typ.
1200
10 10
Max.
Clock Frequency
Item Min.
φ1, φ2, φRS —
fφ1, fφ2, fφRS
Symbol
Input Clock Pulse Voltage Condition
Item Min.
φ1, φ2, φRS, φROG pulse voltage
High level Low level
4.75
—
Typ.
5.0 0
— — —
Max.
5.25
0.1
Unit
pF pF pF
Typ.
1
Unit
V V
Max.
5
Unit
MHz
– 2 –
Page 3
Electrooptical Characteristics (Note 1) (Ta = 25°C, VDD = 12V, fφRS = 1MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm))
ILX555K
Item Min.
Sensitivity
Sensitivity nonuniformity Saturation output voltage
Saturation exposure
Dark voltage average
Red
Green
Blue
Red
Green
Blue
Symbol RR RG RB PRNU VSAT SER SEG SEB VDRK
0.98
0.98
0.85
—
1.5
0.74
0.74
0.86
—
Typ.
1.5
1.5
1.3 4
1.8
1.20
1.20
1.38 2
Max.
2.02
2.02
1.75 20
— — — —
5
Unit
V/(lx · s)
%
V
lx · s
mV
Remarks
Note 2
Note 3 Note 4
Note 5
Note 6
Dark signal nonuniformity Image lag Supply current Total transfer efficiency Output impedance Offset level
DSNU IL IVDD TTE ZO VOS
— — —
92
— —
4
0.02 30 98
360
4.7
12
—
50
— — —
mV
%
mA
%
Ω
V
Note 7
Note 8
Notes)
1. In accordance with the given electrooptical characteristics, the black level is defined as the average value of D18, D19 to D67.
2. For the sensitivity test light is applied with a uniform intensity of illumination.
3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2. VOUT = 500mV (Typ.)
PRNU = × 100 [%]
(VMAX – VMIN)/2
VAVE
4. Use below the minimum value of the saturation output voltage.
5. Saturation exposure is defined as follows.
VSAT
SE =
R
Where R indicates RR, RG, RB, and SE indicates SER, SEG, SE B.
6. Optical signal accumulated time τ int stands at 5.5ms.
7. VOUT-G = 500mV (Typ.)
8. Vos is defined as indicated bellow.
V
OUT
VOUT indicates VOUT-R, VOUT-G and VOUT-B.
GND
– 3 –
V
OS
Page 4
Clock Timing Chart 1
φROG
φ1
0
1
2
3
5
4
10755
0
5
5
φ2
0
– 4 –
5
φRS
0
D1
D2
V
OUT
Dummy signal (69 pixels)
D3
D17
D18
D19
D67
Optical black (50 pixels)
1-line output period (10755 pixels)
D68
D69S1S2
S10678
S10679
S10680
D70
D71
D74
D75
Note) The transfer pulses (φ1, φ2) must have more than 10755 cycles.
OUT
indicates V
V φROG indicates φROG
OUT-R
, V
OUT-G
-R
, φROG-G, φROG-B.
, V
OUT-B
.
ILX555K
Page 5
Clock Timing Chart 2
ILX555K
φROG
φ1
φ2
Clock Timing Chart 3
φ1
t4
t2
t6
t1
t7
t5
t7
t3
t6
φRS
V
φ2
OUT
t11
t9
t12
t10
t8
– 5 –
Page 6
Clock Pulse Recommended Timing
ILX555K
Item
φROG, φ1 pulse timing φROG pulse high level period φROG, φ1 pulse timing φROG pulse rise time φROG pulse fall time φ1 pulse rise time/φ2 pulse fall time φ1 pulse fall time/φ2 pulse rise time φRS pulse high level period φRS pulse rise time φRS pulse fall time
Symbol
t1 t2 t3 t4 t5 t6 t7 t8
t9 t10 t11
Signal output delay time
t12
∗1
These timing is the recommended condition under fφRS = 1MHz.
Min.
50
3 1 0 0 0 0
30
0 0
— —
Typ. 100
20 20
50
20 20 40 20
Max.
—
5 2 5 5
— — — — — —
∗1
— — — — —
Unit
ns µs µs ns ns ns ns ns ns ns ns ns
– 6 –
Page 7
Application Circuit
∗
φROG
-G
IC1
IC1
φ2
OUT-B
V
5.1k
Ω
V
Tr1
OUT-R
5.1k
Ω
Tr1
φ1
NC
2Ω
15
φ1
100Ω
1416
-G
φROG
NC
NC
2Ω
22 13 12
NC
φ2
2021
GND
19
GND
100
Ω
18 17
OUT-B
V
100
OUT-R
V
Ω
– 7 –
12V
0.1µF
∗
Data rate fφ
47µF/16V
RS
= 1MHz
-R
100Ω
OUT-G
V
5
NC
1
φ1
2
2Ω
100Ω
φRS
3
GND
4
IC1
φ1
φRS
5.1kΩ
Tr1
6
OUT-G
V
DD
V
2Ω
φ2
φ2
7
φROG
8
100Ω
-R
φROG
100Ω
φROG
9
-B
φROG
-B
IC1
NC
10
NC
11
IC1: 74AC04 Tr1: 2SC2785
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
ILX555K
Page 8
Example of Representative Characteristics (VDD = 12V, Ta = 25°C)
Spectral sensitivity characteristics (Standard characteristics)
1.0
0.8
0.6
0.4
Relative sensitivity
0.2
ILX555K
0
400
450
Dark voltage rate vs. Ambient temperature
(Standard characteristics)
100
10
Dark voltage rate
1
0.1 10 20 60
Ta – Ambient temperature [˚C]
30 40 50–10 0
Offset level vs. Supply voltage
(Standard characteristics)
10
Ta = 25˚C
500 700
550 600 650
Wavelength [nm]
Output voltage rate vs. Integration time
(Standard characteristics)
10
1
Output voltage rate
0.1 τ int – Integration time [ms]
Offset level vs. Ambient temperature
(Standard characteristics)
10
51
10
8
6
4
Vos – Offset level [V]
2
0
V
∆Vos ∆V
1211.4
DD – Supply voltage [V]
DD
≈ 0.7
12.6
– 8 –
8
6
4
Vos – Offset level [V]
2
0
010 60
Ta – Ambient temperature [˚C]
∆Vos
≈ 3mV/˚C
∆Ta
20 30 40 50–10
Page 9
Notes of Handling
1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material.
Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying static load to the package:
(1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter
of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm
ILX555K
Cover glass
Plastic portion
Ceramic portion
39N
(1)
Adhesive
29N
(2)
29N
(3)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the package to crack or dust to be generated.
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating.
(4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer.
(5) Applying the metal a crash or a rub against the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered.
3) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W
soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
0.9Nm
(4)
– 9 –
Page 10
ILX555K
4) Dust and dir t protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
– 10 –
Page 11
Package Outline Unit: mm
22 pin DIP (400mil)
55.7 ± 0.3
5.0 ± 0.3
37.38 (3.5µm × 10680Pixels)10.2 ± 0.3
22
V
H
No.1 Pixel (Green)
1
4.95 ± 0.6
12
10.16
10.0 ± 0.3
11
0˚ to 9˚
0.25
– 11 –
4.0 ± 0.5
2.54
0.51
0.3
1. The height from the bottom to the sensor surface is 2.38 ± 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive in 1.5.
3.58
4.28 ± 0.5
M
Sony Corporation
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER
Plastic, Ceramic GOLD PLATING 42 ALLOY
5.43g LS-B30(E)
ILX555K
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