Datasheet ILX548K Datasheet (Sony)

Page 1
5340 pixel × 3 line CCD Linear Sensor (Color)
Description
The ILX548K is a reduction type CCD linear sensor developed for color image scanner. This sensor reads A4-size documents at a density of 600DPI.
Features
• Number of effective pixels: 16020 pixels
• Pixel size: 4µm × 4µm (4µm pitch)
• Distance between line: 32µm (8 lines)
• Single-sided readout
• Ultra low lag/High sensitivity
• Single 12V power supply
• Maximum data rate: 5MHz/Color
• Input clock pulse: CMOS 5V drive
• Number of output: 3 (R, G, B)
• Package: 22 pin Cer-DIP (400mil)
22 pin Plastic DIP (400mil)
Absolute Maximum Ratings
• Supply voltage VDD 15 V
• Operating temperature –10 to +55 °C
Pin Configuration (Top View)
Block Diagram
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E00429-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
ILX548K
22 pin DIP (Cer-DIP) 22 pin DIP (Plastic)
D74
D75
S5340
Red
Read out gate
CCD register
D70
D69
S1
D18
D19
D74
D75
S5340
Green
Read out gate
CCD register
D70
D69
S1
D18
D19
D74
D75
S5340
Blue
Read out gate
CCD register
D70
D69
S1
D18
D19
Driver
14
φROG-
R
Driver
12
φROG-
G
Driver
11
φROG-
B
Output
amplifier
22
19
V
OUT-R
Output
amplifier
3
V
OUT-G
Output
amplifier
20
2 4 1
V
OUT-B
GND VDD φRS
13
φ1
10
φ2
φCLP
21
GND
1
22
φRS
2
GND
3
VOUT-G
4
V
DD
5
NC
6
NC
7
NC
8
NC
9
NC
10
φ2
11
21
20
19
18
17
16
15
14
13
12
φROG-
B
φCLP
GND
V
OUT-B
VOUT-R
NC
NC
NC
NC
φROG-
R
φ1
φROG-
G
5340
5340
B1
1
1
G
R
5340
For the availability of this product, please contact the sales office.
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ILX548K
Unit
pF pF pF pF
Max.
— — — —
Typ.
500
10 10 10
Min.
— — — —
Symbol Cφ1, Cφ2 CφRS CφCLP CφROG
Item Input capacity of φ1, φ2 Input capacity of φRS Input capacity of φCLP Input capacity of φROG
Clock Characteristics
Unit
MHz
Max.
5
Typ.
1
Min.
—
Symbol
fφ1, fφ2, fφRS, fφCLP
Item
Item
φ1, φ2, φRS, φCLP
Clock Frequency
Unit
V
Max.
12.6
Typ.
12
Min.
11.4
Item
VDD
Recommended Supply Voltage
Unit
V V
Max.
5.25
0.1
Typ.
5.0 0
Min.
4.75
—
High level Low level
φ1, φ2, φRS, φCLP, φROG pulse voltage
Input Clock Pulse Voltage Condition
Pin Description
Pin No.
Symbol Description
1 2 3 4 5 6 7 8
9 10 11
φRS GND VOUT-G VDD NC NC NC NC NC
φ2 φROG-
B
Clock pulse input GND Signal output (green) 12V power supply NC NC NC NC NC Clock pulse input Clock pulse input
Pin No.
Symbol Description
12 13 14 15 16 17 18 19 20 21 22
φROG-G φ1 φROG-R
NC NC NC NC VOUT-R VOUT-B GND φCLP
Clock pulse input Clock pulse input Clock pulse input NC NC NC NC Signal output (red) Signal output (blue) GND Clock pulse input
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ILX548K
Unit
%
V
mV mV
%
mA
%
Ω
V
Remarks
Note 3 Note 4
— — —
Note 8
Max.
3.6
4.5
3.5 20
— — — —
5
12
—
50
— — —
Typ.
2.7
3.3
2.6 4
2.5
0.93
0.76
0.96 2 4
0.02
25 98
450
7.3
Min.
1.8
2.1
1.7
—
2
0.56
0.44
0.57
— — — —
92
— —
Symbol RR RG RB PRNU VSAT SER SEG SEB VDRK DSNU IL IVDD TTE Zo VOS
Item
Sensitivity nonuniformity Saturation output voltage
Dark voltage average Dark signal nonuniformity Image lag Supply current Total transfer efficiency Output impedance Offset level
Electrooptical Characteristics (Note 1)
(Ta = 25°C, VDD = 12V, fφRS = 1MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm))
Notes)
1. In accordance with the given electrooptical characteristics, the black level is defined as the average value of D18, D19 to D67.
2. For the sensitivity test light is applied with a uniform intensity of illumination.
3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2.
VOUT-G= 500mV (Typ.) PRNU = × 100 [%]
Where the 5340 pixels are divided into blocks of 100, the maximum output of each block is set to V
MAX, the
minimum output to V
MIN and the average output to VAVE.
4. Use below the minimum value of the saturation output voltage.
5. Saturation exposure is defined as follows.
SE =
Where R indicates R
R, RG, RB, and SE indicates SER, SEG, SEB.
6. Optical signal accumulated time τint stands at 5.5ms.
7. VOUT-G = 500mV (Typ.)
8. Vos is defined as indicated below. VOUT indicates VOUT-R, VOUT-G and VOUT-B.
(V
MAX – VMIN)/2
VAVE
VSAT
R
Sensitivity
Saturation exposure
Red Green Blue
Red Green Blue
V/(lx · s) Note 2
lx · s Note 5
Note 6
Note 7
VOS
VOUT
GND
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ILX548K
Clock Timing Chart 1
5φ10
5
φROG
0
5φ20
5
φRS
0
5
φCLP
V
OUT
0
1
2
3
4
5415
D1
D2
D3
D17
D18
D19
D67
D68
D69
S1
S2
S5338
S5339
S5340
D70
D71
D74
D75
Optical black (50 pixels)
Dummy signal (69 pixels)
1-line output period (5415 pixels)
Note) The transfer pulses (φ1, φ2) must have more than 5415 cycles.
V
OUT indicates VOUT-R, VOUT-G, VOUT-B.
φROG indicates φROG-R, φROG-G, φROG-B.
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ILX548K
Clock Timing Chart 2
φROG
φ1
φ2
t1
t2
t4
t5
t3
t7
t6
Clock Timing Chart 3
φ1
φ2
V
OUT
φRS
t12
t8
t9
t6
t7
t11
t10
t14
t15
t13
φCLP
t16 t17
;;
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ILX548K
Clock Pulse Recommended Timing
Unit
ns µs µs ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Max.
— — — — — — — — — — — — — — — — —
Typ.
100
5 2 5
5 20 20
50
∗
1
20 20 50 20
100 100
50 20 20
Min.
50
3 1 0 0 0 0
30
0 0
— —
40 40 10
0 0
Symbol t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t13 t14 t15 t16 t17
Item
φROG, φ1 pulse timing φROG pulse high level period φROG, φ1 pulse timing φROG pulse rise time φROG pulse fall time φ1 pulse rise time/φ2 pulse fall time φ1 pulse fall time/φ2 pulse rise time φRS pulse high level period φRS pulse rise time φRS pulse fall time
Signal output delay time
φCLP pulse high level period
φCLP pulse timing
φCLP pulse rise time φCLP pulse fall time
∗
1
These timing is the recommended condition under fφRS = 1MHz.
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ILX548K
Application Circuit
∗
φCLP
IC1
100Ω
φROG-
R φROG-G
100Ω
IC1
φRS
2Ω
IC1
φ2
1
φRS
2
GND
3
VOUT-G
4
VDD
5
NC
6
NC
7
NC
NC
9
NC
10
φ2
20
19
18
16
φROG-B
φCLP
GND
V
OUT-B
VOUT-R
NC
NC
NC
NC
φROG-
R
φ1
φROG-G
IC1: 74AC04
Tr1: 2SC2785
0.1µF
47µF/16V
12V
2Ω
φ1
100Ω
∗
Data rate fφRS = 1MHz
100Ω
φROG-
B
IC1
15
17
8
21
22
14 13
12
11
100Ω
Tr1
Tr1
V
OUT-G
5.1kΩ
100
Ω
100
Ω
Tr1
V
OUT
-
B
5.1k
Ω
V
OUT
-
R
5.1k
Ω
100
Ω
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Page 8
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ILX548K
Example of Representative Characteristics (VDD = 12V, Ta = 25°C)
Wavelength [nm]
Relative sensitivity
550 600 650
400
0
0.2
0.4
0.6
0.8
1.0
450
500 700
Spectral sensitivity characteristics (Standard characteristics)
Dark voltage rate vs. Ambient temperature
(Standard characteristics)
Output voltage rate vs. Integration time
(Standard characteristics)
Offset level vs. Supply voltage
(Standard characteristics)
Offset level vs. Ambient temperature
(Standard characteristics)
Ta – Ambient temperature [°C]
Dark voltage rate
30 40 50–10 0
0.1
1
100
10
10 20 60
Ta – Ambient temperature [°C]
Vos – Offset level [V]
20 30 40 50–10
0
2
4
6
8
10
010 60
V
DD – Supply voltage [V]
Vos – Offset level [V]
1211.4
0
2
4
6
10
8
12.6
τ int – Integration time [ms]
Output voltage rate
51
0.1
1
10
10
∆Vos ∆V
DD
≈ 0.7
∆Vos
∆Ta
≈ 1mV/°C
Ta = 25°C
Page 9
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ILX548K
Notes of Handling
1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material.
Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying static load to the package:
(1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter
of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the package to crack or dust to be generated.
(1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as
tweezers. (5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass. (6) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. (7) Applying the metal a crash or a rub against the plastic portion.
Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered.
39N
Lower ceramic layer
Upper ceramic layer
Low-melting glass
(1)
29N
(3)
0.9Nm
(4)
29N
(2)
;
;
;
;
Plastic portion
Cover glass
39N
Ceramic portion
Adhesive
(1)
29N
(3)
0.9Nm
(4)
29N
(2)
Page 10
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ILX548K
3) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering
tool, ground the controller. For the control system, use a zero cross type.
4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
Page 11
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ILX548K
Package Outline Unit: mm
1
22
5.0 ± 0.5
H
V
No.1 Pixel (Green)
11
12
0° to 9°
(AT STAND OFF)
0.25
0.3
1. The height from the bottom to the sensor surface is 1.61 ± 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5.
32.0 ± 0.5
10.0 ± 0.5
10.16
4.0 ± 0.5
2.54
0.51
2.7
3.4 ± 0.5
22pin DIP (400mil)
21.36 (4µm × 5340Pixels)
6.22 ± 0.5
Cer-DIP TIN PLATING 42 ALLOY
3.0g
M
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER
LS-D15(E)
M
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER
H
V
1
11
12
22
Plastic,Ceramic GOLD PLATING 42ALLOY
0.25
2.54
2.1
6.22 ± 0.3
10.16
0.51
0.3
0˚ to 9˚
10.0 ± 0.3
No.1 Pixel (Green)
21.36 (4µmX5340Pixels)
32.0 ± 0.3
5.0 ± 0.3
4.0 ± 0.5
2.8 ± 0. 5
1. The height from the bottom to the sensor surface is 1.61 ± 0.3mm.
2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5.
22pin DIP (400mil)
2.21g LS-D13-01(E)
Sony Corporation
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