Page 1
2048 × 2pixel CCD Linear Sensor (Color)
For the availability of this product, please contact the sales office.
Descriptions
The ILX522K is a reduction type CCD linear
sensor designed for color image scanner use. This
sensor reads B4 size documents at a density of 200
DPI. (Dot Per Inch), and has 2lines analog
memories to adjust the position of green line and
red/blue line. A built-in timing generator and clockdrivers ensure direct drive at 5V logic.
ILX522K
22 pin DIP (Cer-DIP)
Features
• Number of effective pixels: 2048 × 2pixels
• Pixel size
Red/Blue pixel: 14µm × 12µm (14µm pitch)
Green pixel: 14µm × 14µm (14µm pitch)
• Built-in timing generator, clock-drivers
• Ultra-low lag
• Good linearity
• High sensitivity
• Input Clock Pulse: CMOS 5V drive
Absolute Maximum Ratings
• Supply voltage VDD1 11 V
VDD2 6V
Pin Configuration (Top View)
φRS
VDD1
VOUT-R/B
1
2
G1
G2
R1
B1
3
NC
22
GND
21
V
DD2
20
Block Diagram
φROG
GND
9
15
Driver
Clock driver
φV1
12
Driver
Analog memory
CCD analog shift register
φV2
11
Driver
D46
D33
B1024
R1024
Readout gate
Analog memory
B1
R1
D32
D46
D33
G2048
G2047
Readout gate
G2
CCD analog shift register
G1
D32
Clock driver
14
GND
DD2
13
V
10
GND
8
DD1
V
16
φCLK
18
GND
VOUT-G
VDD1
NC
NC
DD1
V
φROG
GND
4
5
6
7
8
9
10
11
G2047
G2048
R1024
B1024
VGG
19
D13
GND
18
NC
17
φCLK
16
GND
15
GND
14
DD2
V
13
φV1φV2
12
Output
amplifier
3
OUT-R/B
V
Driver
1
φRS
Output
amplifier
4
OUT-G
V
D13
19
GG
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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5
21
20
2
E95436-PP
DD1
V
GND
DD2
V
DD1
V
Page 2
Pin Description
ILX522K
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
φRS
VDD1
VOUT-R/B
VOUT-G
VDD1
NC
NC
VDD1
φROG
GND
φV2
φV1
VDD2
GND
GND
φCLK
Description
Clock pulse input
9V power supply
R/B signal out
G signal out
9V power supply
NC
NC
9V power supply
Clock pulse input
GND
Clock pulse input
Clock pulse input
5V power supply
GND
GND
Clock pulse input
17
18
19
20
21
22
NC
GND
VGG
VDD2
GND
NC
NC
GND
Output gate bias
5V power supply
GND
NC
Recommended Supply Voltage
Item
VDD1
VDD2
Min.
8.5
4.75
Typ.
9.0
5.0
Max.
9.5
5.25
Unit
V
V
Note) Rules for raising and lowering power supply voltage.
To raise power supply voltage, first raise VDD1 (9V) and then VDD2 (5V).
To lower voltage, first lower VDD2 (5V) and then VDD1 (9V).
Clock Characteristics
Item Symbol Min. Typ. Max. Unit
Input capacity of φRS, φCLK
Input capacity of φV1, φV2
Input capacity of φROG
Input clock frequency
CφRS, CφCLK
CφV1, CφV2
CφROG
fφRS, fφCLK
– 2 –
—
—
—
—
10
10
10
—
—
—
—
3.5
pF
pF
pF
MHz
Page 3
Electrical Characteristics (Note 1)
A
(Ta = 25°C, VDD1 = 9V, VDD2 = 5V fφRS = 3.5MHz Light source = 3200K, IR cut filter CM-500S (t = 1.0mm))
Item Symbol Min. Typ. Max. Unit Remarks
ILX522K
Red
Sensitivity
Sensitivity nonuniformity
Saturation output voltage
Dark voltage average
Dark signal nonuniformity
Image lag
9V supply current
5V supply current
Total transfer efficiency
Output impedance
Offset level
Note:
1) In accordance with the given electrooptical characteristics, the black level is defined as the average of D3,
D4, to D10.
2) For the sensitivity test light is applied with a uniform intensity of illumination.
3) PRNU is defined as indicated below in each color. Ray incidence conditions are the same as for Note 2.
Green
Blue
Green
Red/Blue
Green
Red/Blue
RR
RG
RB
PRNU
VSAT
VDRK-G
VDRK-R/B
DSNU-G
DSNU-R/B
IL
IVDD1
IVDD2
TTE
ZO
VOS
5.2
6.5
2.8
—
1.0
—
—
—
—
—
—
—
92.0
—
—
8.0
10.0
4.3
5.0
1.5
0.3
1.5
0.6
2.0
0.02
20
16.0
98.0
150
5.4
10.8
13.5
5.8
15.0
—
1.5
9.0
3.0
12.0
—
40
32.0
—
—
—
V/(lx · s)
%
V
mV
%
mA
mA
%
Ω
V
Note 2
Note 3
Note 4
Note 5
Note 6
—
—
—
—
Note 7
PRNU = × 100 [%]
The maximum output of each color is set to VMAX, the minimum output to VMIN, and the average output to
VAVE.
4) Use below the minimum value of the saturation output voltage.
5) Optical signal accumulated time τint stands at 5ms.
6) VOUT-G = 500mV (Typ.)
7) VOS is defined as indicated below.
(VMAX – VMIN)/2
VAVE
∗
VOUT
A
OS
V
GND
∗
VOUT indicates VOUT-G and VOUT-R/B.
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ILX522K
2088 2094
D46
D40
D39
D33 D34
G2048
G2047
G2046
G1 G2
D32
D46
D40
D39
D33 D34
B1024
R1024
B1023
B1
R1
D32
1 Line Output (2094 pixels)
5V
0V
φROG
Clock Timing Chart
5V
φV1
0V
5V
φV2
0V
5V
123
0 0
φCLK
0V
5V
φRS
0V
OUT-G
V
D1 D2 D3 D12 D13 D14 D30 D31
Optical Black (18 pixels)
Dummy Signal (32 pixels)
D1 D2 D3 D12 D13 D14 D30 D31
VOUT-R/B
Note) φCLK, φRS pulses must have more than 2094 cycles.
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φROG, φV1, φV2, φCLK Timing
ILX522K
t6
φROG
t1
φV1
t6
φV2
φCLK
t1
Item Symbol Min. Typ. Max. Unit
φROG, φV2 – φCLK pulse timing
φROG, φV1, φV2 pulse period
φROG – φV1 pulse timing
φV1 – φCLK pulse timing
φROG, φV1, φV2 pulse rise time, fall time
t7
t2
t2
t1
t2, t4
t3
t5
t6, t7
t3
t6
t3
t4
t7
1
28
1
1
0
2
30
2
2
10
t7
t5
—
—
—
—
30
µs
µs
µs
µs
ns
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Page 6
φCLK, φRS, VOUT Timing
AA
ILX522K
φCLK
φRS
VOUT
Item Symbol Min. Typ. Max. Unit
φCLK pulse high level period
φRS pulse high level period
t1
t2
t3 t5
t4 t6
t1
t2
t3
135
30
—
500
250
60
∗
∗
—
—
—
ns
ns
ns
Signal output delay time
∗
These timing is the condition under fφRS = 1MHz.
t4
t5
t6
—
—
—
25
70
25
—
—
—
ns
ns
ns
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10µ
0.01µ
ILX522K
10V
φV1
φCLK
74HC04
74HC04
10µ
0.01µ
16V
12
13
1415
16
17
18
19
20
21
NC
GG
φV1
DD2
V
DD2
V
GND
GND
φCLK
GND
V
GND
φV2
GND
φROG
DD1
V
NC
NC
V
DD1
V
OUT-G
V
OUT-R/B
V
DD1
11
10
9
8
7
6
5
4
3
2
φV2
74HC04
φROG
74HC04
1kΩ 1kΩ
VOUT-G
2SA1175 2SA1175
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
Application Circuit
9V
5V
22
NC
– 7 –
10µ
74HC04
16V
φRS
OUT-R/B
V
φRS
1
0.01µ
Page 8
Example of Representative Characteristics (VDD1 = 9V, VDD2 = 5V, Ta = 25°C)
Spectral sensitivity characteristics (Standard characteristics)
1.0
0.8
0.6
0.4
Relative sensitivity
0.2
0
400 450 500 550 600 650 700
Wave length [nm]
ILX522K
Dark signal output temperature characteristics
(Standard characteristics)
10
5
1
0.5
Output voltage rate
0.1
0102030405060
Ta – Ambient temperature [°C]
Integration time output voltage characteristics
(Standard characteristics)
1
0.5
Output voltage rate
0.1
1510
τint – integration time [ms]
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ILX522K
Operational frequency characteristics of the VDD1
supply current (Standard characteristics)
40
Ta = 25°C
30
20
supply current [mA]
DD1
– V
10
VDD1
I
0
0 0.5 1.0 1.5 2.0 2.5 3.0
fφCLK – φCLK clock frequency [MHz]
Offset level vs. VDD1 characteristics
(Standard characteristics)
9
8
7
Ta = 25°C
3.5
Operational frequency characteristics of the VDD2
supply current (Standard characteristics)
20
Ta = 25°C
15
10
supply current [mA]
DD2
– V
5
VDD2
I
0
0 0.5 1.0 1.5 2.0 2.5 3.0
fφCLK – φCLK clock frequency [MHz]
Offset level vs. VDD2 characteristics
(Standard characteristics)
9
8
7
Ta = 25°C
3.5
6
5
4
– Offset level [V]
3
OS
V
2
1
0
8.5 9.0
∆VOS
∆VDD2
0.54
VDD1 [V]
Offset level vs. Temperature characteristics
8
6
4
– Offset level [V]
OS
V
2
6
5
4
– Offset level [V]
3
OS
V
2
1
0
9.5
4.75 5 5.25
(Standard characteristics)
∆VOS
∆Ta
–3mV/°C
VDD2 [V]
0
10 3020 50
04060
Ta – Ambient temperature [°C]
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Page 10
Notes of Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive
shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) lonized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Notes on Handling CCD Cer-DlP Packages
The following points should be observed when handling and installing cer-DlP packages.
a) Remain within the following limits when applying static load to the ceramic portion of the package:
(1) Compressive strength: 39 N/surface (Do not apply load more than 0.7mm inside the outer
perimeter of the glass portion.)
(2) Shearing strength: 29 N/surface
(3) Tensile strength: 29 N/surface
(4) Torsional strength: 0.9 Nm
ILX522K
Upper ceramic layer
Lower ceramic layer
39N
Low-melting glass
(1)
29N 29N
(2) (3)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the glass to crack: because the upper and lower ceramic
layers are shielded by low-melting glass,
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with soldering iron.
(3) Rapid cooling or heating
(4) Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as
tweezers.
(5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass.
Note that the preceding notes should also be observed when removing a component from a board after
it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool
sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric
desoldering tool, ground the controller. For the control system, use a zero cross type.
0.9Nm
(4)
– 10 –
Page 11
ILX522K
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces.
Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity
ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to
scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
7) Since ILX522K has 2 line memory so that the signal of R/B line is delay, compese the optical system subscanning R/B line initially.
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Page 12
0° to 9°
ILX522K
0.25
12
22pin DIP (400mil)
41.6 ± 0.5
10.16
(AT STAND OFF)
10.0 ± 0.5
9.0
11
40.2
1. The height from the bottom to the sensor surface is 2.45 ± 0.3mm.
2. The thickness of the cover glass is 0.8mm, and the refractive index is 1.5.
4.45 ± 0.5
M
3.65
0.3
Package Outline Unit: mm
28.672 (14µm × 2048Pixels)
22
6.26 ± 0.8
No.1 Pixel (Green)
1
H
V
5.0 ± 0.5
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2.54 0.51
Cer-DIP
42 ALLOY
TIN PLATING
5.2g
4.0 ± 0.5
PACKAGE MATERIAL
LEAD MATERIAL
LEAD TREATMENT
PACKAGE WEIGHT
PACKAGE STRUCTURE
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