For the availability of this product, please contact the sales office.
Description
The ILX520K is a reduction type CCD linear sensor
developing for color image scanner. This sensor reads
A3-size documents at a density of 600 DPI.
Features
• Number of effective pixels: 21234 pixels
(7078 pixels × 3)
• Pixel size:8µm × 8µm (8µm pitch)
• Distance between line:64µm (8 Lines)
• Single-sided readout
• Ultra low lag / Ultra high sensitivity
• Single 12V power supply
• Input clock pulse:CMOS 5V drive
• Number of output3 (R, G, B)
• Package:24 pin DIP (400 mil)
Absolute Maximum Ratings
• Supply voltageVDD15V
• Operating temperature–10 to +55°C
• Storage temperature–30 to +80°C
Pin Configuration (Top View)
Block Diagram
16
17
D75
D64
ILX520K
24 pin DIP
φROG-B
14
Driver
S7078
D75
D64
φROG-G
13
Driver
S7078
φROG-R
11
Driver
D75
D64
S7078
12
9
VOUT-R
GND
φRS
GND
φROG
GND
NC
φLH
φ1
NC
φ1
NC
1
2
3
4
5
6
7
8
9
10
11
-R
7078R1
12
7078G1
24
NC
23
VOUT-G
22
VOUT-B
21
VDD
NC
20
19
NC
18
φ2
V
DD
17
φ2
16
NC
15
φROG
14
7078B1
13
-B
φROG-G
φ2
VDDφLHVDDφ2
18
5
21
Blue
S1
D63
D15
D14
Green
Read Out Gate
CCD Register
22
VOUT-B
S1
D63
D15
D14
Red
Read Out Gate
CCD Register
23
VOUT-G
S1
D63
D15
D14
Read Out Gate
CCD Register
Driver
2
VOUT-R
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Clock pulse input
Clock pulse input
NC
Clock pulse input
12V power supply
Clock pulse input
NC
NC
12V power supply
Signal out (blue)
Signal out (green)
NC
Clock Characteristics
Item
Input capacity of φ1, φ2
Input capacity of φLH
Input capacity of φRS
Input capacity of φROG
Blue
Sensitivity nonuniformity
Saturation output voltage
Red
Saturation
exposure
Green
Blue
Dark voltage average
Dark signal nonuniformity
Image lag
Supply current
Total transfer efficiency
Output impedance
Offset level
Dynamic range
RR
RG
RB
PRNU
VSAT
SER
SEG
SEB
VDRK
DSNU
IL
IVDD
TTE
ZO
VOS
DR
1.3
2.1
1.6
—
2
0.74
0.46
0.58
—
—
—
—
92
—
—
1000
2.0
3.2
2.5
4
3.2
1.6
1
1.28
0.3
1.5
0.02
26
98
250
6.5
10670
2.7
4.3
3.4
20
—
—
—
—
2
5
—
50
—
—
—
—
V/(lx · s)
%
V
lx · s
mV
mV
%
mA
%
Ω
V
—
Note 2
Note 3
Note 4
Note 5
Note 6
Note 6
Note 7
—
—
—
Note 8
Note 9
Note
1) In accordance with the given electrooptical characteristics, the black level is defined as the average value
of D2, D3 to D12.
2) For the sensitivity test light is applied with a uniform intensity of illumination.
3) PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2.
VOUT = 500mV (Typ.)
PRNU =× 100 [%]
(VMAX – VMIN) /2
VAVE
Where the 7078 pixels are divided into blocks of 114 (Last block is 124 pixel). The maximum output of
each block is set to VMAX, the minimum output to VMIN and the average output to VAVE.
4) Use below the minimum value of the saturation output voltage.
5) Saturation exposure is defined as follows.
SE =
VSAT
R
Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB.
6) Optical signal accumulated time τ int stands at 10ms.
7) VOUT = 500mV (Typ.)
VOUT
8) Vos is defined as indicated bellow.
VOUT indicates VOUT-R, VOUT-G, and VOUT-B.
9) Dynamic range is defined as follows.
DR =
VSAT
VDRK
GND
VOS
When the optical signal accumulated time is shorter, the dynamic range gets wider because the optical
signal accumulated time is in proportion to the dark voltage.
– 3 –
Page 4
ILX520K
7153
D75
D71
D70
D65
D64
S7078
S7077
S7076
S2
S1
D63
D62
D61
D15
D14
Optical black (49 pixels)
D13
1-line output period (7153 pixels)
Clock Timing Chart 1
5
φROG
4
3
2
1
0
5
0
5
0
5
0
D3
D2
D1
Dummy signal (63 pixels)
Note) The transfer pulses (φ1, φ2, φLH) must have more than 7153 cycles.
φ1
φLH
φ2
φRS
OUT
V
– 4 –
Page 5
Clock Timing Chart 2
φROG
ILX520K
t4t5
t6
t2
t7
φ1
φ2
Clock Timing Chart 3
φ1
φLH
φ2
φRS
t1t3
t7
t9
t6
t10t11
t8
t13
OUT
V
t12
– 5 –
Page 6
Clock Pulse Recommended Timing
ILX520K
Item
φROG, φ1 pulse timing
φROG pulse high level period
φROG, φ1 pulse timing
φROG pulse rise time
φROG pulse fall time
φ1 pulse rise time /φ2 pulse fall time
φ1 pulse fall time /φ2 pulse rise time
φRS pulse high level period
φRS, φLH pulse timing
φRS pulse rise time
φRS pulse fall time
Signal output delay time
∗1
These timing is the recommended condition under fφRS = 1MHz.
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
Min.
50
1200
1200
0
0
0
0
45
45
0
0
—
—
Typ.
100
1500
1500
5
5
20
20
250
250
10
10
10
10
∗1
∗1
Max.
—
—
—
10
10
60
60
—
—
30
30
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
– 6 –
Page 7
ILX520K
-BφROG-G
φ2φROG
IC1
OUT-B
V
Tr1
IC1: 74AC04
Tr1: 2SC2785
φROG
-G
13
-B
1415
φROG
NC
φ2
16
2Ω
DD
V
17
φ2
18
NC
19
NC
20
GND
12
φROG
-R
11
IC1
-R
φROG
NC
10
φ1
9
φ1
2Ω100Ω100Ω
NC
8
φ1
7
GND
6
φLH
5
5.1kΩ5.1kΩ
∗
VOUT-G
Application Circuit
Tr1
21
22
DD
V
OUT-B
V
φRS
GND
4
φRSφLH
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
3
Tr1
V
OUT-G
23
100Ω100Ω
NC
24
V
OUT-R
NC
2
100Ω
1
OUT-R
V
5.1kΩ
12V
0.1µF47µF/16V
Data rate fφRS = 1MHz.
∗
– 7 –
Page 8
Example of Representative Characteristics (VDD = 12V, Ta = 25°C)
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensor.
e) For the shipment of mounted substrates, use boxes treated for prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80°C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W
soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an imaging device, do not use a solder suction equipment. When using an electric
desoldering tool, ground the controller. For the control system, use a zero cross type.
ILX520K
3) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch
the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
4) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
– 9 –
Page 10
Package OutlineUnit: mm
0° to 9°
ILX520K
0.25
10.16
(AT STAND OFF)
13
71.0 ± 0.9
24Pin DIP (400mil)
56.624 (8µm × 7078Pixels)
24
10.0 ± 0.5
9.0
12
68.0
1
No.1 Pixel (Green)
2.29
0.97
0.46
2.54
3.1 ± 0.5
M
0.3
1. The height from the bottom to the sensor surface is 1.4 ± 0.3mm.
2. The thickness of the cover glass is 0.8mm, and the refractive index is 1.5.
GOLD PLATING
Ceramic
5.8g
42ALLOY
8.5 ± 0.8
H
V
5.0 ± 0.5
1st. pin Index
4.0 ± 0.5
PACKAGE MATERIAL
LEAD TREATMENT
PACKAGE WEIGHT
LEAD MATERIAL
PACKAGE STRUCTURE
– 10 –
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