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2048-pixel CCD Linear Image Sensor (B/W)
For the availability of this product, please contact the sales office.
Description
The ILX511 is a rectangular reduction type CCD
linear image sensor designed for bar code POS
hand scanner and optical measuring equipment use.
A built-in timing generator and clock-drivers ensure
single 5 V power supply for easy use.
Features
• Number of effective pixels: 2048 pixels
• Pixel size: 14 µm × 200 µm
(14 µm pitch)
• Single 5 V power supply
• Ultra-high sensitivity
• Built-in timing generator and clock-drivers
• Built-in sample-and-hold circuit
• Maximum clock frequency: 2MHz
Block Diagram
ILX511
22 pin DIP (Plastic)
Absolute Maximum Ratings
• Supply voltage VDD 6V
•Operating temperature –10 to +60 °C
• Storage temperature –30 to +80 °C
NC NC GND
Pin Configuration (Top View)
OUT
V
GND
GND
SHSW
φCLK
V
NC
NC
1
2
3
4
5
6
DD
7
8
1
22
21
20
19
18
17
16
15
VDD
VDD
VDD
GND
V
GG
GND
GND
DD
V
DD
GND GND V
DD
V
DD
V
DD
V
12
13
14
15
16
17
20
21
22
D38
D37
D36
D35
D34
D33
S2048
S2047
S2046
Readout gate
CCD analog shift register
S3
S2
S1
D32
D14
D13
Clock-drivers
11
φROG
pulse generator
Readout gate
19
GND
4
10
5
9
8
7
6
3
SHSW
NC
φCLK
DD
V
NCNCV
DD
GNDGND
Mode selector
Sample-and-hold pulse generator
Clock plse generator/
NC
V
NC
φROG
9
DD
10
11
2048
14
13
12
NC
GND
S/H circuit
Output amplifier
Internal Structure
1
OUT
V
GG
V
18
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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2
E94108-TE
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Pin Description
ILX511
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Symbol
VOUT
GND
GND
SHSW
φ
CLK
VDD
NC
NC
VDD
NC
φ
ROG
GND
NC
NC
VDD
GND
GND
VGG
GND
VDD
VDD
VDD
Description
Signal output
GND
GND
Switch (with S/H or without S/H)
Clock pulse input
5V power supply
NC
NC
5V power supply
NC
Readout gate pulse input
GND
NC
NC
5V power supply
GND
GND
Output circuit gate bias
GND
5V power supply
5V power supply
5V power supply
Mode Description
Mode in Use Pin 4 (SHSW)
With S/H GND
Without S/H VDD
Recommended Voltage
Item Min. Typ. Max. Unit
VDD 4.5 5.0 5.5 V
Input Clock Voltage Condition (Note)
Item Min. Typ. Max. Unit
VIH 4.5 5.0 5.5 V
VIL 0 — 0.5 V
Note) This is applied to the all pulses applied externally. (φ CLK, φ ROG)
Item Symbol Min. Typ. Max. Unit
Input capacity of φ CLK pin C
φ
CLK —10— pF
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ILX511
Electro-optical Characteristics
(Ta = 25 °C, VDD = 5 V, Clock frequency: 1 MHz, Light source = 3200 K, IR cut filter: CM-500S (t = 1.0 mm),
Without S/H mode)
Item Symbol Min. Typ. Max. Unit Remarks
Sensitivity 1
Sensitivity 2
Sensitivity nonuniformity
Saturation output voltage
Dark voltage average
Dark signal nonuniformity
Image lag
Dynamic range
Saturation exposure
5 V current consumption
Total transfer efficiency
Output impedance
Offset level
R1 150 200 250 V/(lx • s)
R2 — 1800 — V/(lx • s)
PRNU — 5.0 10.0 %
VSAT 0.6 0.8 — V
VDRK — 3.0 6.0 mV
DSNU — 6.0 12.0 mV
IL — 1 — %
DR — 267 — —
SE — 0.004 — lx • s
I VDD — 5.0 10.0 mA
TTE 92.0 98.0 — %
ZO — 250 — Ω
VOS — 2.8 — V
Note 1
Note 2
Note 3
—
Note 4
Note 4
Note 5
Note 6
Note 7
—
—
—
Note 8
Note)
1. For the sensitivity test light is applied with a uniform intensity of illumination.
2. Light source: LED λ = 660nm
3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 1.
PRNU =
(VMAX-VMIN)/2
VAVE
× 100 (%)
The maximum output of all the valid pixels is set to VMAX, the minimum output to VMIN and the average
output to VAVE.
4. Integration time is 10ms.
5. Typical value is used for clock pulse and readout pulse. VOUT = 500 mV.
6. DR = VSAT/VDRK. When optical integration time is shorter, the dynamic range sets wider because dark
voltage is in proportion to optical integration time.
7. SE = VSAT/R1
8. Vos is defined as indicated below.
D30 D31 D32 S1
V
OUT
GND
Vos
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ILX511
1
2086
D38
D37
D36
D35
D34
D33
S2048
S2047
S2046
S2045
S4
S3
S2
S1
D32
D31
D30
D14
D13
D12
D11
D10
(6 pixels)
Dummy signal
signal (2048 pixels)
Effective picture elements
1-line output period (2086 pixels)
(18 pixels)
Optical black
)
DD
∗ Without S/H mode (4pin Æ V
2088 or more clock pulses are required.
3
2
1
0
5
Clock Timing Diagram (Without S/H mode)
φROG
0
5
φCLK
D5
D4
D3
D2
D1
∗
—4—
OUT
V
Dummy signal (32 pixels)
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ILX511
1
2086
D38
D37
D36
D35
D34
D33
S2048
S2047
S2046
S2045
S4
S3
S2
S1
D32
D31
D30
D13
D12
D11
D10
D9
(6 pixels)
Dummy signal
signal (2048 pixels)
Effective picture elements
1-line output period (2087 pixels)
(18 pixels)
Optical black
2088 or more clock pulses are required.
3
2
1
0
0
5
Clock Timing Diagram (With S/H mode)
φROG
0
5
φCLK
D5
D4
D3
D2
D1
D0
—5—
OUT
V
Dummy signal (33 pixels)
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φ
CLK Timing (For all modes)
ILX511
φCLK
Item
φ
CLK pulse rise/fall time
φ
CLK pulse duty (Note 1)
Note 1) 100 × t4 / (t3 + t4)
φ
ROG, φ CLK Timing
φROG
t1
t3
t2
t4
Symbol Min. Typ. Max. Unit
t1, t2 0 10 100 ns
—405060%
t6 t7 t8
φCLK
Item
φ
ROG, φ CLK pulse timing 1
φ
ROG, φ CLK pulse timing 2
φ
ROG pulse rise/fall time
φ
ROG pulse period
t5
t9
Symbol Min. Typ. Max. Unit
t5 0 3000 —
t9 1000 3000 —
t6, t8 0 10 —
t7 3000 5000 —
ns
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φ
CLK, VOUT Timing (Note 1)
φCLK
Vout
∗
Vout
(Note 2)
ILX511
(Note 3)
t10 t11
t12
Item
φ
CLK-VOUT 1
φ
CLK-VOUT 2
φ
CLK-VOUT∗(with S/H)
Symbol Min. Typ. Max. Unit
t10 40 115 280
t11 55 120 205 ns
t12 10 165 240
Note 1) fck = 1MHz, φCLK pulse duty = 50 %, φ CLK pulse rise/fall time = 10 ns
Note 2) Output waveform when internal S/H is in use.
Note 3)
indicates the correspondence of clock pulse and data period.
•
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1.0
0.8
0.6
0.4
Relative sensitivity
0.2
ILX511
Spectral sensitivity (Typ.) (Ta = 25°C)
0
400 500 600 700 800 900
MTF of main scanning direction (Typ.)
Spatial frequency (cycles/mm)
0 7.1 14.3 21.4 28.6 35.7
1.0
0.8
0.6
H–MTF
0.4
0.2
1000
Wavelength (nm)
Dark voltage rate vs. Ambient temperature (Typ.)
10.0
1.00
Dark voltage rate
0
0 0.2 0.4 0.6 0.8 1
Normalized spatial frequency τ=560nm
0.10
0 102030405060
Ta–Ambient temperature (°C)
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ILX511
Output voltage rate vs. Integration time (Typ.)
5
2.0
1.5
1
1.0
Output voltag rate
Current consumption rate
0.5
0.1
11050
0
0 0.5 1.0 1.5 2.0
τ int–Integration time (ms)
Current consumption rate vs. Clock frequency (Typ.)
Clock frequency (MHz)
Offset level vs. V
DD (Typ.)
3.2
3.0
2.8
–Offset level (V)
OS
V
2.6
2.4
4.5 4.75 5 5.25 5.5
VDD (V)
Offset level vs. Ambient temperature (Typ.)
3.2
3.0
2.8
–Offset level (V)
OS
V
2.6
2.4
0204060
Ta–Ambient temperature (°C)
—9—
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Application Circuit (Without S/H mode (Note))
10µ/16V
ILX511
5V
+
22 21 20 19 18 17 16 15 14 13 12
DD
DD
V
OUT
V
V
GND
DD
V
GND
GND
SHSW
GG
V
fCLK
GND
DD
V
1 2 3 4 5 6 7 8 9
GND
NC
DD
V
NC
NC
DD
V
NC
NC
10 11
GND
fROG
Output signal
3KΩ
2SA1175
φCLK
φROG
0.01µ
+
22µ/10V
Note) This circuit diagram is the case when internal S/H is not used.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party and other right due to same.
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Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling, be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive
shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensors.
e) For the shipment of mounted substrates use cartons treated for the prevention of static charges.
2) Notes on handling CCD Cer-DIP package
The following points should be observed when handling and installing this package.
a) (1) Compressive strength: 39N/surface
(Do not apply any load more than 0.7 mm inside the outer perimeter of the glass
portion.)
(2) Shearing strength: 29N/surface
(3) Tensile strength: 29N/surface
(4) Torsional strength: 0.9Nm
ILX511
Upper ceramic layer
Lower ceramic layer
39N
Low-melting glass
(1)
29N
29N
(3)(2)
0.9Nm
(4)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be
generated and the package may fracture, etc., depending on the flatness of the ceramic portion.
Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive.
c) Be aware that any of the following can cause the glass to crack because the upper and lower ceramic
layers are shielded by low-melting glass.
(1) Applying repetitive bending stress to the external leads.
(2) Applying heat to the external leads for an extended period of time with a soldering iron.
(3) Rapid cooling or heating.
(4) Applying a load or impact to a limited portion of the low-melting glass with a small-tipped tool such
as tweezers.
(5) Prying the upper or lower ceramic layers away at a support point of the low-melting glass.
Note that the preceding notes should also be observed when removing a component from a board
after it has already been soldered.
3) Soldering
a) Make sure the package temperature does not exceed 80 °C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded
30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool
sufficiently.
c) To dismount image sensors, do not use a solder suction equipment. When using an electric
desoldering tool, ground the controller. For the control system, use a zero cross type.
—11—
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ILX511
4) Dust and dirt protection
a) Operate in clean environments.
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces.
Should dirt stick to a glass surface blow it off with an air blower. (For dirt stuck through static
electricity, ionized air is recommended.)
c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to
scratch the glass.
d) Keep in case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
7) Make sure the input pulse should not be -1 V or below.
8) Normal output signal is not obtained immediately after device switch on. Use the output signal added
22500 pulses or above to φCLK clock pulse.
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Package Outline Unit : mm
6.46 ± 0.8
28.672 (14µm × 2048Pixels)
22
22pin DIP (400mil)
41.6 ± 0.5
ILX511
12
0° to 9°
V
5.0 ± 0.5
4.0 ± 0.5
H
1
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
No.1 Pixel
40.2
2.54 0.51
Cer-DIP
TIN PLATING
42 ALLOY
5.2g
9.0
10.0 ± 0.5
11
1. The height from the bottom to the sensor surface is 2.45 ± 0.3mm.
2. The thickness of the cover glass is 0.8mm, and the refractive index is 1.5.
3.65
4.45 ± 0.5
M
0.3
10.16
(AT STAND OFF)
0.25
—13—
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