Datasheet ILC7080, ILC7081 Datasheet (Fairchild)

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ILC7080/81

50/100mA SOT-23 CMOS RF LDO™ Regulators

Features

• Ultra low 1mV dropout per 1mA load

• 1% output voltage accuracy

• Uses low ESR ceramic output capacitor to minimize noise
and output ripple

• Only 100µA ground current at 100mA load

• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz

• Less than 80µV

• Excellent line and load transient response

•Over current / over temperature protection

• Guaranteed up to 80/150mA output current

• Industry standard five lead SOT-23 package

• Fixed 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0, 3.1V, 3.3V,

3.6V, 4.7V, 5.0V and adjustable output (ILC7081 only)
voltage options

• Metal mask option available for custom voltages between

2.5 to 5.1V

noise at BW = 100Hz to 100kHz

RMS

Applications

• Cellular phones

•Wireless communicators

•PDAs / palmtops / organizers

• Battery powered portable electronics

Description

The ILC7080/81 are 50 or 100mA low dropout (LDO)
voltage regulators designed to provide a high performance
solution to low power systems.

The devices offer a typical combination of low dropout and
low quiescent current expected of CMOS parts, while
uniquely providing the low noise and high ripple rejection
characteristics usually only associated with bipolar LDO
regulators.

The devices have been optimized to meet the needs of
modern wireless communications design; Low noise, low
dropout, small size, high peak current, high noise immunity.

The ILC7080/81 are designed to make use of low cost
ceramic capacitors while outperforming other devices that
require tantalum capacitors.

Typical Applications

V

OUT

C

OUT

V

IN

54

SOT-23-5

ILC7080
ILC7081

12

3

C

ON

OFF

NOISE

REV. 1.0.7 4/3/03

ILC7080/81

Pin Assignments

V

OUT

SOT23-5

C

45

NOISE

ILC7080-xx
ILC7081-xx

123

V

GND

IN

ON

OFF

Fixed Voltage Option

Pin Description ILC7080/81-xx

(fixed voltage version)

V

OUT

SOT23-5

ILC7081-ADJ

123

V

GND

IN

Adjustable Voltage Option

Pin Number Pin Name Pin Description

1V

IN

2 GND Ground pin. Local ground for C

3 ON/OFF

4C

5V

NOISE

OUT

Pin Description ILC7081-ADJ

Connect direct to supply

NOISE

and C

OUT

.

By applying less than 0.4V to this pin the device will be turned off.

Optional noise bypass capacitor may be connected between this pin and GND (pin

2). Do not connect C

Output Voltage. Connect C

(adjustable voltage version)

directly to the main power ground plane.

NOISE

between this pin and GND (pin 2).

OUT

Pin Number Pin Name Pin Description

1V

IN

2 GND Ground pin. Local ground for C

Connect direct to supply

NOISE

and C

OUT

.

3 ON/OFF By applying less than 0.4V to this pin the device will be turned off.

4V

ADJ

Voltage feedback pin to set the adjustable output voltage. Do not connect a
capacitor to this pin.

5V

OUT

Output Voltage. Connect C

between this pin and GND (pin 2).

OUT

V

45

ON

ADJ

OFF

Absolute Maximum Ratings

(Note 1)

Parameter Symbol Ratings Units

Input voltage
On/Off Input voltage

Output Current I

Output voltage V

Package Power Dissipation
(SOT-23-5)

Maximum Junction Temp Range T

Storage Temperature T

Operating Ambient Temperature T

Package Thermal Resistance q

V

V

ON/OFF

OUT

OUT

P

J(max)

STG

JA

IN

-0.3 to +13.5

-0.3 to V

IN

Short circuit protected mA

-0.3 to V

D

+0.3 V

IN

250

mW

(Internally Limited)

-40 to +150 °C

-40 to +125 °C

A

-40 to +85 °C

333 °C/W

Recommended Operating Conditions

Parameter Min. Typ. Max. Units

Input Voltage V

Operating Ambient Temperature -40 +85 °C

2

OUT

+V

DO

V

+1 13 V

OUT

REV. 1.0.7 4/3/03

V

∆

* ∆

2

35

∆

/ ∆

ILC7080/81

Electrical Characteristics

Unless otherwise specified, all limits are at T

ILC7080/81AIM5

=25°C;

A

= V

V

IN

OUT(NOM)

+1V,

I

OUT

= 1mA, C

= 1µF, V

OUT

Boldface type denotes specifications which apply over the specified operating temperature range.

Parameter Symbol Conditions Min. Typ. Max.

Input voltage Range V

Output voltage

V

Feedback Voltage
(ADJ version)

Line Regulation

(V

V

V

OUT

Dropout voltage
(Note 3)

V

IN

Ground Pin Current

I

Shutdown (OFF)
Current

ON/OFF

Input

Voltage
ON/OFF

Pin Input

Current
Peak Output

Current (Note 4)

I

ON/OFF

V

ON/OFF

I

IN( ON/OFF)

I

OUT(peak)

Output Noise
Voltage (RMS)

Ripple Rejection

V

OUT

OUT

ADJ

OUT

- V

GND

e

IN

N

I

= 1mA

OUT

I

1mA <
1mA <

/

V

V

)

IN

OUT

I

OUT

OUT(NOM)

7080/81 I

7080 only I

OUT

7081 only I

7080/81 I

7081 only I

V

ON/OFF

High = Regulator On
Low = Regulator Off

V

ON/OFF

V

ON/OFF

V

> 0.95V

OUT

BW=300Hz to 50kHz, C

C

= 4.7µF,

OUT

= 100mA

I

V

OUT

IN

< 100mA
< 100mA

+1V < V

< 12V 0.007 0.014

IN

= 0mA

OUT

(Note 4)
I

= 10mA 10 25

OUT

= 50mA 110 125

OUT

= 50mA 50 75

OUT

I

= 100mA 100 150

OUT

I

= 150mA 150 225

OUT

= 0mA 95 200

OUT

I

= 10mA 100 220

OUT

I

= 50mA 100 220

OUT

= 100mA 100 240

OUT

I

= 150mA 115 260

OUT

= 0V

= 0.6V, regulator OFF
= 2V, regulator ON

OUT(NOM)

, tpw=2ms 400 500 mA

NOISE

Freq. = 1kHz 85 dB
Freq. = 10kHz 70

=0.01µF 80 µV

213V

-1

V

OUT(NOM)

-1.5

-3.5

1.215

1.240 1.265

1.202

2.0

Freq. = 1MHz 60

Dynamic Line
Regulation

∆V

Dynamic Load
Regulation

∆V

Short Circuit Current I

OUT(line)

OUT(load)

SC

VIN: V

OUT(NOM)

tr/tf = 2µs; I

I

: 0 to 100mA;

OUT

)/dt = 100mA/µs with

d(I

OUT

= 0.47µF with

C

OUT

= 2.2µF

C

OUT

VOUT = 0V 600 mA

+1V to V

= 100mA

OUT

OUT(NOM)

+2V,

= 2V.

ON/OFF

Units

+1

%

1.5

+3.5

V

1.278

%/V

0.032

0.1 1

mV

150

100

200

300

µA

220

240

240

260

280

0.1 2

µA

V

0.6

0.3

µA

1

RMS

4mV

50

mV

25

REV. 1.0.7 4/3/03

3

ILC7080/81

Notes:

1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical

specifications do not apply when operating the device outside of its rated operating conditions.

2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods.

Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing.

3. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal

value measured with a 1V differential.

4. Guaranteed by design.

Operations

The ILC7080/81 LDO design is based on an advanced cir­cuit configuration for which patent protection has been
applied. Typically it is very difficult to drive a capacitive out­put with an amplifier. The output capacitance produces a
pole in the feedback path, which upsets the carefully tailored
dominant pole of the internal amplifier. Traditionally the
pole of the output capacitor has been “eliminated” by reduc­ing the output impedance of the regulator such that the pole
of the output capacitor is moved well beyond the gain band­width product of the regulator. In practice, this is difficult to
do and still maintain high frequency operation. Typically the
output impedance of the regulator is not simply resistive,
such that the reactive output impedance interacts with the
reactive impedance of the load resistance and capacitance.
In addition, it is necessary to place the dominant pole of the
circuit at a sufficiently low frequency such that the gain of
the regulator has fallen below unity before any of the com­plex interactions between the output and the load occur. The
ILC7080/81 does not try to eliminate the output pole, but
incorporates it into the stability scheme. The load and output
capacitor forms a pole, which rolls off the gain of the regula­tor below unity. In order to do this the output impedance of
the regulator must be high, looking like a current source.
The output stage of the regulator becomes a transconduc­tance amplifier, which converts a voltage to a current with a
substantial output impedance. The circuit which drives the
transconductance amplifier is the error amplifier, which
compares the regulator output to the band gap reference and
produces an error voltage as the input to the transconduc­tance amplifier. The error amplifier has a dominant pole at
low frequency and a “zero” which cancels out the effects of
the pole. The zero allows the regulator to have gain out to the
frequency where the output pole continues to reduce the gain
to unity. The configuration of the poles and zero are shown in
figure 1.

A block diagram of the regulator circuit used in the
ILC7080/81 is shown in figure 2, which shows the input-to­output isolation and the cascaded sequence of amplifiers that
implement the pole-zero scheme outlined above.

The ILC7080/81 were designed in a CMOS process with
some minor additions, which allow the circuit to be used at
input voltages up to 13V. The resulting circuit exceeds the
frequency response of traditional bipolar circuits. The
ILC7080/81 is very tolerant of output load conditions with
the inclusion of both short circuit and thermal overload
protection. The device has a very low dropout voltage,
typically a linear response of 1mV per milliamp of load
current, and none of the quasi-saturation characteristics of a
bipolar output device. All the good features of the frequency
response and regulation are valid right to the point where the
regulator goes out of regulation in a 4mV transition region.
Because there is no base drive, the regulator is capable of
providing high current surges while remaining in regulation.
This is shown in the high peak current of 500mA which
allows for the ILC7080/81 to be used in systems that require
short burst mode operation.

DOMINANT POLE

85 dB

OUTPUT POLE

GAIN

COMPENSATING

ZERO

UNITY GAIN

Instead of powering the critical circuits from the unregulated
input voltage, the CMOS RF LDO powers the internal

FREQUENCY

circuits such as the bandgap, the error amplifier and most of
the transconductance amplifier from the boot strapped regu-

Figure 1. LC7080/81 RF LDO frequency response

lated output voltage of the regulator. This technique offers
extremely high ripple rejection and excellent line transient
response.

4 REV. 1.0.7 4/3/03

INTERNAL V

DD

V

IN

C

NOISE

BANDGAP

REFERENCE

V

REF

ERROR

AMPLIFIER

FEEDBACK

TRANS-

CONDUCTANCE

AMPLIFIER

V

OUT

GND

ON/OFF

Figure 2. ILC7080/81 RF LDO regulator block diagram

ILC7080/81

Shutdown (ON/OFF) Operation

The ILC7080/81 output can be turned off by applying 0.4V
or less to the device’s ON/OFF

pin (pin 3). In shutdown
mode, the ILC7080/81 draws less than 1µA quiescent cur­rent. The output of the ILC7081 is enabled by applying 2V to
13V at the ON/OFF pin. In applications where the ILC7080/
81 output will always remain enabled, the ON/OFF pin may
be connected to VIN (pin 1). The ILC7080/81’s shutdown
circuitry includes hysteresis, as such the device will operate
properly even if a slow moving signal is applied to the ON/

pin.

OFF

Short Circuit Protection

The ILC7080/81 output can withstand momentary short
circuit to ground. Moreover, the regulator can deliver very
high output peak current due to its 1A instantaneous short
circuit current capability.

Thermal Protection

The ILC7080/81 also includes a thermal protection circuit
which shuts down the regulator when die temperature
exceeds 150˚C due to overheating. In thermal shutdown,
once the die temperature cools to below 140˚C, the regulator
is enabled. If the die temperature is excessive due to high
package power dissipation, the regulator’s thermal circuit
will continue to pulse the regulator on and off. This is called
thermal cycling.

Excessively high die temperature may occur due to high
differential voltage across the regulator or high load current
or high ambient temperature or a combination of all three.
Thermal protection protects the regulator from such fault
conditions and is a necessary requirement in today’s designs.
In normal operation, the die temperature should be limited to
under 150˚C.

Adjustable Output Voltage

Figure 3 shows how an adjustable output voltage can be
easily achieved using ILC7081-ADJ. The output voltage,

is given by the following equation:

V

OUT

V

= 1.24V x (R1/R2 + 1)

OUT

4

R

V

ON

2

ADJ

V

V

OUT

C

IN

OUT

C

R

1

SOT23-5

5

ILC7081-ADJ

123

IN

OFF

Figure 3. Application circuit for adjustable output voltage

For best results, a resistor value of 470kΩ or less may be
used for R2. The output voltage can be programmed from

2.5V to 12V.

Note: An external capacitor should not be connected to the
adjustable feedback pin (pin 4). Connecting an external
capacitor to pin 4 may cause regulator instability and lead to
oscillations.

REV. 1.0.7 4/3/03 5

ILC7080/81

Maximum Output Current

The maximum output current available from the ILC7080/81
is limited by the maximum package power dissipation as
well as the device’s internal current limit. For a given ambi­ent temperature, T

, the maximum package power dissipa-

A

tion is given by:

= (T

P

D(max)

where T
and θ

J(max)

= 333˚C/W is the package thermal resistance. For

JA

- TA) / θJA

J(max)

= 150˚C is the maximum junction temperature

example at TA = 85˚C ambient temperature, the maximum
package power dissipation is;

PD(max) = 195mW.

The maximum output current can be calculated from the fol­lowing equation:

I

OUT(max)

For example at VIN = 6V, V
maximum output current is I

< P

D(max)

/ (VIN - V

)

OUT

= 5V and TA = 85˚C, the

OUT

OUT(max)

< 195mA. At higher
output current, the die temperature will rise and cause the
thermal protection circuit to be enabled.

Application Hints

Figure 4 shows the typical application circuit for the
ILC7080/81.

V

OUT

SOT23-5

5

C

OUT

V

IN

ILC7080
ILC7081

123

4

C

NOISE

ON

OFF

Figure 4. Basic application circuit for fixed output voltage

Input Capacitor

An input capacitor CIN of value 1µF or larger should be con­nected from VIN to the main ground plane. This will help to fil­ter supply noise from entering the LDO. The input capacitor
should be connected as close to the LDO regulator input pin as
is practical. Using a high-value input capacitor will offer supe­rior line transient response as well as better power supply ripple
rejection. A ceramic or tantalum capacitor may be used at the
input of the LDO regulator.

Note that there is a parasitic diode from the LDO regulator out­put to the input. If the input voltage swings below the regulator’s

output voltage by a couple of hundred milivolts then the regula­tor may be damaged. This condition must be avoided. In many
applications a large value input capacitor, C
higher than V

and decay slower than V

OUT

, will hold VIN

IN

when the LDO is

OUT

powered off.

Output Capacitor Selection

Fairchild strongly recommends the use of low ESR (equivalent
series resistance) ceramic capacitors for C

OUT

and C

NOISE

. The
ILC7080/81 is stable with low ESR capacitor (as low as zero
Ω). The value of the output capacitor should be 1µF or higher.
Either ceramic chip or a tantalum capacitor may be used at the
output.

Use of ceramic chip capacitors offer significant advantages over
tantalum capacitors. A ceramic capacitor is typically consider­ably cheaper than a tantalum capacitor, it usually has a smaller
footprint, lower height, and lighter weight than a tantalum
capacitor. Furthermore, unlike tantalum capacitors which are
polarized and can be damaged if connected incorrectly, ceramic
capacitors are non-polarized. Low value ceramic chip capacitors
with X7R dielectric are available in the 100pF to 4.7µF range,
while high value capacitors with Y5V dielectric are available in
the 2200pF to 22µF range. Evaluate carefully before using
capacitors with Y5V dielectric because their ESR increases sig­nificantly at cold temperatures. Figure 10 shows a list of recom­mended ceramic capacitors for use at the output of ILC7080/81.

Note: If a tantalum output capacitor is used then for stable
operation we recommend a low ESR tantalum capacitor with
maximum rated ESR at or below 0.4Ω. Low ESR tantalum
capacitors, such as the TPS series from AVX Corporation
(www.avxcorp.com) or the T495 series from Kemet
(www.kemet.com) may be used.

In applications where a high output surge current can be
expected, use a high value but low ESR output capacitor for
superior load transient response. The ILC7080/81 is stable with
no load.

Noise Bypass Capacitor

In low noise applications, the self noise of the ILC7080/81 can
be decreased further by connecting a capacitor from the noise
bypass pin (pin 4) to ground (pin 2). The noise bypass pin is a
high impedance node as such, care should be taken in printed
circuit board layout to avoid noise pick-up from external
sources. Moreover, the noise bypass capacitor should have low
leakage.

Noise bypass capacitors with a value as low as 470pF may be
used. However, for optimum performance, use a 0.01µF or
larger, ceramic chip capacitor. Note that the turn on and turn off
response of the ILC7080/81 is inversely proportional to the
value of the noise bypass capacitor. For fast turn on and turn off,
use a small value noise bypass capacitor. In applications were
exceptionally low output noise is not required, consider omit­ting the noise bypass capacitor altogether.

6 REV. 1.0.7 4/3/03

ILC7080/81

The Effects of ESR (Equivalent
Series Resistance)

The ESR of a capacitor is a measure of the resistance due to the
leads and the internal connections of the component. Typically
measured in mΩ (milli-ohms) it can increase to ohms in some
cases.

Wherever there is a combination of resistance and current, volt­ages will be present. The control functions of LDOs use two
voltages in order to maintain the output precisely; V
V

.

REF

With reference to the block diagram in figure 2, V
back to the error amplifier and is used as the supply voltage for
the internal components of the 7080/81. So any change in V
will cause the error amplifier to try to compensate to maintain
V

at the set level and noise on V

OUT

will be reflected into

OUT

the supply of each internal circuit. The reference voltage, V
is influenced by the C

pin. Noise into this pin will add to

NOISE

the reference voltage and be fed through the circuit. These fac­tors will not cause a problem if some simple steps are taken.
Figure 5 shows where these added ESR resistances are present
in the typical LDO circuit.

I

V

OUT

OUT

I

R

C

C

SOT-23-5

C

OUT

5

4

ILC7080
ILC7081

V

IN

123

OUT

R*

C

OUT

is fed

NOISE

and

OUT

REF

Printed Circuit Board Layout
Guidelines

As was mentioned in the previous section, to take full advan­tage of any high performance LDO regulator requires paying
careful attention to grounding and printed circuit board
(PCB) layout.

I

V

,

Figure 7 shows the effects of poor grounding and PCB
layout caused by the ESR and PCB resistances and the
accumulation of current flows.

Note particularly that during high output load current, the
LDO regulator’s ground pin and the ground return for C
and C
ground. This is due to high frequency impedance caused by
PCB’s trace inductance and DC resistance. The current loop
between C
will degrade performance of the LDO.

OUT

OUT

R

PCB

I

1

C

OUT

ESR

I

2

R

PCB

5

SOT-23-5

R

PCB

ILC7080
ILC7081

V

IN

V

IN

123

R

R

PCB

PCB

Figure 6. Inherent PCB resistance

are not at the same potential as the system

NOISE

OUT

, C

and the LDO regulator’s ground pin

NOISE

4

ON

ESR

C

NOISE

OFF

OUT

TM

and C

ON

NOISE

OFF

V

OUT

5

ILC7080/81

V

IN

C

GND2

IN

SOT23-5

231

4

GND

C

ON/OFF

NOISE

C

OUT

LOAD

R*

RF LDO

C

IN

Figure 5. ESR in C

Regulator

OUT

With this in mind low ESR components will offer better perfor­mance as LDOs may be exposed to large transients of output
voltage, and current flows through the capacitors in order to fil­ter these transient swings. ESR is less of a problem with CIN as
the voltage fluctuations at the input will be filtered by the LDO.

However, being aware of these current flows, there is also
another potential source of induced voltage noise from the resis­tance inherent in the PCB trace. Figure 6 shows where the addi­tive resistance of the PCB can manifest itself. Again these
resistances may be very small, but a summation of several cur­rents can develop detectable voltage ripple and will be amplified
by the LDO. Particularly the accumulation of current flows in
the ground plane can develop significant voltages unless care is
taken.

With a degree of care, the ILC7080/81 will yield outstanding
performance.

REV. 1.0.7 4/3/03 7

True GND

(0V)

Figure 7. Effects of poor circuit layout

Figure 8 shows an optimum schematic. In this schematic,
high output surge current has little effect on the ground cur­rent and noise bypass current return of the LDO regulator.
Note that the key difference here is that C
directly connected to the LDO regulator’s ground pin. The
LDO is then separately connected to the main ground plane
and returned to a single point system ground.

I

LOAD

+I

+I

+I

C

OUT

C

NOISE

GND

GND1

I

LOAD

OUT

and C

GND3

NOISE

are

ILC7080/81

The layout of the LDO and its external components are also
based on some simple rules to minimize EMI and output
voltage ripple.

V

C

NOISE

231

Local

Ground

4

0.01µF

ON/OFF

5

ILC7080

SOT23-5

V

C
1µF

IN

IN

V

BATT

+

DC/DC
Converter

GND

OUT

C

OUT

4.7µF

ESR<0.5Ω

L
O
A
D

Ground PlaneGround Plane Ground PlaneGround Plane

Figure 9. Recommended application circuit layout

(not drawn to scale).

Figure 8. Recommended application circuit schematic

Note: ground plane is bottom layer of PCB and connects to

top layer ground connections through vias.

Evaluation Board Parts List For Printed Circuit Board Shown Above

Label Part Number Manufacturer Description

TM

U1 ILC7081AIM5-30 Fairchild Semi. 100mA RF LDO

J1 69190-405 Berg Connector, four position header

CIN GRM40 Y5V 105Z16 muRata Ceramic capacitor, 1µF,16V, SMT (size 0805)

CNOISE ECU-V1H103KBV Panasonic Ceramic capacitor, 0.01µF,16V, SMT (size 0603)

COUT GRM42-6X5R475K10 muRata Ceramic capacitor, 4.7µF,16V, SMT (size 1206)

Grounding Recommendations

1. Connect CIN between VIN of the ILC7080/81 and the “GROUND PLANE”.

2. Keep the ground side of C
PLANE”.

3. On multilayer boards use component side copper for grounding around the ILC7080/81 and connect back to a “GROUND
PLANE” using vias.

OUT

and C

connected to the “LOCAL GROUND” and not directly to the “GROUND

NOISE

regulator

4. If using a DC-DC converter in your design, use a star grounding system with separate traces for the power ground and the
control signals. The star should radiate from where the power supply enters the PCB.

Layout Considerations

1. Place all RF LDO related components; ILC7080/81, input capacitor CIN, noise bypass capacitor C
itor C

2. Keep the output capacitor C

as close together as possible.

OUT

OUT

as close to the ILC7080/81 as possible with very short traces to the V

3. The traces for the related components; ILC7080/81, input capacitor CIN, noise bypass capacitor C
itor C

can be run with minimum trace widths close to the LDO.

OUT

4. Maintain a separate “LOCAL GROUND” remote from the “GROUND PLANE” to ensure a quiet ground near the LDO.

Figure 9 shows how this circuit can be translated into a PCB layout.

8 REV. 1.0.7 4/3/03

and output capac-

NOISE

and GND pins.

OUT

and output capac-

NOISE

Recommended Ceramic Output Capacitors

ILC7080/81

C

OUT

Capacitor Size I

OUT

Dielectric Part Number Capacitor Vendor

1µF 0805 0 to 100mA X5R C2012X5R1A105KT TDK

“ 0805 “ X7R GRM40X7R105K010 muRata

“ 0805 “ X7R LMK212BJ105KG Taiyo-Yuden

“ 1206 “ X7R GRM42-6X7R105K016 muRata

“ 1206 “ X7R EMK316BJ105KL Taiyo-Yuden

“ 1206 “ X5R TMK316BJ105KL Taiyo-Yuden

2.2µF 0805 0 to 150mA X5R GRM40X5R225K 6.3 muRata

“ 0805 “ X5R C2012X5R0J225KT TDK

“ 1206 “ X5R EMK316BJ225ML Taiyo-Yuden

4.7µF 1206 0 to 150mA X5R GRM42-6X5R475K010 muRata

“ 1206 “ X7R LMK316BJ475ML Taiyo-Yuden

REV. 1.0.7 4/3/03 9

ILC7080/81

Typical Performance Characteristics

Unless otherwise specified TA =25˚C, VIN =V

OUT(NOM)

Characterization at output currents above 50mA applies to ILC7081.

, + 1V, ON/OFF pin tied to V

IN.

3.015

3.01

3.005

3

2.995

Output voltage (V)

2.99

2.985

-50

250

V

200

150

100

Dropout voltage (mV)

50

0

Output voltage vs Temperature

V

= 3.0V

OUT

C

= 0.47 µF (Ceramic)

OUT

050100 150

Temperature (°C)

Dropout voltage vs Temperature

= 0mA

I

OUT

I

OUT

I

OUT

= 3.0V

OUT

–40 8525

I

OUT

Temperature (°C)

= 150mA

= 100mA

= 50mA

Dropout Characteristics

3.4
V

= 3.3V

OUT

C

= 0.47 µF (Ceramic)

OUT

I

3.3

(V)

3.2

OUT

V

3.1

250

200

150

100

Dropout voltage (mV)

50

= 0mA

OUT

I

= 10mA

OUT

= 50mA

I

OUT

7081 only
I

OUT

I

OUT

3

3 3.2 3.4 3.6

VIN (V)

Dropout voltage vs I

V

= 3.0V

OUT

OUT

TA = 85°C

TA = 25°C

TA = –40°C

0

050100 150

Output Current (mA)

= 100mA

= 150mA

Ground Current vs Input voltage

150

V

= 3.0 V

OUT

C

= 0.47 µF (Ceramic)

125

100

(µA)

GND

I

OUT

I

OUT

= 150mA

I

OUT

75

50

24681012 14

= 50mA

I

= 100mA

OUT

VIN (V)

I

OUT

= 10mA

I

OUT

= 0mA

(V)

IN

V

(V)

OUT

V

6

5

4

3.01

3.00

2.99

2.98

Line Transient Response

VIN: tr/tf < 1 µs
V

= 3.0V

OUT

C

= 2.2 µF (Ceramic)

OUT

I

= 100 mA

OUT

5µs/div

10 REV. 1.0.7 4/3/03

Typical Performance Characteristics

Unless otherwise specified TA =25˚C, VIN =V

OUT(NOM)

Characterization at output currents above 50mA applies to ILC7081.

, + 1V, ON/OFF pin tied to V

ILC7080/81

IN.

(V)V

IN

V

3.01

3.00

(V)

2.99

OUT

2.98

(V)I

V

(mA)

Line Transient Response ILC7081

V

: tr/tf = 2 µs

IN

V

5

4

= 3.0V

OUT

I

= 100 mA

OUT

C

= 0.47 µF (Ceramic)

OUT

5µs/div

Load Transient Response

OUT

OUT

3.06

3.04

3.02

3.00

2.98

50

V

= 3.0 V

OUT

C

= 0.47 µF (Ceramic)

OUT

1

(V)V

IN

V

(V)

OUT

3.01

3.00

2.99

2.98

2.97

3.15

3.10

(V)

3.05

OUT

V

3.00

100

(mA)

OUT

I

Line Transient Response

5

4

VIN: tr/tf = 2 µs

= 3.0V

V

OUT

I

= 50 mA

OUT

C

= 0.47 µF (Ceramic)

OUT

5µs/div

Load Transient Response ILC7081

V

= 3.0V

OUT

C

= 0.47 µF (Ceramic)

OUT

1

3.15

3.10

(V)I

3.05

OUT

V

3.00

2.95

100

(mA)

OUT

100µs/div

Load Transient Response ILC7081

V

= 3.0V

OUT

C

= 1 µF || 0.47 µF (Ceramic)

OUT

1

100µs/div

VIN = 4V
Output Shorted to Gnd

at time,

1.5

1.0

(A)

SC

I

0.5

0

100µs/div

Short Circuit Current

t = 0

t = 0

5ms/div

Thermal Cycling

REV. 1.0.7 4/3/03 11

ILC7080/81

Typical Performance Characteristics

Unless otherwise specified TA =25˚C, VIN =V

OUT(NOM)

Characterization at output currents above 50mA applies to ILC7081.

, + 1V, ON/OFF pin tied to V

IN.

(V)
V

On/Off Transient Response

V

= 3.0V

OUT

= 10mA

I

3

OUT

(V)

2

V

OUT

1

C

= 0.47 µF (Ceramic)

OUT

0

1

5

ON/OFF

V

0

500µs/div

On/Off Transient Response ILC7081

4

V

= 3.0V

OUT

= 100mA

I

3

OUT

2

IN

V

ON/OFF

1

0

5

0

C

= 0.47 µF (Ceramic)

OUT

200µs/div

4

V

3

OUT

I

OUT

(V)

2

IN

V

1

0

5

ON/OFF

0

V

32.0

17.8

10.0

5.6

3.2

1.8

1.0

0.6

Noise (µV/Rt Hz)

0.3

0.2

0.1

On/Off Transient Response

= 3.0 V

= 50mA

C

= 0.47 µF (Ceramic)

OUT

200µs/div

Spectral Noise Density

V

= 3.0 V

OUT

= 50mA

I

OUT

CNOISE = 0.01 µF (ceramic)

C

= 0.47 µF (Ceramic)

OUT

C

= 1 µF (Ceramic)

OUT

C

= 2.2 µF (Ceramic)

OUT

C

= 4.7 µF (Ceramic)

OUT

1K

10K 100K 1M100

Freq (Hz)

32.0

17.8

10.0

5.6

3.2

1.8

1.0

0.6

Noise (µV/Rt Hz)

0.3

0.2

0.1

Spectral Noise Density

V

= 3.0 V

OUT

C

= 0.47µF (Ceramic)

OUT

C

= 0.01 µF (Ceramic)

NOISE

I

= 1mA

OUT

I

= 10 mA

OUT

I

= 50mA

OUT

I

= 100 mA

OUT

1K

10K 100K 1M100

Freq (Hz)

6.0

5.4

4.8

4.2

3.6

3.0

2.4

1.8

Noise (µV/Rt Hz)

1.2

0.6

Spectral Noise Density

with C

= 10µF (Ceramic)

OUT

(For Ultra Low Noise)

V

= 3.0 V

OUT

CNOISE = 1 µF (Ceramic)

VIN = 3.5V

VIN = 4V

VIN = 6V

V

= 8V

IN

0

1K 10K 100K100

Freq (Hz)

12 REV. 1.0.7 4/3/03

Typical Performance Characteristics

Unless otherwise specified TA =25˚C, VIN =V

OUT(NOM)

Characterization at output currents above 50mA applies to ILC7081.

, + 1V, ON/OFF pin tied to V

ILC7080/81

IN.

Ripple Rejection vs Frequency

100

V

= 3.0V

OUT

90

I

= 10mA

OUT

80

70

60

50

40

30

Ripple Rejection (dB)

20

10

0

C

= 4.7 µF (Ceramic)

OUT

C

OUT

Frequency (Hz)

= 2.2 µF (Ceramic)

1M 10M100K10K1K

Ripple Rejection vs Frequency

100

V

= 3.0V

OUT

90

I

= 100mA

OUT

80

70

60

50

40

30

Ripple Rejection (dB)

20

10

0

C

OUT

C

= 2.2 µF (Ceramic)

OUT

Frequency (Hz)

= 4.7 µF (Ceramic)

1M 10M100K10K1K

REV. 1.0.7 4/3/03 13

ILC7080/81

Package Outline Dimensions

Dimensions shown in inches and (mm).
5-Lead plastic surface mount (SOT-23-5)

0.122 (3.10)

0.106 (2.70)

0.071 (1.80)

0.055 (1.40)

0.055 (1.40)

0.0393 (1.0)

PIN 1

0.0059 (0.15)

0.0019 (0.05)

0.037 (0.95) BSC

0.019 (0.50)

0.0138 (0.35)

0.118 (3.00)

0.102 (2.60)

0.057 (1.45)

0.035 (0.90)

SEATING
PLANE

0.0078 (0.2)

0.0031 (0.08)

10°

0°

0.0217 (0.55)

0.0138 (0.35)

14 REV. 1.0.7 4/3/03

ILC7080/81

Ordering Information (T

= -40°C to +85°C)

A

ILC7080AIM5-xx

Output voltage (V) Grade Order Information *Package Marking Supplied as:

2.6 A ILC7080AIM526x CIx 3k Units on Tape and Reel

2.7 A ILC7080AIM527x CMx 3k Units on Tape and Reel

2.8 A ILC7080AIM528x CJ0x 3k Units on Tape and Reel

2.85 A ILC7080AIM5285x CFx 3k Units on Tape and Reel

2.9 A ILC7080AIM529x CKx 3k Units on Tape and Reel

3.0 A ILC7080AIM530x CAx 3k Units on Tape and Reel

3.1 A ILC7080AIM531x CLx 3k Units on Tape and Reel

3.3 A ILC7080AIM533x CBx 3k Units on Tape and Reel

5.0 A ILC7080AIM550x CCx 3k Units on Tape and Reel

* Note: First two characters identify the product and the last character identifies the lot code

ILC7081AIM5-xx

Output voltage (V) Grade Order Information *Package Marking Supplied as:

2.5 A ILC7081AIM525x CXx 3k Units on Tape and Reel

2.6 A ILC7081AIM526x CPx 3k Units on Tape and Reel

2.7 A ILC7081AIM527x CNx 3k Units on Tape and Reel

2.8 A ILC7081AIM528x CJx 3k Units on Tape and Reel

2.85 A ILC7081AIM5285x CVx 3k Units on Tape and Reel

2.9 A ILC7081AIM529x COx 3k Units on Tape and Reel

3.0 A ILC7081AIM530x CQx 3k Units on Tape and Reel

3.1 A ILC7081AIM531x CYx 3k Units on Tape and Reel

3.3 A ILC7081AIM533x CRx 3k Units on Tape and Reel

3.6 A ILC7081AIM536x CTx 3k Units on Tape and Reel

4.7 A ILC7081AIM547x CWx 3k Units on Tape and Reel

5.0 A ILC7081AIM550x CSx 3k Units on Tape and Reel

ADJ A ILC7081AIM5ADJx CUx 3k Units on Tape and Reel

* Note: First two characters identify the product and the last character identifies the lot code

Summary

ILC7080AIM5xx 50mA, fixed voltage

ILC7081AIM5xx 100mA, fixed voltage

ILC7081AIM5ADJ 100mA, adjustable voltage

REV. 1.0.7 4/3/03 15

ILC7080/81

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:

1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with

2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.

instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.

www.fairchildsemi.com

4/3/03 0.0m 001

2002 Fairchild Semiconductor Corporation

Stock#DS30007080