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Low Power Audio Amplifier
The IL34119 is a low power audio amplifier integrated circuit
intended (primarily) for telephone applications, such as in
speakerphones. It provides differential speaker outputs to maximize
output swing at low supply voltages (2.0 volts minimum). Coupling
capacitors to the speaker are not required. Open loop gain is 80 dB,
and the closed loop gain is set with two external resistors. A Chip
Disable pin permits powering down and/or muting the input signal.
The IL34119 is available in a standard 8 pin DIP or a surface mount
package.
•
Wide Operating Supply Voltage Range (2-16 Volts) - Allows
Telephone Line Powered Applications
•
Low Quiescent Supply Current for Battery Powered Applications
•
Chip Disable Input to Power Down the IC
•
Low Power Down Quiescent Current
•
Drives a Wide Range of Speaker Loads (8-100Ω)
•
Output Power Exceeds 250 mW with 32Ω Speaker
•
Low Total Harmonic Distortion
•
Gain Adjustable from <0 dB to >46 dB for Voice Band
•
Requires Few External Components
TECHNICAL DATA
IL34119
ORDERING INFORMATION
IL34119N Plastic
IL34119D SOIC
TA = -10° to 70° C for
all packages
SIMPLIFIED BLOCK DIAGRAM
PIN ASSIGNMENT
* = Optional
Differential Gain = 2 x
R
f
R
i
1
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IL34119
PIN DESCRIPTION
Pin Symbol Description
1 CD Chip Disable - Digital input. A Logic “0” (<0.8 V) sets normal operation. A Logic “1”
(≥2.0 V) sets the power down mode. Input impedance is nominally 90 KΩ.
2 FC2 A capacitor at this pin increases power supply rejection, and affects turn-on time. This
pin can be left open if the capacitor at FC1 is sufficient.
3FC1
4VINAmplifier input. The input capacitor and resistor set low frequency rolloff and input
5 VO1
6VCCDC supply voltage (+2.0 to +16 Volts) is applied to this pin.
7 GND Ground pin for the entire circuit.
8 VO2
Analog Ground for the amplifiers. A 1.0 µF capacitor at this pin (with a 5.0 µF
capacitor at Pin 2) provides 52 dB of power supply rejection. Turn-on time of the
circuit is affected by the capacitor on this pin. This pin can be used as an alternate
input.
impedance. The feedback resistor is connected to this pin and VO1.
Amplifier Output #1. The dc level is ≈ (V
- 0.7 V)/2.
CC
Amplifier Output #2. This signal is equal in amplitude, but 180° out of phase with that
at VO1. The dc level is ≈ (V
- 0.7 V)/2.
CC
DESIGN GUIDELINES
GENERAL
The IL34119 is a low power audio amplifier
capable of low voltage operation (V
= 2.0 V
CC
minimum) such as that encountered in line-powered
speakerphones. The circuit provides a differential
output (VO1-VO2) to the speaker to maximize the
available voltage swing at low voltages. The
differential gain is set by two external resistors. Pins
FC1 and FC2 allow controlling the amount of power
supply and noise rejection, as well as providing
alternate inputs to the amplifiers. The CD pin permits
powering down the IC for muting purposes and to
conserve power.
AMPLIFIERS
Referring to the block diagram, the internal
configuration consists of two identical operational
amplifiers. Amplifier #1 has an open-loop gain of
≥
80 dB (at f ≤ 100 Hz), and the closed loop gain is
set by external resistors R
unity gain stable, and has a unity gain frequency of
approximately 1.5 MHz. In order to adequately cover
the telephone voice band (300-340 Hz), a maximum
closed loop gain of 46 dB is recommended. Amplifier
#2 is internally set to a gain of -1.0 (0 dB).
The outputs of both amplifiers are capable of
and Ri. The amplifier is
f
sourcing and sinking a peak current of 200 mA. The
outputs can typically swing to within ≈0.4 volts above
ground, and to within ≈1.3 volts below V
, at the
CC
maximum current. The output dc offset voltage
(VO1-VO2) is primarily a function of the feedback
resistor (R
), and secondarily due to the amplifiers’
f
input offset voltages. The input offset voltage of the
two amplifiers will generally be similar for a
particular IC, and therefore nearly cancel each other
at the outputs. Amplifier #1’s bias current, however,
flows out of V
to shift negative by an amount equal to [R
(Pin 4) and thro ugh Rf, forcing VO1
IN
x IIB].
f
VO2 is shifted positive an equal amount. The output
offset voltage specified in the Electrical
Characteristics is measured with the feedback resistor
shown in the Simplified Block Diagram, and
therefore takes into account the bias current as well as
internal offset voltages of the amplifiers. The bias
current is constant with respect to V
CC
.
FC1 and FC2
Power supply rejection is provided by the
capacitors (C1 and C2 in the Simplified Block
Diagram) at FC1 and FC2. C2 is somewhat dominant
at low frequencies, while C1 is dominant at high
frequencies. The reguired values of C1 and C2
depend on the conditions of each application. A
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IL34119
line powered speakerphone, for example, will require
more filtering than a circuit powered by a well
requlated power supply. The amount of rejection is a
function of the capacitors, and the equivalent
impedance looking into FC1 and FC2 (listed in the
Electrical Characteristics as R
FC1
and R
FC2
).
In addition to providing filtering, C1 and C2 also
affect the turn-on time of the circuit at power-up,
since the two capacitors must cha nge up through the
internal 50 KΩ and 125 KΩ resistors.
CHIP DISABLE
The Chip Disable (Pin 1) can be used to power
down the IC to conserve power, or for muting, or
both. When at a Logic “0” (0 to 0.8 Volts), the
IL34119 is enabled for normal operation. When Pin 1
is at a Logic “1” (2.0 to V
Volts), the IC is
CC
disabled. If Pin 1 is open, that is eq uivalent to a Logic
“0”, although good design practice dictates that an
input should never be left open. Input impedance at
Pin 1 is a nominal 90 KΩ. The power supply current
(when disabled) is shown in Figure 1.
Muting, defined as the change in differential gain
from normal operation to muted operation, is in
excess of 70 dB. The turn-off time of the audio
output, from the application of the CD signal, is
<2.0 µs, and turn on-time is 12-15 ms. Both times are
independent of C1, C2, and V
CC
.
When the IL34119 is disabled, the voltages at
FC1 and FC2 do not change as they are powered
from V
. The outputs, VO1 and VO2, change to a
CC
high impedance condition, removing the signal from
the speaker. If signals from other sources are to be
applied to the outputs (while disabled), they must be
within the range of V
and Ground.
CC
POWER DISSIPATION
Figures 2-4 indicate the device dissipation (within
the IC) for various combinations of V
CC
, RL,
and load power.The maximum power which can
safely be dissipated within the IL34119 is found from
the following equation:
= (140°C - TA)/
P
D
θ
JA
where TA is the operating temperature;
θ
and
is the package thermal resistance (100°C/W
JA
for the standard DIP package, and 180°C/W for the
surface mount package).
The power dissipated within the IL34119, in a
given application, is found from the following
eguation:
P
= (VCC x ICC) + (I
D
where I
and I
and R
is obtained from Figure 1;
CC
is the RMS current at the load;
RMS
is the load resistance.
L
x VCC) - (RL x I
RMS
RMS
2
).
Figures 2-4, along with Figures 5-7 (distortion
curves), and a peak working load current of
±
200 mA, define the operating range for the
IL34119. The operating range is further defined in
terms of allowable load power in Figure 8 for load of
8.0 Ω, 16 Ω, and 32 Ω. The left (ascending) portion
of each of the three curves is defined by the power
level at which 10% distortion occurs. The center flat
portion of each curve is defined by the maximum
output current capability of the IL34119. The right
(descending) portion of each curve is defined by the
maximum internal power dissipation of the IC at
25°C. At higher operating be reduced according to
the above equations. Operating the device beyond the
current and junction temperature limits will degrade
long term reliability.
LAYOUT CONSIDERATIONS
Normally a snubber is not needed at the output of
the IL34119, unlike many other audio amplifiers.
However, the PC board layout, stray capacitances,
and the manner in which the speaker wires are
configured, may dictate otherwise. Generally the
speaker wires should be twisted tightly, and be not
more than a few inches in length.
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
I
V
V
CC
OUT
VO
Supply Voltage 1.0 to +18 V
Maximum Output Current at VO1, VO2
MaximumInput Voltage(F C1, FC2, CD, VIN) -1.0 toVCC +1.0 V
IN
±
250
Applied Output Voltage to VO1, VO2 when disabled -1.0 toVCC +1.0 V
Tstg Storage Temperature Range -65 to +150
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
mA
°
C
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IL34119
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
R
L
I
L
AVD Differential Gain (5.0 KHz bandwidth) 0 46 dB
VCD Voltage @ CD (Pin 1) 0 V
T
A
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
Supply Voltage 2.0 16 V
Load Impedance 8.0 100
Peak Load Current - 200 mA
Operating Temperature, All Pakage Types -10 +70
IN
or V
OUT
)≤VCC.
and V
IN
should be constrained to the range
OUT
CC
Ω
V
°
C
CC
).
ELECTRICAL CHARACTERISTICS
(TA = -10 to +70°C, VCD = 0 V)
Symbol Parameter Test Conditions
AMPLIFIERS (DC CHARACTERISTICS)
V
V
OH
V
OL
∆
V
I
IB
R
FC1
R
FC2
V
Output DC Level (VO1, VO2)
O
Output High Level I
Output Low Level I
Output DC Offset Voltage
O
(VO1-VO2)
V
=3.0 V, RL =16
CC
= 75 K
R
f
OUT
OUT
2.0 V ≤ V
V
CC
= 75 k
R
f
Ω
= -75 mA, VCC = 2.0 V 0.5 - V
= 75 mA,
≤ 16 V
CC
=6.0 V, RL =32
Ω
Input Bias Current @ VIN VCC =6.0 V - 1600 nA
Equivalent Resistance @ FC1 VCC = 6.0 V 100 220
Equivalent Resistance @ FC2 VCC = 6.0 V 18 40
Minimum High-Level Input
IH
Voltage
V
Maximum Low-Level Input
IL
Voltage
R
CD
Input Resistance VCC = VCD = 16 V 50* 175*
Guaranteed
Limits Unit
Min Max
Ω
0.75 1.75 V
-0.55V
Ω
-200 200 mV
Ω
K
Ω
K
2.0 - V
-0.8V
Ω
K
(continued)
4
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IL34119
ELECTRICAL CHARACTERISTICS
(TA = -10 to +70°C, VCD = 0 V)
Guaranteed
Symbol Parameter Test Conditions
Limits Unit
Min Max
AMPLIFIERS (AC CHARACTERISTICS)
A
r
VOL1
A
V2
AC Input Resistance (VIN) 22.5 -
i
Open Loop Gain (Amplifier
#1)
Closed Loop Gain (Amplifier
#2)
f = 100 Hz, VCC = 6.0 V,
V
= 2.65 V
FC2
f = 1.0 KHz, VCC = 6.0 V,
Ω
=32
R
L
60 - dB
-0.35 +0.35 dB
GBW Gain Bandwidth Product 1.125 - MHz
P
OUT3
P
OUT12
THD Total Harmonic Distortion
PSRR Power Supply Rejection
Output Power
V
= 3.0 V, RL = 16 Ω,
CC
THD ≤ 10%, V
= 12.0 V, RL = 100 Ω,
V
CC
THD ≤ 10%, V
V
= 6.0 V, RL = 32 Ω,
CC
f = 1.0 KHz, P
V
= 6.0 V, ∆VCC = 3.0 V,
CC
FC2
FC2
= 125 mW
OUT
= 1.15 V
=12 V
55
400*
-
-
-5.0%
35 - dB
C1 =∞, C2 = 0.01 µF
GMT Muting VCC = 6.0 V, f = 1.0 kHz,
50 - dB
CD = 2.0 V
POWER SUPPLY
I
I
CC1
CC2
Maximum Power Supply
Current
*
@25°C
V
=3.0 V, RL =∞,CD=0.8V
CC
=3.0 V, RL =∞,CD=2.0V
V
CC
-
-
5.0
125
M
mW
mA
µ
A
Ω
Figure 1. POWER SUPPLY CURRENT Figure 2. DEVICE DISSIPATION
ΩΩΩΩ
8.0
LOAD
5
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IL34119
Figure 3. DEVICE DISSIPATION
ΩΩΩΩ
16
LOAD
Figure 5. DISTORTION versus POWER
f = 1.0 kHz, AVD = 34 dB
Figure 4. DEVICE DISSIPATION
ΩΩΩΩ
32
LOAD
Figure 6. DISTORTION versus POWER
f = 3.0 kHz, AVD = 34 dB
Figure 7. DISTORTION versus POWER
f = 1, 3.0 kHz, AVD = 12 dB
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Figure 8. MAXIMUM ALLOWABLE LOAD
POWER
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