Datasheet IL145567 Datasheet (PCM)

Page 1
查询IL145567供应商
TECHNICAL DATA
IL145567
PCM CODEC - FILTER
IL145567N is a one-chip PCM-cofidec which converts speech signal into digital form and backwards. The IC is design to operate in synchronous and asynchronous systems and is comprised of:
- reference generator;
- filters on switching capacitors in transmission and receipt channels ;
- two operational amplifiers.
The IC does signal companding under the A-low and full differential processing of analogue signals for reduction of noises. Typical dissipated power is 40mW, under reduced power – 1 mW at ±5 V.
ORDERING INFORMATION
IL145567N Plastic DIP
TA = -40° to 85° C
GSX ANBL MCLK FS CLKSEL Vcc GND V
I-
VF
X
+
VF
X
COMP
VPO+
4 8
VPO−
4 VPI
O 8
VF
R
Active RC­filter of LF
Reference generator
Active RC­filter of LF
5-poles active filter
R-D-to-A
5-poles filter of LF
BB
3-poles filter of HF
С-D-to-A
Storage/hol ding circuit
Note – COMP – comparator
FSR MCLKX BCLKX PDN
X
Multi­plexer
/ BCLKR/
R
Control logic
Shift
register
Receivin
g latch
Transmitti ng register
Receiving
register
TSx
Dx
D
R
Figure 1 – Block diagram
1
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Pins description
Pin № Symbol Description
01 VPO+ Output of power OA 02 GND Common output 03 04 VPI Input of power OA 05 VFRO Output of digital signal audio frequency 06 Vcc Supply 5 V 07 FS 08 D 09 BCLKR/CLKSEL Input of clock oscillator and selector of basic oscillator frequency 10 MCLKR/PDN Input of main clock oscillator and underconsumption control 11 MCLKx Input of main clock oscillator for transmission
12 BCLKx
13 Dx Output of transmitted digital data 14 FSx Input of transmission cycle synchronisation
15
16 ANBL Input of feedback loop control 17 GSx Output of input OA 18 VFxI- Input of transmitted audio frequency (inverting) 19 VFxI+ Input of transmitted audio frequency (noninverting) 20 V
VPO −
R
R
TSx
BB
IL145567
Pin arrangement in package
Output of power OA
Input of receipt cycle synchronisation Input of digital data receipt
Input of clock oscillator for data transmission (synchronised with MCLKx)
Output of transmission temporary interval indicator
Supply minus 5 V
2
Page 3
Supply source
Characteristics
V
Supply voltage of constant current
CC
V
BB
Consumption power in active mode (without load)
VPI = V
BB
Consumption power in sleep mode (without load)
VPI = V
BB
Digital signal strength
(VCC = 5V ± 5%, VBB = -5V ± 5%, GNDA = 0V)
Characteristics Symbol Min Max Unit
Input voltage Low
Input voltage High V Output voltage Low
Output voltage High DX, I
Input current Low Input current High Output current in the third state
D
or
X
I
OL
OH
I
OH
GNDA ≤ V GNDA ≤ V GNDA ≤ D
TS ,
X
= 3.2mA = -3.2mA = -1.6mA
≤ V
in
CC
≤ V
in
CC
≤ V
X
CC
IL145567
min max
4.75
- 4.75
–
–
V
IL
IH
2.2 -
5.25
- 5.25 70 60
5.0
3.0
-
0.6
0.4
V
OL
V
OH
I
IL
I
IH
I
OZ
-
2.4
-0.5
V
CC
-10
-10
-10
-
­+10 +10 +10
Unit
V
mW
V
mkA
3
Page 4
Dynamic characteristics of digital signals
(VCC = 5V ± 5%, VBB = -5V ± 5%, values of all signals are indicated relatively to GNDA)
Characteristics Symbol min typical max Unit
IL145567
Frequencies of main clock oscillators MCLKX or
MCLK
R
Min width of high or low pulse MCLKX or
MCLK
R
Min width of high or low pulse BCLKX or
BCLK
R
Min width of low pulse FSX or FS
R
t
t
t Rise time t Fall time t Ratings of data bit synchronisation BCLKX or BCLK Presetting time of from low BCLKX to high MCLK Presetting time from high MCLKX to low BCLK
R
R
X
t
su(BRM)
t
su(MFB)
Holding time from low BCLKX (BCLKR) to high FSX (FSR) t Presetting time from high FSX (FSR) to low BCLKX (BCLKR) for
t
su(FB)
long frames Delay time from high BCLKX to setting correct data on D
Delay time from high BCLKX to low
TS
X
X
Delay time of inhibition of output data DX relatively to 8th clock pulse BCLK
X
Time of setting correct data after entry of signals FSX or BCLKX
t
t
d(BTS)
t
t ( the later of them) Time of presetting data DR relatively to clock pulse BCLK Holding time from low BCLKR to switching off D
R
R edge
Presetting time from high level FSX (FSR) to low level BCLKX (BCLK
) under synchronisation standard Short Frame
R
t
su(DB)
t
t
Holding time from low level BCLKX (BCLKR) to low level FSX
) for synchronisation Short Frame
(FS
R
Holding time from 2nd period of low level BCLKX (BCLKR) to low level FS
(FSR) for synchronisation Long Frame
X
t
h(BFI)
fm –
1.544
2.048
w(M)
w(B)
w(FL)
r
f
f
B
100
50
50 ns 50 ns 50 ns
128 4096 kHz
50 – ns 20 ns
h(BF)
20 ns 80
d(BD)
20 140 ns 20
d(ZC)
d(ZF)
50
20
0 – ns
h(BD)
su(F)
t
h(F)
50 ns 50
50
–
– MHz
–
ns
ns
ns
140 ns
140 ns
140 ns
ns
ns
50 ns
4
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IL145567
Analogue electrical characteristics
(VCC = 5V ± 5%, VBB = -5V ± 5%, VFXI- connected to GSX )
Characteristic min typical max Unit
VF
Input current (-2.5 V ≤ Vin ≤ 2.5 V)
I+, VFXI
X
Input impedance to GNDA at frequency 1 kHz VFXI+, VFXI Input capacitance VFXI+, VFXI Input bias voltage GSX Op Amp VFXI+, VFXI Range of input common-mode voltages VFXI+, VFXI-- 2.5 2.5 V Amplification ratio without feedback GSX Op Amp (R
≥ 10 kOhm)
load
Attenuation factor of in-phase components on out. VFXI+, VFXI- 65 dB Frequency band of unity gain on out. GSX Op Amp (R
≥ 10 kOhm)
load
Equivalent input noise between out. VFXI+, VFXI
- and
GS
X
Load capacitance for GSX Op Amp 0 100 pF Output range of voltages for GS
Output current (-2.8 V ≤ V
≤ 2.8 V)
out
X
R
= 10 kOhm relat. GNDA
load
= 600 Ohm relat. GNDA
R
load
GS
, VFRO ± 5.0 – mA
X
Output impedance on out. VFRO in the frequency range from 0 to 3.4 kHz 1 Ohm Load capacitance for output VFRO 0 500 pF Bias voltage for output VFRO relatively to GNDA – ± 100 mV Noise abatement on supply on transmission (+) – from 0 to 100 kHz; (-) - from 0 to 100 kHz;
– – ± 0.2 mkA
­10 – MOhm
-
– 10 pF
-
– ± 25 mV
-
75 – dB
1000 kHz
-20 dBm
- 3.5
- 2.8
45
+ 3.5 + 2.8
V
dB
45
5
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c
Analogue transmission characteristics
(VCC = 5 V ± 5%, VBB = -5 V ± 5%, GNDA = 0 V, dBm0 = 1.2276Vrms = 4 dBm with load 600 Ohm,
= FSR = 8 kHz, BCLKX = MCLKX = 2.048 MHz at synchronous operation, VF
FS
X
Through
Characteristic
channel
min max min max min max
Change of amplification ratio (relatively to level 0 dBm0 on frequency 1.02 kHz, T
= 5V, VBB = -5V)
V
CC
Change of amplification ratio depending on temperature
= 25 °С, at
A
0 to 70°С
–40 to + 85°С
Change of amplification ratio depending on supply
voltage (V Change of amplification ratio depending on signal strength (relatively to level -10 dBm0 on frequency 1.02 kHz) * Total distortions of signal at frequency 1 kHz
= 5V, ± 5%, VBB = 5V ±5%)
CC
from –40 to –50 dB from –50 to –55 dB
from 3 to –40 dB
3 dBм0
0 ÷ - 30 dBm0
-40 dBm0
-45 dBm0
-55 dBm0 Total distortions with pseudonoise as per CCITT G.714
-3 dBm0
6 ÷ - 27 dBm0
-34 dBm0
-40 dBm0
-55 dBm0
– – -0.25 0.25 -0.25 0.25 dB
–
–
–
–
– – –
-0.4
-0.8
-1.6
33
0.4
0.8
1.6
– 33 35 29 24 15
27.5
– 28 35
33.1
28.2
13.2
I
connected to GSX)
-
X
Channel AD Channel DA
–
±0.03 ±0.06
–
±0.02 – ±0.02 dB
-0.2
0.2
-0.4
0.4
-0.8
0.8
36 30 25 15
35.5
33.5
28.5
13.5
–
±0.03
–
±0.06
-0.2
-0.4
-0.8
– 33
36 30 25 15
– 28.5
36
34.2 30 15
-0.2
-0.4
-0.8
– dB
– dB
IL145567
Unit
dB
dB
Noise of "silent" channel (for trough channel and channel AD psophometrically weighted) Amplitude-frequency characteristi (AFC). (Relatively to level 0 dBm0 at frequency 1.02 kHz) *
15 Hz 50 Hz 60 Hz
200 Hz
from 300 to 3000 Hz
3300 Hz 3400 Hz 4000 Hz
4600 Hz Noise level in the frequency range from 300 to 3000 Hz (relatively to level 0 dBm0 at frequency 1.02 kHz under transmission and receipt) * Attenuation of parasitic harmonics beyond the limits of gating frequency VFRO VFRO
from 4600 to 7600 Hz from 7600 to 8400 Hz
from 8400 to 100000 (Relatively to input signal of frequency 300–3400 Hz and level 0 dBm0)
– -70 – -70 – -83 dBm
– – – –
-0.3
-0.70
-1.6 – –
-40
-30
-26
0.3
0.3
-28
-60
–
-40
-0.15
–
-30
-0.15
–
-26
-0.15
–
-1.0
-0.4
-0.15
-0.15
0.15
-0.15
-0.35
0.15
-0.35
0
-0.8
0
-0.8
–
-14
–
-32
0 0 0 0
0.15
0.15 0
–
-14
–
-30
– -48 – -48 – -48 dB
–
-30
–
-40
–
-30
–
–
–
-30
–
–
–
-40
–
–
–
-30
Hz
dB
dB
6
Page 7
IL145567
G
m
V
t
continued
Trough
Characteristic
channel
min max min max min max
Noise of "silent" selected channel (for frequency
– -70 – – – -70 dBm 8 kHz. Input – GNDA) Absolute delay (on frequency 1600 Hz) – – – 315 – 215 mks Group delay relatively to signal of frequency 1600 Hz
500 ÷ 600 Hz
– – – 220
600 ÷ 800 Hz
800 ÷ 1000 Hz 1000 ÷ 1600 Hz 1600 ÷ 2600 Hz 2600 ÷ 2800 Hz 2800 ÷ 3000 Hz
Crosstalk of signal of frequency 1020 Hz for AD or DA – – – -75 – -75 dB Intermodulation distortions of two signals with amplitude from minus 4 to minus 21 dBm0 for the range 300 ÷ 3400 Hz
*
Parameters of the channels А/D and D/А are guaranteed by measuring through channel parameters
– -41 – -41 – -41 dB
Channel AD Channel DA
145
75 40
75 105 155
-40
-40
-40
-30
– – – –
–
90 125 175
Unit
mks
Power OA
Characteristic min typical max Unit
Input current (-1 V ≤ VPI ≤ 1V) Input resistance (-1 V ≤ VPI ≤ 1 V)
VPI – –
VPI 5 10 – MOhm Input bias voltage (VPI connected to VPO-) VPI – – ± 50 mV Output resistance VPO–or VPO+ – 1 – Ohm Amplification ratio from VPO– to VPO+ (R
= 300 Ohm, VPO+ to
load
– -1 – V/V
NDA, level on VPO– equals 1.77Vrms, 3 dBm0)
Maximum level 0 dBm0 for better than ± 0.1 dB linearity in the range
ore than from –10 dBm0 to 3 dBm0 (for R
between VPO+ and VPO)
load
R
= 600 Ohm
load
= 1200 Ohm
R
load
= 10 кOhm
R
load
Noise attenuation on supply on Vcc or VBB (VPO- connected to VPI)
PO–or VPO+ connected to GNDA
0 – 4 kHz
4 – 50 kHz
Differential noise attenuation on supply on Vcc or V
(VPO- connected
BB
o VPI), VPO– connected to VPO+ , 0 – 50 kHz
Load capacitance (R
*
dBm0 = 1.2276Vrms = 4 dBm
≥ 300 Ohm )
load
VPO+ or VPO– to GNDA 0 1000
3.3
3.5
4.0
55 35
50
– – Vrms *
dB
dB
± 0.5 mkA
7
Page 8
IL145567
TSx
MCLK MCLK
BCLK
FSx
Dx
BCLK
FS
R
t
d(BTS)
X
R
t
SU(BRM)
X
t
SU(F)
t
H(BF)
R
t
SU(F)
t
H(BF)
t
t
1
H(F)
1
H(F)
MSB
2
2
t
d(BD)
CH1
t
SU(DB)
3
CH2
3
4
4
t
W(M)
CH3
t
W(M)
t
SU(MFB)
5
67
t
W(B)
t
W(B)
ST1 ST2 ST3
5
67
t
d(ZC)
8
LSB
8
t
d(ZC)
9
9
D
R
At Short Frame synchronisation, synchronisation pulses FSx or FS
of clock generator MCLK pulses.
Figure 3 – Time diagram at Short Frame synchronisation
MSB
CH1
CH2
t
H(BD)
CH3
ST1 ST2 ST3
should have duration equal to duration
R
t
H(BD)
LSB
8
Page 9
MCLK MCLK
FSx
IL145567
X
R
t
t
SU(BRM)
SU(MFB)
BCLK
Dx
BCLK
FS
t
H(BF)
t
SU(FB)
X
1
t
d(ZF)
MSB
R
1
t
SU(FB)
t
H(BF)
R
t
d(ZF)
2
CH1
2
t
H(BFI)
3
3
t
H(BFI)
t
d(BD)
CH2
t
SU(DB)
4
4
CH3
5
67
ST1 ST2 ST3
t
H(BD)
5
67
t
d(ZC)
t
H(BD)
8
LSB
8
9
t
d(ZC)
9
D
R
At Long Frame synchronisation, synchronisation pulses FSx or FS
of clock generator MCLK.
MSB
CH1
CH2
CH3
ST1 ST2 ST3
should have duration not less than 3 bits
R
Figure 4 – Time diagram at Long Frame synchronisation
LSB
9
Page 10
Package Dimension
A
20
1
N SUFFIX PLASTIC DIP
(MS - 001AD)
11
B
10
IL145567
Di mens i on, mm
Symbol MIN MAX
A
B
24.89 26.92
6.10 7.11
F
C
SEATING
-T-
N
G
NOTES:
1.
Dimensions “A”, “B” do not include mold flash or protrusions.
0.25 (0.010) M T
D
PLANE
K
Maximum mold flas h or prot rusion s 0.25 mm (0.010) per s ide.
2.54
7.62
5.33
10
°
C
L
D
F
0.36 0.56
1.14 1.78
G
H
M
H
J
J
K
L
M
N
0
°
2.92 3.81
7.62 8.26
0.20 0.36
0.38
10
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