Datasheet IFN112 Datasheet (Interfet)

D-4 01/99
IFN112
N-Channel Silicon Junction Field-Effect Transistor
¥ Low-Noise, High Gain ¥ Equivalent to Japanese 2SK112
Absolute maximum ratings at TA= 25¡C
TOÐ18 Package
Dimensions in Inches (mm)
Pin Configuration
1 Source, 2 Drain, 3 Gate & Case
At 25°C free air temperature: IFN112 Process NJ132H Static Electrical Characteristics Min Max Unit Test Conditions
Gate Source Breakdown Voltage V
(BR)GSS
– 50 V IG= – 1 µA, VDS= ØV
Gate Reverse Current I
GSS
– 0.1 nA VDS= ØV, VGS= – 30V
Gate Source Cutoff Voltage V
GS(OFF)
– 0.25 – 1.2 V VDS= 15V, ID= 100 nA
Drain Saturation Current (Pulsed) I
DSS
1.2 9.0 mA VDS= 15V, VGS= ØV
Dynamic Electrical Characteristics
Common Source Forward Transconductance g
fs
734mSVDS= 15V, VGS= ØV f = 1 kHz
Typ
Common Source Input Capacitance C
iss
12 pF VDS= 15V, VGS= ØV f = 1 MHz
Common Source Reverse Transfer Capacitance C
rss
3pFV
DS
= 15V, VGS= ØV f = 1 MHz
Equivalent Short Circuit Input Noise Voltage ¯e
N
2.5 nV/Hz VDS= 10V, ID= 5.0 mA f = 1 kHz
1000 N. Shiloh Road, Garland, TX 75042 (972) 487-1287 FAX (972) 276-3375
www.interfet.com
Databook.fxp 1/13/99 2:09 PM Page D-4
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