Datasheet IDT74FST16163P245PV, IDT74FST16163P245PF, IDT74FST16163P245PA, IDT74FST16163245PV, IDT74FST16163245PF Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Bus switches provide zero delay paths

• Extended commercial range of –40°C to +85°C

• Low switch on-resistance:
FST163xxx – 5Ω
FST163Pxxx – 5Ω with precharge

• TTL-compatible input and output levels

• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)

• Available in SSOP, TSSOP and TVSOP

COMMERCIAL TEMPERATURE RANGE FEBRUARY 1997

1997 Integrated Device Technology, Inc. DSC-3513/-

1

IDT74FST163245

IDT74FST163P245

ADVANCE INFORMATION

16-BIT BUS SWITCH

no noise of their own while providing a low resistance path for
an external driver. These devices connect input and output
ports through an n-channel FET. When the gate-to-source
junction of this FET is adequately forward-biased the device
conducts and the resistance between input and output ports
is small. Without adequate bias on the gate-to-source junction
of the FET, the FET is turned off, therefore with no VCC
applied, the device has hot insertion capability.

The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.

The FST163245 and FST163P245 are 16-bit TTL-compat­ible bus switches. The OE pins provide enable control. The

FST163P245 supports precharge on the B port. So when

OE

is high, A and B ports are isolated and B outputs are precharged
to the bias voltage through the equivalent of a 10KΩ resistor
(1B1-8 precharged to VBIAS1 and 2B1-8 precharged to VBIAS1).

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION:

The FST163245/163P245 belong to IDT's family of Bus
switches. Bus switch devices perform the function of connect­ing or isolating two ports without providing any inherent
current sink or source capability. Thus they generate little or

PIN DESCRIPTION

1A1 1B1

1A8

1B8

2B1

2B8

2A1

2A8

1OE

2OE

1A1 1B1

1A8

1B8

2B1

2B8

2A1

2A8

1OE

2OE

VBIAS1

VBIAS1

FST163245 FST163P245

3513 drw 01

Pin Names I/O Description

1A1-8, 2A1-8 I/O Bus A

1B1-8, 2B1-8 I/O Bus B

1OE, 2

OE

I Bus Switch Enable (Active LOW)

VBIAS1 I Precharge Reference Voltage

3513 tbl 01

2

IDT74FST163245, IDT74FST163P245
16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE

ABSOLUTE MAXIMUM RATINGS

(1)

PIN CONFIGURATION

5

6
7
8
9
10

1
2

3
4

46

45
44

43
42
41

40
39

38

37

GND

1B1

1

B2

GND

1B3

1

B4

VCC

1

B5

1

B6

1

A2

GND

1A3

1

A4

VCC

1

A5

1

A6

GND

1OE
1A1

*NC/**VBIAS1

1B7

11

12

47

48

1B8

1

A7

1

A8

17

18
19

20
21
22

13
14

15
16

34

33
32

31
30
29

28
27

26
25

2B7

2

B2

GND

2B3

2

B4

VCC

2

B5

2

B6

GND

GND

2A3

2

A4

VCC

2

A5

2

A6

GND

2A7

2

A1

2

A2

2

B1

SO48-1
SO48-2
SO48-3

2B8

23
24

35

36

*NC/**GND

2A8

2

OE

SSOP/

TSSOP/TVSOP

TOP VIEW

*FST163245
**FST163P245

3513 drw 02

FUNCTION TABLE

3513 tbl 03

Inputs

x

OE

OE

Outputs

L Bus B Data to Bus A
H High Z State (163245)

Precharge Bus B to V

BIAS (163P245)

3513 tbl 02

CAPACITANCE

(1)

Symbol Description Max. Unit

VTERM

(2)

Terminal Voltage with Respect
to GND

–0.5 to +7.0 V

TSTG Storage Temperature –65 to +150 °C
IOUT Maximum Continuous Channel

Current

128 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating condiitions for extended
periods may affect reliability.

2. VCC, Control and Switch terminals.

Symbol Parameter Conditions

(2)

Typ. Unit

CIN Control Input Capacitance 4 pF
CI/O

Switch Input/Output
Capacitance

Switch Off

pF

3513 tbl 04

NOTES:

1. Capacitance is characterized but not tested

2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V

IDT74FST163245, IDTFST163P245
16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE

3

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10%

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

VIH Input HIGH Voltage Guaranteed Logic HIGH for Control Inputs 2.0 — — V
VIL Input LOW Voltage Guaranteed Logic LOW for Control Inputs — — 0.8 V
II H Input HIGH Current VCC = Max. VI = VCC ——±1µA
II L Input LOW Voltage VI = GND — — ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC ——±1µA
IOZL (3-State Output pins) VO = GND — — ±1
IOS Short Circuit Current VCC = Max., VO = GND

(3)

— 300 — mA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
RON Switch On Resistance

(4)

VCC = Min. VIN = 0.0V 163xxx, — 5 7 Ω
ION = 30mA 163Pxxx

VCC = Min. VIN = 2.4V 163xxx, — 10 15 Ω

ION = 15mA 163Pxxx
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 4.5V — — 1 µA
IO Precharge Output Current

(5)

VCC = Min., BIASV = 2.4V, VO = 0V 0.15 — — mA
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.1 3 µA

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. Measured by voltage drop between ports at indicated current through the switch.

5. This parameter applies to the FST163P245 only.

3513 tbl 05

4

IDT74FST163245, IDT74FST163P245
16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE

POWER SUPPLY CHARACTERISTICS

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10%

3513 tbl 06

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

∆ICC Quiescent Power Supply Current

TTL Inputs HIGH

VCC = Max.
V

IN = 3.4V

(3)

— 0.5 1.5 mA

ICCD Dynamic Power Supply

Current

(4)

VCC = Max.
Outputs Open

VIN = VCC
VIN = GND

—3040µA/

MHz/
Enable Pin Toggling
50% Duty Cycle

Switch

IC Total Power Supply Current

(6)

VCC = Max.
Outputs Open
Enable Pins Toggling

VIN = VCC
VIN = GND

— 4.8 6.4 mA

(16 Switches Toggling)
fi = 10MHz
50% Duty Cycle

VIN = 3.4
V

IN = GND

— 5.3 7.9

Symbol Description Condition

(1)

Min.

(2)

Typ.

Max. Unit

tPLH
tPHL

Data Propagation Delay
Ai to Bi, Bi to Ai

(3,4)

CL = 50pF

R

L = 500Ω

— — 0.25 ns

tPZH
tPZL

Switch Turn on Delay

OE

to Ai, Bi

1.5 — 6.5 ns

tPHZ
tPLZ

Switch Turn off Delay

OE

to Ai, Bi

1.5 — 5.5 ns

|QCI| Charge Injection

(5,6)

— 1.5 — pC

NOTES:

1. See test circuit and waveforms.

2. Minimum limits guaranteed but not tested.

3. This parameter is guaranteed by design but not tested.

4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 2.5ns for 50pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay on the bus switch when used in a system is determined by the driving circuit on the
driving side of the switch and its interaction with the load on the driven side.

5. Measured at switch turn off, load = 50 pF in parallel with 10MΩ scope probe, VIN = 0.0 volts.

6. Characterized parameter. Not 100% tested.

3513 tbl 07

IDT74FST163245, IDTFST163P245
16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE

5

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

SWITCH POSITION

Pulse

Generator

R

T

D.U.T.

V

CC

V

IN

C L

V

OUT

50pF

500Ω

500Ω

7.0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

tSU

tH

tREM

tSU

tH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

tW

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V
0V

1.5V

V

OH

tPLH

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V
0V

tPLH tPHL

tPHL

VOL

CONTROL

INPUT

3V

1.5V
0V

3.5V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH
CLOSED

SWITCH
OPEN

VOL

0.3V

0.3V

t

PLZtPZL

tPZH tPHZ

3.5V

0V

1.5V

1.5V

ENABLE DISABLE

VOH

PRESET

CLEAR

CLOCK ENABLE

ETC.

ENABLE AND DISABLE TIMES

PROPAGATION DELAY

PULSE WIDTH

SET-UP, HOLD AND RELEASE TIMES

Test

Switch

Disable Low

Enable Low

Closed

All Other Tests

Open

Open Drain

DEFINITIONS:

CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

3513 lnk 08

3513 lnk 03

3513 lnk 04

3513 lnk 05

3513 lnk 06

3513 lnk 07

6

IDT74FST163245, IDT74FST163P245
16-BIT BUS SWITCH COMMERCIAL TEMPERATURE RANGE

ORDERING INFORMATION

IDT XX

Temp. Range

16 XX

Device Type

X

Package

74 –40°C to +85°C

PV
PA
PF

163245
163P245

Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)

16-Bit Bus Switch
16-Bit Bus Switch with Precharge

FST

3513 drw 08