Datasheet IDT74FST16163233PV, IDT74FST16163233PF, IDT74FST16163233PA Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Bus switches provide zero delay paths

• Extended commercial range of –40°C to +85°C

• Low switch on-resistance:
FST163xxx – 7Ω

• TTL-compatible input and output levels

• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)

• Available in SSOP, TSSOP and TVSOP

COMMERCIAL TEMPERATURE RANGE AUGUST 1996

1996 Integrated Device Technology, Inc. DSC-3512/1

1

IDT74FST163233

ADVANCE INFORMATION

16-BIT 2:1 MUX/DEMUX
SWITCH

their own while providing a low resistance path for an external
driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this
FET is adequately forward-biased the device conducts and
the resistance between input and output ports is small. With­out adequate bias on the gate-to-source junction of the FET,
the FET is turned off, therefore with no VCC applied, the device
has hot insertion capability.

The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.

The FST163233 provides three 16-bit TTL-compatible
ports that support 2:1 multiplexing. The SEL

0,1 and TEST0,1

pins provide switch enable and mux select control as shown
below.

The A port can be connected to port 1B or port 2B or both
ports 1B and 2B.

PIN DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

SEL0

One of Eight
Channels

TEST0

0A

1-8

2B1-

8

1B1-

8

SEL1

One of Eight
Channels

TEST1

1A

9-16

2B9-

16

1B9-

16

Pin Names I/O Description

A, 1B, 2B I/O Buses A, 1B, 2B

SEL

0-1,

TEST

0-1

I Control Pins for Mux and Switch

Enable Functions

3512 tbl 01

3512 drw 01

DESCRIPTION:

The FST163233 belongs to IDT's family of Bus switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of

2

IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

ABSOLUTE MAXIMUM RATINGS

(1)

PIN CONFIGURATION

FUNCTION TABLE

SSOP/

TSSOP/TVSOP

TOP VIEW

5

6
7
8
9

10

1
2

3
4

54
53
52

51
50
49

48
47

46
45

0A

7

1B2
2B2

0A3
1B4

2B4

0A5
1B6
2B6

0A2

1B3
2B3

0A4
1B5

0A6
1B7

1B1
2B1

1B8

11
12

55

56

2B

8

2B7
0A8

17

18
19
20
21
22

13
14

15
16

42
41
40

39
38
37

36
35

34
33

1B

14

VCC

1A9

1B10

GND

2B

10

1A11

1B12
2B12
1A13

1B9

2B9
1A10
1B11
2B11
1A12
1B13
2B13

GND
V

CC

SO56-1
SO56-2
SO56-3

2B

14

23
24

43

44

1A

15

1A14
1B15

25
26

32
31

30
29

2B

16

1B16 2B15

1A16

TEST0

27
28

TEST

1

SEL0
SEL1

0A1

2B5

SEL

0

TEST

0

Function

L L 0A to 1B

H

L

0A to 2B

X H 0A to 1B and

0A to 2B

SEL

1

TEST

1

Function

L L 1A to 1B
H L 1A to 2B
X H 1A to 1B and

1A to 2B

3512 drw 02

3512 tbl 04

Symbol Description Max. Unit

VTERM

(2)

Terminal Voltage with Respect
to GND

–0.5 to +7.0 V

TSTG Storage Temperature –65 to +150 °C
IOUT Maximum Continuous Channel

Current

128 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating condiitions for extended
periods may affect reliability.

2. V

CC, Control and Switch terminals.

3512 tbl 02

CAPACITANCE

(1)

Symbol Parameter Conditions

(2)

Typ. Unit

CIN Control Input Capacitance 4 pF
CI/O

Switch Input/Output
Capacitance

Switch Off

pF

3512 tbl 03

NOTES:

1. Capacitance is characterized but not tested

2. T

A = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V

IDT74FST163233
16-BIT MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

3

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10%

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

CC = 5.0V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. Measured by voltage drop between ports at indicated current through the switch.

3512 tbl 05

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

VIH Input HIGH Voltage Guaranteed Logic HIGH for Control Inputs 2.0 — — V
VIL Input LOW Voltage Guaranteed Logic LOW for Control Inputs — — 0.8 V
II H Input HIGH Current VCC = Max. VI = VCC ——±1µA
II L Input LOW Voltage VI = GND — — ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC ——±1µA
IOZL (3-State Output pins) VO = GND — — ±1
IOS Short Circuit Current VCC = Max., VO = GND

(3)

— 300 — mA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
RON Switch On Resistance

(4)

VCC = Min., VIN = 0.0V — 5 7 Ω
ION = 12mA
VCC = Min., VIN = 2.4V — 10 15 Ω

ION = 8mA
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.1 3 µA

4

IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

POWER SUPPLY CHARACTERISTICS

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

CC = 5.0V, +25°C ambient.

3. Per TTL driven input (V

IN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the I

CC formula. These limits are guaranteed but not tested.

6. I

C = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fiN)
I

CC = Quiescent Current

∆I

CC = Power Supply Current for a TTL High Input (VIN = 3.4V)

D

H = Duty Cycle for TTL Inputs High

N

T = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f

i = Input Frequency

N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: T

A = –40°C to +85°C, VCC = 5.0V ±10%

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

∆ICC Quiescent Power Supply Current

TTL Inputs HIGH

VCC = Max.
V

IN = 3.4V

(3)

— 0.5 1.5 mA

ICCD Dynamic Power Supply

Current

(4)

VCC = Max.
Outputs Open

VIN = VCC
VIN = GND

—3040µA/

MHz/
Enable Pin Toggling
50% Duty Cycle

Switch

IC Total Power Supply Current

(6)

VCC = Max.
Outputs Open
2 Select Pins Toggling

V

IN = VCC

VIN = GND

— 4.8 6.4 mA

(16 Switches Toggling)
fi = 10MHz
50% Duty Cycle

V

IN = 3.4

V

IN = GND

— 5.3 7.9

3512 tbl 06

Symbol Description Condition

(1)

Min.

(2)

Typ. Max. Unit

tPLH
tPHL

Data Propagation Delay
A to B, B to A

(3,4)

CL = 50pF

R

L = 500Ω

— — 0.25 ns

tBX Switch Multiplex Delay

SEL to A

1.5 — 6.5 ns

tPZH
tPZL

Switch Turn on Delay
SEL, TEST to B

1.5 — 6.5 ns

tPHZ
tPLZ

Switch Turn off Delay
SEL, TEST to B

1.5 — 7 ns

|QCI| Charge Injection, Typical

(5,7)

— 1.5 — pC

|QDCI| Charge Injection, Typical

(6,7)

— 0.5 —

NOTES:

1. See test circuit and waveforms.

2. Minimum limits guaranteed but not tested.

3. This parameter is guaranteed by design but not tested.

4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 2.5ns for 50pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay on the bus switch when used in a system is determined by the driving circuit on the
driving side of the switch and its interaction with the load on the driven side.

5. Measured at switch turn off, load = 50 pF in parallel with 10 MΩ scope probe, V

IN = 0.0 volts.

6. Measured at switch turn off through bus multiplexer, (e.g.- A to 1B = >A to 2B), load = 50 pF in parallel with 10 MΩ scope probe, V

IN at A = 0.0 volts. Charge

injection is reduced because the injection from the turn off of the A to 1B switch is compensated by the turn on of the A to 2B switch.

7. Characterized parameter. Not 100% tested.

3512 tbl 07

IDT74FST163233
16-BIT MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

5

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

SWITCH POSITION

Pulse

Generator

R

T

D.U.T.

V

CC

V

IN

C L

V

OUT

50pF

500Ω

500Ω

7.0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V

0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

tSU

tH

tREM

tSU

tH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

tW

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V
0V

1.5V

V

OH

tPLH

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V
0V

tPLH tPHL

tPHL

VOL

CONTROL

INPUT

3V

1.5V
0V

3.5V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH
CLOSED

SWITCH
OPEN

VOL

0.3V

0.3V

t

PLZtPZL

tPZH tPHZ

3.5V

0V

1.5V

1.5V

ENABLE DISABLE

VOH

PRESET

CLEAR

CLOCK ENABLE

ETC.

ENABLE AND DISABLE TIMES

PROPAGATION DELAY

PULSE WIDTH

SET-UP, HOLD AND RELEASE TIMES

Test

Switch

Disable Low

Enable Low

Closed

All Other Tests

Open

Open Drain

DEFINITIONS:

C

L= Load capacitance: includes jig and probe capacitance.

R

T = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t

F ≤ 2.5ns; tR ≤ 2.5ns

3512 lnk 03

3512 lnk 04

3512 lnk 05

3512 lnk 06

3512 lnk 07

3512 lnk 08

6

IDT74FST163233
16-BIT 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

Integrated Device Technology, Inc.

2975 Stender Way, Santa Clara, CA 95054-3090 Telephone: [phone] FAX [phone]

Integrated Device Technology, Inc. reserves the right to make changes to the specifications in this data sheet in order to improve design or performance and to supply the best possible product.

ORDERING INFORMATION

IDT XX

Temp. Range

16 XX

Device Type

X

Package

74 –40°C to +85°C

PV
PA
PF

163233

Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)

16-Bit 2:1 Mux/Demux Switch

FST

3512 drw 08