Datasheet IDT74FST16163232PF, IDT74FST16163232PA Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Bus switches provide zero delay paths

• Extended commercial range of –40°C to +85°C

• Low switch on-resistance:
FST163xxx – 4Ω

• TTL-compatible input and output levels

• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)

• Available in SSOP, TSSOP and TVSOP

IDT74FST163232

ADVANCE INFORMATION

16-BIT SYNCHRONOUS
2:1 MUX/DEMUX SWITCH

driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this
FET is adequately forward-biased the device conducts and
the resistance between input and output ports is small. With­out adequate bias on the gate-to-source junction of the FET,
the FET is turned off, therefore with no VCC applied, the device
has hot insertion capability.

The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.

The FST163232 provides three 16-bit TTL- compatible
ports that support 2:1 multiplexing. The S0,1 pins control mux
select and switch enable/disable. The S0,1 inputs are syn­chronous and clocked on the rising edge of CLK when

CLKEN

is low.

Port A can be connected to port B1 or port B2 or both ports
B1 and B2.

PIN DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

CLKEN

CLK

S0

S1

D
CE

CLK

D
CE

CLK

1A

1B1

1

B

2

1 of 16 Channels

Pin Names I/O Description

A I/O Bus A

B1, B2 I/O Buses B1, B2

S0,1 I Control Pins

CLK I Clock Input. Clocks S0,1 on

Rising Edge

CLKEN

I Clock Enable Input

3511 drw 01

3511 tbl 01

COMMERCIAL TEMPERATURE RANGE FEBRUARY 1997

1997 Integrated Device Technology, Inc. DSC-3511/2

1

DESCRIPTION:

The FST163232 belong to IDT's family of Bus switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of
their own while providing a low resistance path for an external

2

IDT74FST163232
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

ABSOLUTE MAXIMUM RATINGS

(1)

PIN CONFIGURATION

CAPACITANCE

(1)

FUNCTION TABLE

S1 S0 CLK

CLKEN

CLKEN

Description

XXXHLast state
LL↑L Disconnect
LH↑L A to B1 and A to B2
HL↑L A to B1 or B1 to A
HH↑L A to B2 or B2 to A

5

6
7
8
9
10

1
2

3
4

54

53
52

51
50
49

48
47

46
45

8B1

2

B

1

2

B

2

3A

1A

4B1

4

B

2

5A

6B1

6

B

2

2A

3B1

3

B

2

4A

5B1

5

B

2

6A

7B1

1

B

1

1

B

2

11
12

55

56

7B2

8A

17

18
19
20
21

22

13
14

15
16

42

41
40

39
38
37

36
35

34
33

14B1

9A

10B1

10

B

2

11A

12B1

12

B

2

13A

9B1

9

B

2

10A
11B

1

11B

2

12A

13B1

13

B

2

GND
V

CC

SO56-1
SO56-2
SO56-3

14B2

23
24

43

44

15A

14A

15B1

8

B

2

GND

Vcc

7A

25
26

32
31

30
29

16B2

16

B

115

B

2

16A

CLK

27
28

CLKEN

S

0

S

1

SSOP/

TSSOP/TVSOP

TOP VIEW

3511 drw 02

3511 tbl 04

Symbol Description Max. Unit

VTERM

(2)

Terminal Voltage with Respect
to GND

–0.5 to +7.0 V

TSTG Storage Temperature –65 to +150 °C
IOUT Maximum Continuous Channel

Current

128 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating condiitions for extended
periods may affect reliability.

2. VCC, Control and Switch terminals.

3511 tbl 02

Symbol Parameter Conditions

(2)

Typ. Unit

CIN Control Input Capacitance 4 pF
CI/O

Switch Input/Output
Capacitance

Switch Off

pF

3511 tbl 03

NOTES:

1. Capacitance is characterized but not tested

2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V

IDT74FST163232
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

3

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10%

3511 tbl 05

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. Measured by voltage drop between ports at indicated current through the switch.

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

VIH Input HIGH Voltage Guaranteed Logic HIGH for Control Inputs 2.0 — — V
VIL Input LOW Voltage Guaranteed Logic LOW for Control Inputs — — 0.8 V
II H Input HIGH Current VCC = Max. VI = VCC ——±1µA
II L Input LOW Voltage VI = GND — — ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC ——±1µA
IOZL (3-State Output pins) VO = GND — — ±1
IOS Short Circuit Current VCC = Max., VO = GND

(3)

— 300 — mA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
RON Switch On Resistance

(4)

VCC = Min. VIN = 0.0V — 4 7 Ω
ION = 64mA

VCC = Min. VIN = 0.0V — 4 7 Ω
ION = 32mA
VCC = Min. VIN = 2.4V — 6 15 Ω

ION = 15mA
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.1 3 µA

4

IDT74FST163232
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

POWER SUPPLY CHARACTERISTICS

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

∆ICC Quiescent Power Supply Current

TTL Inputs HIGH

VCC = Max.
V

IN = 3.4V

(3)

— 0.5 1.5 mA

ICCD Dynamic Power Supply

Current

(4)

VCC = Max.
Outputs Open

VIN = VCC
VIN = GND

—3040µA/

MHz/
Enable Pin Toggling
50% Duty Cycle

Switch

IC Total Power Supply Current

(6)

VCC = Max.
Outputs Open
CLK Pin Toggling

VIN = VCC
VIN = GND

— 4.8 6.4 mA

(16 Switches Toggling)
fi = 10MHz
50% Duty Cycle

VIN = 3.4
V

IN = GND

— 5.1 7.2

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ±10%

3511 tbl 06

Symbol Description Condition

(1)

Min.

(2)

Typ. Max. Unit

t

PLH

t

PHL

Data Propagation Delay
A to B, B to A

(3,4)

CL = 50pF

R

L

= 500

Ω

— — 0.25 ns

t

CEWS

Clock Enable Set-Up Time

CLKEN

to CLK Low-to-High

——ns

t

CENH

Clock Enable Hold Time

CLKEN

to CLK Low-to-High

——ns

t

BX

Switch Multiplex Delay
CLK to A, B

1.5 — 6.5 ns

t

PZH

t

PZL

Switch Turn on Delay
CLK to A, B

1.5 — 6.5 ns

t

PHZ

t

PLZ

Switch Turn off Delay
CLK to A, B

1.5 — 7 ns

|QCI| Charge Injection, Typical

(5,7)

— 1.5 — pC

|Q

DCI

| Differential Charge Injection, Typical

(6,7)

— 0.5 —

3511 tbl 07

NOTES:

1. See test circuit and waveforms.

2. Minimum limits guaranteed but not tested.

3. This parameter is guaranteed by design but not tested.

4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 2.5ns for 50pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay on the bus switch when used in a system is determined by the driving circuit on the
driving side of the switch and its interaction with the load on the driven side.

5. Measured at switch turn off, load = 50 pF in parallel with 10 MΩ scope probe, VIN = 0.0 volts.

6. Measured at switch turn off through bus multiplexer, (e.g.- A to B1 = >A to B2), load = 50 pF in parallel with 10 MΩ scope probe, VIN at A = 0.0 volts. Charge
injection is reduced because the injection from the turn off of the A to B1 switch is compensated by the turn on of the A to B2 switch.

7. Characterized parameter. Not 100% tested.

IDT74FST163232
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

5

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

SWITCH POSITION

Pulse

Generator

R

T

D.U.T.

V

CC

V

IN

C L

V

OUT

50pF

500Ω

500Ω

7.0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

tSU

tH

tREM

tSU

tH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

tW

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V
0V

1.5V

V

OH

tPLH

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V
0V

tPLH tPHL

tPHL

VOL

CONTROL

INPUT

3V

1.5V
0V

3.5V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH
CLOSED

SWITCH
OPEN

VOL

0.3V

0.3V

t

PLZtPZL

tPZH tPHZ

3.5V

0V

1.5V

1.5V

ENABLE DISABLE

VOH

PRESET

CLEAR

CLOCK ENABLE

ETC.

ENABLE AND DISABLE TIMES

PROPAGATION DELAY

PULSE WIDTH

SET-UP, HOLD AND RELEASE TIMES

Test

Switch

Disable Low

Enable Low

Closed

All Other Tests

Open

Open Drain

DEFINITIONS:

CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

3511 lnk 04

3511 lnk 03

3511 lnk 05

3511 lnk 06

3511 lnk 07

3511 lnk 08

6

IDT74FST163232
16-BIT SYNCHRONOUS 2:1 MUX/DEMUX SWITCH COMMERCIAL TEMPERATURE RANGE

Integrated Device Technology, Inc.

2975 Stender Way, Santa Clara, CA 95054-3090 Telephone: [phone] FAX [phone]

Integrated Device Technology, Inc. reserves the right to make changes to the specifications in this data sheet in order to improve design or performance and to supply the best possible product.

ORDERING INFORMATION

3511 ldrw 08

IDT XX

Temp. Range

16 XX

Device Type

X

Package

74 –40°C to +85°C

PV
PA
PF

163232

Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)

16-Bit Synchronous 2:1 Mux

FST