Datasheet IDT74FCT645SOB, IDT74FCT645SO, IDT74FCT645PB, IDT74FCT645P, IDT74FCT645LB Datasheet (Integrated Device Technology)



Integrated Device Technology, Inc.

FAST CMOS OCTAL
BIDIRECTIONAL
TRANSCEIVERS

IDT54/74FCT245/A/C
IDT54/74FCT640/A/C
IDT54/74FCT645/A/C

FEATURES:

• IDT54/74FCT245/640/645 equivalent to FAST speed
and drive

• IDT54/74FCT245A/640A/645A 25% faster than FAST

• IDT54/74FCT245C/640C/645C 40% faster than FAST

• TTL input and output level compatible

• CMOS output level compatible

•IOL = 64mA (commercial) and 48mA (military)

• Input current levels only 5µA max.

• CMOS power levels (2.5mW typical static)

• Direction control and over-riding 3-state control

• Product available in Radiation Tolerant and Radiation
Enhanced versions

• Military product compliant to MIL-STD-883, Class B and

DESCRIPTION:

The IDT octal bidirectional transceivers are built using an
advanced dual metal CMOS technology. The IDT54/
74FCT245/A/C, IDT54/74FCT640/A/C and IDT54/74FCT645/
A/C are designed for asynchronous two-way communication
between data buses. The transmit/receive (T/R) input deter-

mines the direction of data flow through the bidirectional
transceiver. Transmit (active HIGH) enables data from A
ports to B ports, and receive (active LOW) from B ports to A
ports. The output enable (OE) input, when HIGH, disables
both A and B ports by placing them in High-Z condition.

The IDT54/74FCT245/A/C and IDT54/74FCT645/A/C
transceivers have non-inverting outputs. The IDT54/
74FCT640/A/C has inverting outputs.

DESC listed

• Meets or exceeds JEDEC Standard 18 specifications

FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS

T/R

A

A

A

OE

0

B

0

1

B

1

2

GND B7

T/R

A0
A1

A2
A3
A4
A5
A6
A7

1
2
3
4
5
6
7
8
9
10

P20-1
D20-1

SO20-2

E20-1

20

Vcc

19

OE

18

B0

17
16
15

&

14
13
12
11

B
B2
B3
B4
B5
B6

1

B

A

3

A

4

A

5

A

6

A

7

NOTES:

1. FCT245, 645 are noninverting options.

2. FCT640 is the inverting option.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.

2534 drw 02

2

B

3

B

4

B

5

B

6

B

7

DIP/SOIC/CERPACK

INDEX

4

A2

5

A3

6

A4

7

A5

8

A6

TOP VIEW

1

A0A

32

1

L20-2

10 11 12

9

7

A

GND

LCC

TOP VIEW

T/R

20

B7

Vcc

OE

19

18
17
16
15
14

13

5

B6B

2534 drw 01

B0
B1
B2
B3
B4

MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1992

1992 Integrated Device Technology, Inc. 7.9 DSC-4201/3

1

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN DESCRIPTION

Pin Names Description

OE

T/

R

0–A7 Side A Inputs or 3-State Outputs

A

0–B7 Side B Inputs or 3-State Outputs

B

ABSOLUTE MAXIMUM RATINGS

Symbol Rating Commercial Military Unit

(2)

V

TERM

(3)

V

TERM

T

A Operating 0 to +70 –55 to +125 °C

T

BIAS Temperature –55 to +125 –65 to +135 °C

T

STG Storage –55 to +125 –65 to +150 °C

P

T Power Dissipation 0.5 0.5 W

OUT DC Output Current 120 120 mA

I

NOTES: 2534 tbl 01

1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V

2. Inputs and V

3. Outputs and I/O terminals.

Output Enable Input (Active LOW)
Transmit/Receive Input

2534 tbl 05

(1)

Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to GND

Terminal Voltage –0.5 to VCC –0.5 to VCC V
with Respect
to GND

Temperature

Under Bias

Temperature

CC by +0.5V unless otherwise noted.

CC terminals.

FUNCTION TABLE

(2)

Inputs

OE

OE

L L Bus B Data to Bus A
L H Bus A Data to Bus B

T/

R

R

Outputs

(1)
(1)

H X High Z State

NOTES: 2534 tbl 06

1. 640 is inverting from input to output.

2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol Parameter

IN Input Capacitance VIN = 0V 6 10 pF

C

I/O I/O Capacitance VOUT = 0V 8 12 pF

C

NOTE: 2534 tbl 02

1. This parameter is measured at characterization but not tested.

(1)

Conditions Typ. Max. Unit

7.9 2

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%

Symbol Parameter Test Conditions

IH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V

V

IL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V

V
I

IH Input HIGH Current VCC = Max VI = VCC ——5µA

(Except I/O pins) V

(1)

I = 2.7V — — 5

Min. Typ.

IIL Input LOW Current VI = 0.5V — — –5

(Except I/O pins) VI = GND — — –5

IH Input HIGH Current VCC = Max VI = VCC ——15µA

I

(I/O pins only) V

I = 2.7V — — 15

IIL Input LOW Current VI = 0.5V — — –15

(I/O pins only) VI = GND — — –15

V

IK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V

OS Short Circuit Current VCC = Max.

I

OH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µAVHC VCC —V

V

V

CC = Min. IOH = –300µAVHC VCC —
IN = VIH or VIL IOH = –12mA MIL. 2.4 4.3 —

V

V

OL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA — GND VLC V

(Port A and Port B) V

CC = Min. IOL = 300µA — GND VLC

(3)

, VO = GND –60 –120 — mA

OH = –15mA COM’L. 2.4 4.3 —

I

VIN = VIH or VIL IOL = 48mA MIL. — 0.3 0.55

OL = 64mA COM’L. — 0.3 0.55

I

NOTES: 2534 tbl 03

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.

4. This parameter is guaranteed but not tested.

CC = 5.0V, +25°C ambient and maximum loading.

(2)

Max. Unit

(4)

(4)

(4)

(4)

(4)

7.9 3

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

POWER SUPPLY CHARACTERISTICS

VLC = 0.2V; VHC = VCC – 0.2V

Symbol Parameter Test Conditions

I

CC Quiescent Power Supply Current Vcc = Max. — 0.5 1.5 mA

IN ≥ VHC; VIN ≤ VLC

V

∆ICC Quiescent Power Supply Current Vcc = Max. — 0.5 2.0 mA

TTL Inputs HIGH V

ICCD Dynamic Power Supply Current

(4)

IN = 3.4V

Vcc = Max. VIN ≥ VHC — 0.15 0.25 mA/MHz
Outputs Open V

OE

T/R = GND or V
One Input Toggling

50% Duty Cycle

C Total Power Supply Current

I

(6)

Vcc = Max. VIN ≥ VHC — 2.0 4.0 mA
Outputs Open V

fi = 10MHz (FCT)
50% Duty Cycle V

T/R = OE = GND V
One Bit Toggling

Vcc = Max. V
Outputs Open VIN ≤ VLC
fi = 2.5MHz (FCT)

50% Duty Cycle V
T/R = OE = GND VIN = GND
Eight Bits Toggling

NOTES: 2534 tbl 04

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Per TTL driven input (V

4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

5. Values for these conditions are examples of the I

6. I

C = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)

CC = Quiescent Current

I

CC = Power Supply Current for a TTL High Input (VIN = 3.4V)

∆I
D

H = Duty Cycle for TTL Inputs High
T = Number of TTL Inputs at DH

N
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)

CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

f

i = Input Frequency

f
N

i = Number of Inputs at fi

All currents are in milliamps and all frequencies are in megahertz.

CC = 5.0V, +25°C ambient.

IN = 3.4V); all other inputs at VCC or GND.

CC formula. These limits are guaranteed but not tested.

(3)

= GND

CC

(1)

IN ≤ VLC

IN ≤ VLC

IN = 3.4V — 2.3 5.0
IN = GND

IN ≥ VHC — 3.5 6.5

IN = 3.4V — 5.5 14.5

Min. Typ.

(2)

Max. Unit

(5)

(5)

7.9 4

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT245/A/C

54/74FCT245 54/74FCT245A 54/74FCT245C

Com’l. Mil. Com’l. Mil. Com’l. Mil.

Symbol Parameter Condition

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

(1)

tPLH Propagation Delay CL = 50 pF 1.5 7.0 1.5 7.5 1.5 4.6 1.5 4.9 1.5 4.1 1.5 4.5 ns
t

PHL A to B, B to A RL = 500Ω

t

PZH Output Enable Time 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL
PHZ Output Disable Time 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns

t
t

PLZ

t

PZH Output EnableTime 1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL T/

tPHZ Output Disable Time 1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns
t

PLZ T/

OE

to A or B

OE

to A or B

R

to A or B

R

to A or B

(3)

(3)

2534 tbl 07

SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT640/A/C

54/74FCT640 54/74FCT640A 54/74FCT640C

Com’l. Mil. Com’l. Mil. Com’l. Mil.

(1)

(2)

Min.

Symbol Parameter Condition

Max. Min.

tPLH Propagation Delay CL = 50 pF 2.0 7.0 2.0 8.0 1.5 5.0 1.5 5.3 1.5 4.4 1.5 4.7 ns
t

PHL A to B, B to A RL = 500Ω

t

PZH Output Enable Time 2.0 13.0 2.0 16.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL

t

PHZ Output Disable Time 2.0 10.0 2.0 12.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns

t

PLZ

t

PZH Output Enable Time 2.0 13.0 2.0 16.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL T/

tPHZ Output Disable Time 2.0 10.0 2.0 12.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns
t

PLZ T/

OE

to A or B

OE

to A or B

R

to A or B

R

to A or B

(3)

(3)

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

2534 tbl 08

SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT645/A/C

54/74FCT645 54/74FCT645A 54/74FCT645C

Com’l. Mil. Com’l. Mil. Com’l. Mil.

(1)

(2)

Min.

Symbol Parameter Condition

Max. Min.

tPLH Propagation Delay CL = 50 pF 1.5 9.5 1.5 11.0 1.5 4.6 1.5 4.9 1.5 4.1 1.5 4.5 ns
t

PHL A to B, B to A RL = 500Ω

t

PZH Output Enable Time 1.5 11.0 1.5 12.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL

t

PHZ Output Disable Time 1.5 12.0 1.5 13.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns

t

PLZ

t

PZH Output Enable Time 1.5 11.0 1.5 12.0 1.5 6.2 1.5 6.5 1.5 5.8 1.5 6.2 ns

t

PZL T/

tPHZ Output Disable Time 1.5 12.0 1.5 13.0 1.5 5.0 1.5 6.0 1.5 4.8 1.5 5.2 ns
t

PLZ T/

NOTES: 2534 tbl 09

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This parameter is guaranteed but not tested.

OE

to A or B

OE

to A or B

R

to A or B

R

to A or B

(3)

(3)

(2)

Max. Min.

7.9 5

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

VCC

500Ω

Pulse

Generator

VIN

D.U.T.

RT

VOUT

50pF

CL

500Ω

7.0V

SWITCH POSITION

Test Switch

Open Drain

Disable Low Closed

Enable Low

All Other Tests Open

DEFINITIONS: 2534 tbl 08

CL = Load capacitance: includes jig and probe capacitance.

T = Termination resistance: should be equal to ZOUT of the Pulse

R

Generator.

SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

PRESET

CLOCK ENABLE

CLEAR

ETC.

t

tSU

SU

t

REM

t

t

H

H

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

LOW-HIGH-LOW

HIGH-LOW-HIGH

PULSE

PULSE

1.5V

t

W

1.5V

SAME PHASE

INPUT TRANSITION

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

t

t

PLH

PLH

t

t

PHL

PHL

3V

1.5V
0V

V

OH

1.5V
V

OL

3V

1.5V
0V

ENABLE AND DISABLE TIMESPROPAGATION DELAY

ENABLE DISABLE

3V

CONTROL

INPUT

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

t

PZL

SWITCH
CLOSED

t

PZH

SWITCH
OPEN

3.5V

1.5V

1.5V
0V

t

PHZ

t

PLZ

NOTES 2534 drw 04

1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; Z
t

R ≤ 2.5ns.

1.5V
0V

3.5V

0.3V

V

OL

V

OH

0.3V
0V

O ≤ 50Ω; tF ≤ 2.5ns;

7.9 6

IDT54/74FCT245/A/C, IDT54/74FCT640/A/C, IDT54/74FCT645/A/C
FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

ORDERING INFORMATION

XX

Temperature

Range

FCTIDT

X

Device

X

Package

X

Process

Type

Blank
B

P
D
SO
L
E

245
640
645
245A
640A
645A
245C
640C
645C

54
74

Commercial
MIL-STD-883, Class B

Plastic DIP
CERDIP
Small Outline IC
Leadless Chip Carrier
CERPACK

Non-Inverting Buffer Transceiver
Octal Inverting Buffer Transceiver
Non-Inverting Buffer Transceiver
Fast Non-Inverting Buffer Transceiver
Fast Octal Inverting Buffer Transceiver
Fast Non-Inverting Buffer Transceiver
Super Fast Non-Inverting Buffer Transceiver
Super Fast Octal Inverting Buffer Transceiver
Super Fast Non-Inverting Buffer Transceiver

–55°C to +125°C

°

C to +70°C

0

2534 drw 03

7.9 7