Datasheet IDT74FCT3827APY, IDT74FCT3827APB, IDT74FCT3827AP, IDT74FCT3827ADB, IDT74FCT3827AD Datasheet (Integrated Device Technology)

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Integrated Device Technology, Inc.
IDT54/74FCT3827A/B
3.3V CMOS 10-BIT BUFFERS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1
MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1995
1995 Integrated Device Technology, Inc. 8.15 DSC-4651/-
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9
FUNCTIONAL BLOCK DIAGRAM
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FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• 25 mil Center SSOP Packages
• Extended commercial range of -40°C to +85°C
•V
CC = 3.3V ±0.3V, Normal Range or
VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The FCT3827A/B 10-bit bus drivers are built using an advanced dual metal CMOS technology. These high speed, low power buffers are ideal for high-performance bus interface buffering for wide data/address paths or buses carrying parity. The 10-bit buffers have NAND-ed output enables for maxi­mum control flexibility.
All of the FCT3827 high performance interface compo­nents are designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs.
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 2
DIP/SOIC/SSOP/QSOP
TOP VIEW
PIN CONFIGURATIONS
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PIN DESCRIPTION
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ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Commercial Military Unit
VTERM
(2)
Terminal Voltage with Respect to GND
–0.5 to +4.6 –0.5 to +4.6 V
VTERM
(3)
Terminal Voltage with Respect to GND
–0.5 to +7.0 –0.5 to +7.0 V
VTERM
(4)
Terminal Voltage with Respect to GND
–0.5 to
V
CC + 0.5
–0.5 to
VCC + 0.5
V
TA Operating
Temperature
–40 to +85 –55 to +125 °C
TBIAS Temperature
Under Bias
–55 to +125 –65 to +135 °C
TSTG Storage
Temperature
–55 to +125 –65 to +150 °C
PT Power Dissipation 1.0 1.0 W IOUT DC Output
Current
–60 to +60 –60 to +60 mA
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CAPACITANCE (TA = +25°C, f = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
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Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V 3.5 6.0 pF
COUT Output
Capacitance
VOUT = 0V 4.0 8.0 pF
Names I/O Description
OE
I I When both are LOW the outputs are
enabled. When either one or both are HIGH the outputs are High Z.
DI I 10-bit data input. YI O 10-bit data output.
Inputs Output
OE
OE
1
OE
OE
2 DI YI Function
L L
L L
L
H
L
H
Transparent
H X
X H
X X
Z Z
Three-State
OE1
D0 D1 D2 D3 D4 D5 D6 D7
Y0 Y1 Y2 Y3 Y4
Y6
Y5
Y7
VCC1 2 3 4 5 6 7 8 9 10
13
14
15
16
17
18
19
20
P24-1
D24-1 SO24-2 SO24-7
&
SO24-8
11 12
21
22
23
24
D
8
D9
Y8 Y9 OE2GND
FUNCTION TABLE
(1)
NOTE:
1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High Impedance
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex­tended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V; Military: TA = –55°C to +125°C, VCC = 2.7V to 3.6V
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2.0 5.5 V
Input HIGH Level (I/O pins) 2.0 VCC+0.5
VIL Input LOW Level Guaranteed Logic LOW Level –0.5 0.8 V
(Input and I/O pins)
II H Input HIGH Current (Input pins)
(6)
VCC = Max. VI = 5.5V ±1 µA
Input HIGH Current (I/O pins)
(6)
VI = VCC ±1
II L Input LOW Current (Input pins)
(6)
VI = GND ±1
Input LOW Current (I/O pins)
(6)
VI = GND ±1 IOZH High Impedance Output Current VCC = Max. VO = VCC ±1 µA IOZL (3-State Output pins)
(6)
VO = GND ±1 VIK Clamp Diode Voltage VCC = Min., IIN = –18mA 0.7 1.2 V IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
–36 –60 –110 mA
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
50 90 200 mA
VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC0.2 V
VIN = VIH or VIL IOH = –3mA 2.4 3.0 — VCC = 3.0V
V
IN = VIH or VIL
IOH = –6mA MIL.
I
OH = –8mA COM'L.
2.4
(5)
3.0
VOL Output LOW Voltage VCC = Min. IOL = 0.1mA 0.2 V
VIN = VIH or VIL IOL = 16mA 0.2 0.4
IOL = 24mA 0.3 0.55
VCC = 3.0V V
IN = VIH or VIL
IOL = 24mA 0.3 0.50
IOS Short Circuit Current
(4)
VCC = Max., VO = GND
(3)
–60 135 –240 mA VH Input Hysteresis 150 mV ICCL
ICCH
Quiescent Power Supply Current VCC = Max.,
V
IN = GND or VCC
COM'L. 0.1 10 µA
ICCZ MIL. 0.1 100
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH = VCC –0.6V at rated current.
6. The test limits for this parameter is ± 5µA at T
A = –55°C.
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IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 4
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC = 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC formula. These limits are guaranteed but not tested.
6. I
C = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) I
CC = Quiescent Current (ICCL, ICCH and ICCZ)
I
CC = Power Supply Current for a TTL High Input
D
H = Duty Cycle for TTL Inputs High
N
T = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP = Number of Clock Inputs at fCP
fi = Input Frequency N
i = Number of Inputs at fi
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Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
ICC Quiescent Power Supply Current VCC = Max. VIN = VCC –0.6V
(3)
2.0 30 µA
ICCD Dynamic Power Supply Current
(4)
VCC = Max. Outputs Open
OE
1 = OE2 = GND
One Input Toggling 50% Duty Cycle
V
IN = VCC
V
IN = GND
—6085µA/
MHz
IC Total Power Supply Current
(6)
VCC = Max. Outputs Open fi = 10MHz
V
IN = VCC
VIN = GND
0.6 0.9 mA
50% Duty Cycle
OE
1 = OE2 = GND
One Bit Toggling
V
IN = VCC –0.6V
V
IN = GND
0.6 0.9
VCC = Max. Outputs Open fi = 2.5MHz
V
IN = VCC
V
IN = GND
1.5 2.1
(5)
50% Duty Cycle
OE
1 = OE2 = GND
Ten Bits Toggling
V
IN = VCC –0.6V
V
IN = GND
1.5 2.3
(5)
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3)
FCT3827A FCT3827B
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH tPHL
Propagation Delay
D
I to YI
C
L = 50pF
R
L = 500
1.5 8.0 1.5 9.0 1.5 5.0 1.5 6.5 ns
CL = 300pF
(3)
RL = 500
1.5 15.0 1.5 17.0 1.5 13.0 1.5 14.0
tPZH tPZL
Output Enable Time
OE
I to YI
CL = 50pF R
L = 500
1.5 12.0 1.5 13.0 1.5 8.0 1.5 9.0 ns
CL = 300pF
(3)
RL = 500
1.5 23.0 1.5 25.0 1.5 15.0 1.5 16.0
tPHZ tPLZ
Output Disable Time
OE
I
to YI
CL = 5pF
(3)
RL = 500
1.5 9.0 1.5 9.0 1.5 6.0 1.5 7.0 ns
CL = 50pF R
L = 500
1.5 10.0 1.5 10.0 1.5 7.0 1.5 8.0
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NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Propagation Delays and Enable/Disable times are with V
CC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 6
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH.
2. Pulse Generator for All Pulses: Rate 1.0MHz; t
F ≤ 2.5ns; tR 2.5ns.
3. If V
CC is below 3V, input voltage swings should be adjusted not to exceed
V
CC.
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V 0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V 0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V 0V
3V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH 6V
SWITCH GND
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
GND
6V
Open
ENABLE AND DISABLE TIMESPROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
SWITCH POSITION
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
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Test Switch
Open Drain
Disable Low
Enable Low
6V
Disable High
Enable High
GND
All Other tests Open
DEFINITIONS:
C
L= Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
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IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.15 7
ORDERING INFORMATION
IDT XX FCT
XX
Device TypeXPackage
X
Process
Blank B
P D SO PY Q
827A 827B
Commercial MIL-STD-883, Class B
Plastic DIP (P24-1) CERDIP (D24-1) Small Outline IC (SO24-2) Shrink Small Outline Package (SO24-7) Quarter-size Small Outline Package (SO24-8)
Non-Inverting 10-Bit Buffer Inverting 10-Bit Buffer
54 74
–55
°
C to +125°C
–40
°
C to +85°C
Temp. Range
X
Family
3 3.3 Volt
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