Datasheet IDT74FCT573TPYB, IDT74FCT573TPY, IDT74FCT573TPB, IDT74FCT573TP, IDT74FCT573TLB Datasheet (Integrated Device Technology)
...
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1995
1995 Integrated Device Technology, Inc. 6.12 DSC-4216/6
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
D0
D
O
G
O
0
D1
D
O
G
O
1
D2
D
O
G
O
2
D3
D
O
G
O
3
D4
D
O
G
O
4
D5
D
O
G
O
5
D6
D
O
G
O
6
D7
D
O
G
O
7
LE
OE
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT373T/2373T AND IDT54/74FCT573T/2573T
D0
D
O
G
O
0
D1
D
O
G
O
1
D2
D
O
G
O
2
D3
D
O
G
O
3
D4
D
O
G
O
4
D5
D
O
G
O
5
D6
D
O
G
O
6
D7
D
O
G
O
7
LE
OE
FUNCTIONAL BLOCK DIAGRAM IDT54/74FCT533T
2564 cnv* 02
2564 cnv* 01
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT
IDT54/74FCT533T/AT/CT
IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL
TRANSPARENT
LATCHES
FEATURES:
• Common features:
– Low input and output leakage ≤1µA (max.)
– CMOS power levels
– True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
– Meets or exceeds JEDEC standard 18 specifications
– Product available in Radiation Tolerant and Radiation
Enhanced versions
– Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
– Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
• Features for FCT373T/FCT533T/FCT573T:
– Std., A, C and D speed grades
– High drive outputs (-15mA I
OH, 48mA IOL)
– Power off disable outputs permit “live insertion”
• Features for FCT2373T/FCT2573T:
– Std., A and C speed grades
– Resistor output (-15mA IOH, 12mA IOL Com.)
(-12mA IOH, 12mA IOL Mil.)
– Reduced system switching noise
DESCRIPTION:
The FCT373T/FCT2373T, FCT533T and FCT573T/
FCT2573T are octal transparent latches built using an advanced dual metal CMOS technology. These octal latches
have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when
Latch Enable (LE) is HIGH. When LE is LOW, the data that
meets the set-up time is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH, the
bus output is in the high- impedance state.
The FCT2373T and FCT2573T have balanced drive outputs with current limiting resistors. This offers low ground
bounce, minimal undershoot and controlled output fall timesreducing the need for external series terminating resistors.
The FCT2xxxT parts are plug-in replacements for FCTxxxT
parts.
6.12 2
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT373/2373T
IDT54/74FCT533
IDT54/74FCT573/2573T
2564 cnv* 062564 cnv* 05
2564 cnv* 07 2564 cnv* 08
2564 cnv* 03
2564 cnv* 04
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
O
7
D
7
D
6
O
6
O
5
D
4
LE
D
5
O
4
V
CC
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
INDEX
D
1
O
1
O
2
D
2
D
3
D
7
D
6
O
6
O
5
D
5
O0
D0
OE
VCC
O7
O3
GND
LE
O
4
D4
LCC
TOP VIEW
3 2 20 19
1
4
5
6
7
8
18
17
16
15
14
9 10111213
L20-2
D0
D1
D2
D3
D4
D5
D6
D7
GND
O
0
O1
O2
O3
O4
O6
LE
O
5
O7
VCC1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
OE
INDEX
D2
D3
D4
D5
D6
O1
O2
O3
O4
O5
D0
D1
VCC
O0
D7
GND
LE
O
7
O6
LCC
TOP VIEW
3 2 20 19
1
4
5
6
7
8
18
17
16
15
14
9 10111213
L20-2
OE
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
O
7
D
7
D
6
O
6
O
5
D
4
LE
D
5
O
4
V
CC
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
DIP/SOIC/CERPACK
TOP VIEW
P20-1
D20-1
SO20-2
&
E20-1
INDEX
D1 D7
O0
D0
OE
V
CC
O7
GND
LCC
TOP VIEW
D
6
O6
O5
D5
O1
O2
D2
D3
LE
O
4
D4
O3
3 2 20 19
1
4
5
6
7
8
18
17
16
15
14
9 10111213
L20-2
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.12 3
DEFINITION OF FUNCTIONAL TERMS
FUNCTION TABLE (373 and 573)
(1)
FUNCTION TABLE (533)
(1)
ABSOLUTE MAXIMUM RATINGS
(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Rating Commercial Military Unit
VTERM
(2)
Terminal Voltage
with Respect to
GND
–0.5 to +7.0 –0.5 to +7.0 V
VTERM
(3)
Terminal Voltage
with Respect to
GND
–0.5 to
V
CC +0.5
–0.5 to
VCC +0.5
V
TA Operating
Temperature
0 to +70 –55 to +125 °C
TBIAS Temperature
Under Bias
–55 to +125 –65 to +135 °C
TSTG Storage
Temperature
–55 to +125 –65 to +150 °C
PT Power Dissipation 0.5 0.5 W
IOUT DC Output
Current
–60 to +120 –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC by +0.5V unless otherwise noted.
2. Input and V
CC terminals only.
3. Outputs and I/O terminals only.
2564 tbll 03
2564 lnk 04
NOTE: 2564 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
NOTE:
2564 tbl 01
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V 6 10 pF
COUT Output
Capacitance
VOUT = 0V 8 12 pF
NOTE:
1. This parameter is measured at characterization but not tested.
2564 lnk 05
Pin Names Description
DN Data Inputs
LE Latch Enable Input (Active HIGH)
OE
Output Enable Input (Active LOW)
ON 3-State Outputs
O
N Complementary 3-State Outputs
Inputs Outputs
DN LE
OE
OE
O
O
N
HHLL
LHLH
XXHZ
Inputs Outputs
DN LE
OE
OE
ON
HHLH
LHLL
XXHZ
6.12 4
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
II H Input HIGH Current
(4)
VCC = Max. VI = 2.7V — — ±1 µA
II L Input LOW Current
(4)
VI = 0.5V — — ±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ±1 µA
IOZL (3-State Output pins)
(4)
VO = 0.5V — — ±1
II Input HIGH Current
(4)
VCC = Max., VI = VCC (Max.) — — ±1 µA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
VH Input Hysteresis — — 200 — mV
ICC Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 0.01 1 mA
2564 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT373T/533T/573T
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
OH
Output HIGH Voltage VCC = Min.
V
IN
= V
IH
or V
IL
IOH = –6mA MIL.
I
OH
= –8mA COM'L.
2.4 3.3 — V
IOH = –12mA MIL.
I
OH
= –15mA COM'L.
2.0 3.0 — V
V
OL
Output LOW Voltage VCC = Min.
V
IN
= V
IH
or V
IL
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
— 0.3 0.5 V
I
OS
Short Circuit Current VCC = Max., VO = GND
(3)
–60 –120 –225 mA
I
OFF
Input/Output Power Off Leakage
(5)
VCC = 0V, V
IN
or V
O
≤ 4.5V — —
±
1
µ
A
2564 lnk 07
OUTPUT DRIVE CHARACTERISTICS FOR FCT2373T/2573T
2564 lnk 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A = –55°C.
5. This parameter is guaranteed but not tested.
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
IODL Output LOW Current VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V
(3)
16 48 — mA
IODH Output HIGH Current VCC = 5V, VIN = VIH or V
IL,
VOUT = 1.5V
(3)
–16 –48 — mA
VOH Output HIGH Voltage VCC = Min.
V
IN = VIH or VIL
IOH = –12mA MIL.
I
OH = –15mA COM'L.
2.4 3.3 — V
VOL Output LOW Voltage VCC = Min.
V
IN = VIH or VIL
IOL = 12mA — 0.3 0.50 V
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.12 5
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC formula. These limits are guaranteed but not tested.
6. I
C = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
I
CC = Quiescent Current
∆I
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
D
H = Duty Cycle for TTL Inputs High
N
T = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i = Input Frequency
N
i = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
2564 tbl 09
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
∆ICC Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
V
IN = 3.4V
(3)
— 0.5 2.0 mA
ICCD Dynamic Power Supply
Current
(4)
VCC = Max.
Outputs Open
VIN = VCC
VIN = GND
FCTxxxT — 0.15 0.25 mA/
MHz
OE
= GND
One Input Toggling
50% Duty Cycle
FCT2xxxT — 0.06 0.12
IC Total Power Supply Current
(6)
VCC = Max. VIN = VCC FCTxxxT — 1.5 3.5 mA
Outputs Open
fi = 10MHz
VIN = GND FCT2xxxT — 0.6 2.2
50% Duty Cycle
OE
= GND
VIN = 3.4
V
IN = GND
FCTxxxT — 1.8 4.5
LE = VCC
One Bit Toggling
FCT2xxxT 0.9 3.2
VCC = Max. VIN = VCC FCTxxxT — 3.0 6.0
(5)
Outputs Open
fi = 2.5MHz
VIN = GND FCT2xxxT — 1.2 3.4
(5)
50% Duty Cycle
OE
= GND
VIN = 3.4
V
IN = GND
FCTxxxT — 5.0 14.0
(5)
LE = VCC
Eight Bits Toggling
FCT2xxxT — 3.2 11.4
(5)
6.12 6
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT373T/2373T/573T/2573T FCT373AT/2373AT/573AT/2573AT
Com'l. Mil. Com'l. Mil.
Symbol Parameter Conditions
(1)
Min
.
(2)
Max.Min
.
(2)
Max.Min
.
(2)
Max.Min
.
(2)
Max
. Unit
t
PLH
t
PHL
Propagation Delay
D
N
to O
N
CL = 50pF
R
L
= 500
Ω
1.5 8.0 1.5 8.5 1.5 5.2 1.5 5.6 ns
t
PLH
t
PHL
Propagation Delay
LE to O
N
2.0 13.0 2.0 15.0 2.0 8.5 2.0 9.8 ns
t
PZH
t
PZL
Output Enable Time 1.5 12.0 1.5 13.5 1.5 6.5 1.5 7.5 ns
t
PHZ
t
PLZ
Output Disable Time 1.5 7.5 1.5 10.0 1.5 5.5 1.5 6.5 ns
t
SU
Set-up Time HIGH
or LOW, D
N
to LE
2.0 — 2.0 — 2.0 — 2.0 — ns
t
H
Hold Time HIGH
or LOW, D
N
to LE
1.5 — 1.5 — 1.5 — 1.5 — ns
t
W
LE Pulse Width HIGH 6.0 — 6.0 — 5.0 — 6.0 — ns
2564 tbl 10
2564 tbl 11
FCT533T FCT533AT FCT533CT
Com'l. Mil. Com'l. Mil. Com'l. Mil.
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH
tPHL
Propagation Delay
D
N to ON
CL = 50pF
R
L = 500Ω
1.5 10.0 1.5 12.0 1.5 5.2 1.5 5.6 1.5 4.2 1.5 5.1 ns
tPLH
tPHL
Propagation Delay
LE to
O
N
2.0 13.0 2.0 14.0 2.0 8.5 2.0 9.8 2.0 5.5 2.0 8.0 ns
tPZH
tPZL
Output Enable
Time
1.5 11.0 1.5 12.5 1.5 6.5 1.5 7.5 1.5 5.5 1.5 6.3 ns
tPHZ
tPLZ
Output Disable
Time
1.5 7.0 1.5 8.5 1.5 5.5 1.5 6.5 1.5 5.0 1.5 5.9 ns
tSU Set-up Time HIGH
or LOW, D
N to LE
2.0 — 2.0 — 2.0 — 2.0 — 2.0 — 2.0 — ns
tH Hold Time HIGH
or LOW, D
N to LE
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
tW LE Pulse Width HIGH 6.0 — 6.0 — 5.0 — 6.0 — 5.0 — 6.0 — ns
FCT373CT/2373CT/573CT/2573CT FCT373DT/573DT
Com'l. Mil. Com'l. Mil.
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH
tPHL
Propagation Delay
D
N to ON
CL = 50pF
R
L = 500Ω
1.5 4.2 1.5 5.1 1.5 3.8 — — ns
tPLH
tPHL
Propagation Delay
LE to O
N
2.0 5.5 2.0 8.0 2.0 4.0 — — ns
tPZH
tPZL
Output Enable Time 1.5 5.5 1.5 6.3 1.5 4.8 — — ns
tPHZ
tPLZ
Output Disable Time 1.5 5.0 1.5 5.9 1.5 4.0 — — ns
tSU Set-up Time HIGH
or LOW, D
N to LE
2.0 — 2.0 — 1.5 — — — ns
tH Hold Time HIGH
or LOW, D
N to LE
1.5 — 1.5 — 1.0 — — — ns
tW LE Pulse Width HIGH
(3)
5.0 — 6.0 — 3.0 — — — ns
NOTES: 2564 tbl 12
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.12 7
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
SWITCH POSITION
ENABLE AND DISABLE TIMESPROPAGATION DELAY
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
Ω
500
Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Test
Switch
Disable Low
Enable Low
Closed
All Other Tests
Open
Open Drain
DEFINITIONS:
C
L= Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
2564 lnk 13
2564 drw 09
2564 drw 10
2564 drw 11
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
F ≤ 2.5ns; tR ≤ 2.5ns
2564 drw 13
2564 drw 12
6.12 8
IDT54/74FCT373T/AT/CT/DT - 2373T/AT/CT, IDT54/74FCT533T/AT/CT, IDT54/74FCT573T/AT/CT/DT - 2573T/AT/CT
FAST CMOS OCTAL TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX
Temp. Range
XXXX
Device TypeXPackage
X
Process
Blank
B
P
D
SO
L
E
PY
Q
373T
573T
533T
373AT
573AT
533AT
373CT
573CT
533CT
373DT
573DT
Commercial
MIL-STD-883, Class B
Plastic DIP
CERDIP
Small Outline IC
Leadless Chip Carrier
CERPACK
Shrink Small Outline Package
Quarter-size Small Outline Package
Non-Inverting Octal Transparent Latch
Non-Inverting Octal Transparent Latch
Inverting Octal Transparent Latch
54
74
–55°C to +125°C
0°C to +70°C
FCT
X
Family
Blank2High Drive
Balanced Drive
2564 drw 14
Loading...