Datasheet IDT74FCT3245SOB, IDT74FCT3245SO, IDT74FCT3245QB, IDT74FCT3245Q, IDT74FCT3245PYB Datasheet (Integrated Device Technology)

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Page 1
Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES FEBRUARY 1996
1996 Integrated Device Technology, Inc. 8.12 DSC-2650/5
The FCT3245/A octal transceivers are built using ad­vanced dual metal CMOS technology. These high-speed, low-power transceivers are ideal for synchronous communi­cation between two busses (A and B). The direction control pin (DIR) controls the direction of data flow. The output enable pin (OE) overrides the direction control and disables both
ports. All inputs are designed with hysteresis for improved noise margin.
The FCT3245/A have series current limiting resistors. These offer low ground bounce, minimal undershoot, and controlled output fall times-reducing the need for external series terminating resistors.
DESCRIPTION:
DIR
OE
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
2650 drw 01
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
IDT54/74FCT3245/A
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• 25 mil Center SSOP and QSOP Packages
• Extended commercial range of -40°C to +85°C
•V
CC = 3.3V ±0.3V, Normal Range or
VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Military product compliant to MIL-STD-883, Class B
2650 drw 02
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
2650 drw 03
1
INDEX
A3
DIR
V
CC
LCC
TOP VIEW
3 2 20 19
1
4 5 6 7 8
18 17 16 15
14
9 10111213
L20-2
A4 A5
A6 A7
A2
B7
A8
B6
GND
B
8
OE
B2
B1
B3 B4 B5
A1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
5 6 7 8 9 10
1 2 3 4
20 19 18 17 16 15 14 13 12 11GND
A
1
A
2
A3
DIR
A
4
A5 A6
A7 A
8
B B B B B B
B B
Vcc
1
OE
2 3 4
5 6
7 8
P20-1
D20-1 SO20-2 SO20-7 SO20-8
&
E20-1
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
Page 2
IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.12 2
FUNCTION TABLE
(1)
Inputs
OE
OE
DIR Outputs
L L Bus B Data to Bus A L H Bus A Data to Bus B
H X High Z State
NOTE:
1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
(1)
2650 tbl 02
CAPACITANCE (TA = +25°C, f = 1.0MHz)
2650 lnk 04
2650 tbl 01
Symbol Rating Commercial Military Unit
VTERM
(2)
Terminal Voltage with Respect to GND
–0.5 to +4.6 –0.5 to +4.6 V
VTERM
(3)
Terminal Voltage with Respect to GND
–0.5 to +7.0 –0.5 to +7.0 V
VTERM
(4)
Terminal Voltage with Respect to GND
–0.5 to
V
CC + 0.5
–0.5 to
VCC + 0.5
V
TA Operating
Temperature
–40 to +85 –55 to +125 °C
TBIAS Temperature
Under Bias
–55 to +125 –65 to +135 °C
TSTG Storage
Temperature
–55 to +125 –65 to +150 °C
PT Power Dissipation 1.0 1.0 W IOUT DC Output
Current
–60 to +60 –60 to +60 mA
2650 lnk 03
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input
Capacitance
VIN = 0V 3.5 6.0 pF
CI/O I/O
Capacitance
VOUT = 0V 4.0 8.0 pF
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condi­tions above those indicated in the operational sections of this specifica­tion is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
Pin Names Description
OE
Output Enable Input (Active LOW)
DIR Direction Control Input
Ax Side A Inputs or 3-State Outputs Bx Side B Inputs or 3-State Outputs
Page 3
IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.12 3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: T
A = –40°C to +85°C, VCC = 2.7V to 3.6V; Military: TA = –55°C to +125°C, VCC = 2.7V to 3.6V
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2.0 5.5 V
Input HIGH Level (I/O pins) 2.0 VCC+0.5
VIL Input LOW Level Guaranteed Logic LOW Level –0.5 0.8 V
(Input and I/O pins)
II H Input HIGH Current (Input pins)
(6)
VCC = Max. VI = 5.5V ±1 µA
Input HIGH Current (I/O pins)
(6)
VI = VCC ±1
II L Input LOW Current (Input pins)
(6)
VI = GND ±1
Input LOW Current (I/O pins)
(6)
VI = GND ±1 IOZH High Impedance Output Current VCC = Max. VO = VCC ±1 µA IOZL (3-State Output pins)
(6)
VO = GND ±1 VIK Clamp Diode Voltage VCC = Min., IIN = –18mA 0.7 1.2 V IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
–36 –60 –110 mA
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
(3)
50 90 200 mA
VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC0.2 V
VIN = VIH or VIL IOH = –3mA 2.4 3.0 — VCC = 3.0V
V
IN = VIH or VIL
IOH = –6mA MIL.
I
OH = –8mA COM'L.
2.4
(5)
3.0
VOL Output LOW Voltage VCC = Min. IOL = 0.1mA 0.2 V
VIN = VIH or VIL IOL = 16mA 0.2 0.4
IOL = 24mA 0.3 0.55
VCC = 3.0V V
IN = VIH or VIL
IOL = 24mA 0.3 0.50
IOS Short Circuit Current
(4)
VCC = Max., VO = GND
(3)
–60 135 –240 mA VH Input Hysteresis 150 mV ICCL
ICCH
Quiescent Power Supply Current VCC = Max.,
V
IN = GND or VCC
COM'L. 0.1 10 µA
ICCZ MIL. 0.1 100
2650 lnk 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH = VCC –0.6V at rated current.
6. The test limits for this parameter is ± 5µA at T
A = –55°C.
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IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.12 4
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC = 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC formula. These limits are guaranteed but not tested.
6. I
C = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) I
CC = Quiescent Current (ICCL, ICCH and ICCZ)
I
CC = Power Supply Current for a TTL High Input
D
H = Duty Cycle for TTL Inputs High
N
T = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP = Number of Clock Inputs at fCP
fi = Input Frequency N
i = Number of Inputs at fi
2650 tbl 06
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Propagation Delays and Enable/Disable times are with V
CC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
4. This parameter is guaranteed but not tested.
2650 tbl 07
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
ICC Quiescent Power Supply Current VCC = Max. VIN = VCC – 0.6V
(3)
2.0 30 µA
ICCD Dynamic Power Supply
Current
(4)
VCC = Max. Outputs Open
OE
= DIR = GND One Input Toggling 50% Duty Cycle
V
IN = VCC
V
IN = GND
—6085µA/
MHz
IC Total Power Supply Current
(6)
VCC = Max. VIN = VCC 0.6 0.9 mA Outputs Open VIN = GND fi =10MHz 50% Duty Cycle VIN = VCC –0.6V 0.6 0.9
OE
= DIR = GND One Bit Toggling
VIN = GND
VCC = Max. Outputs Open fi = 2.5MHz
V
IN = VCC
V
IN = GND
1.2 1.7
(5)
50% Duty Cycle
OE
= DIR = GND Eight Bits Toggling
V
IN = VCC –0.6V
V
IN = GND
1.2 1.8
(5)
FCT3245 FCT3245A
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
tPLH tPHL
Propagation Delay A to B, B to A
CL = 50pF
R
L = 500
1.5 7.0 1.5 7.5 1.5 4.6 1.5 4.9 ns
tPZH tPZL
Output Enable Time
OE
to A or B
1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ tPLZ
Output Disable Time
OE
to A or B
1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
tPZH tPZL
Output Enable Time DIR to A or B
(4)
1.5 9.5 1.5 10.0 1.5 6.2 1.5 6.5 ns
tPHZ tPLZ
Output Disable Time DIR to A or B
(4)
1.5 7.5 1.5 10.0 1.5 5.0 1.5 6.0 ns
Page 5
IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.12 5
DEFINITIONS:
C
L= Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V 0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V 0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V 0V
3V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH 6V
SWITCH GND
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
GND
6V
Open
ENABLE AND DISABLE TIMESPROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
SWITCH POSITION
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
2650 drw 08
2650 drw 04
2650 drw 05
2650 drw 07
2650 drw 06
Test Switch
Open Drain
Disable Low
Enable Low
6V
Disable High
Enable High
GND
All Other tests Open
2650 lnk 08
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH.
2. Pulse Generator for All Pulses: Rate 1.0MHz; t
F ≤ 2.5ns; tR 2.5ns.
3. If V
CC is below 3V, input voltage swings should be adjusted not to exceed
V
CC.
Page 6
IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
8.12 6
ORDERING INFORMATION
2650 drw 09
IDT XX
Temp. Range
XX
Device Type
X
Package
X
Process
54 74
–55°C to +125°C –40°C to +85°C
Blank B
P D SO PY Q
245 245A
Commercial MIL-STD-883, Class B
Plastic DIP (P20-1) CERDIP (D20-1) Small Outline IC (SO20-2) Shrink Small Outline Package (SO20-7) Quarter-size Small Outline Package (SO20-8)
Non-Inverting Octal Bidirectional Transceiver
FCT
X
Family
3 3.3Volt
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