Datasheet IDT74FCT163TSOB, IDT74FCT163TSO, IDT74FCT163TQB, IDT74FCT163TQ, IDT74FCT163TPB Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.

FAST CMOS
SYNCHRONOUS
PRESETTABLE
BINARY COUNTERS

IDT54/74FCT161T/AT/CT
IDT54/74FCT163T/AT/CT

FEATURES:

• Std., A and C speed grades

• Low input and output leakage ≤1µA (max.)

• CMOS power levels

• True TTL input and output compatibility
– V

OH = 3.3V (typ.)

– VOL = 0.3V (typ.)

• High drive outputs (-15mA IOH, 48mA IOL)

• Meets or exceeds JEDEC standard 18 specifications

• Product available in Radiation Tolerant and Radiation

Enhanced versions

• Military product compliant to MIL-STD-883, Class B

and DESC listed (dual marked)

• Available in DIP, SOIC, QSOP, CERPACK and LCC

packages

FUNCTIONAL BLOCK DIAGRAMS

0

P

PE

'161

'163

CEP

DESCRIPTION:

The IDT54/74FCT161T/163T, IDT54/74FCT161AT/ 163AT
and IDT54/74FCT161CT/163CT are high-speed synchro­nous modulo-16 binary counters built using an advanced dual
metal CMOS technology. They are synchronously preset­table for application in programmable dividers and have two
types of count enable inputs plus a terminal count output for
versatility in forming synchronous multi-stage counters. The
IDT54/74FCT161T/AT/CT have asynchronous Master Reset
inputs that override all other inputs and force the outputs LOW.
The IDT54/74FCT163T/AT/CT have Synchronous Reset in­puts that override counting and parallel loading and allow the
outputs to be simultaneously reset on the rising edge of the
clock.

P

1

P

2

P

3

CET

CP

MR ('161)

SR ('163)

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

163

ONLY

CP

161

ONLY

Q

0

CP

D CP D

D

C

Q

0

QQ

Q

DETAIL A

TC

0

DETAIL

A

Q

1

DETAIL

A

Q

2

DETAIL

A

Q

3

2611 drw 01

MILITARY AND COMMERCIAL TEMPERATURE RANGES OCTOBER 1994

1995 Integrated Device Technology, Inc. 6.7 DSC-4219/4

1

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS

INDEX

*RCPVcc

TC

*R

CP

P
P

P
P

CEP

GND

1
2

P16-1,

3

0
1

2
3

4
5
6
7
8

D16-1,

S016-1,

S016-7

E16-1

16

Vcc

15

TC

14

Q

0

13

Q

12

&

11
10

9

1

Q

2

Q

3

CET
PE

2611 drw 02

DIP/SOIC/QSOP/CERPACK

*MR for '161
*SR for ‘163

TOP VIEW

PIN DESCRIPTION

Pin Names Description

CEP Count Enable Parallel Input
CET Count Enable Trickle Input
CP Clock Pulse Input (Active Rising Edge)

MR

(‘161) Asynchronous Master Reset Input (Active LOW)

SR

(‘163) Synchronous Reset Input (Active LOW)

0-3 Parallel Data Inputs

P

PE

0-3 Flip-Flop Outputs

Q
TC Terminal Count Output

Parallel Enable Input (Active LOW)

2611 tbl 01

32

4

P

0

P

1

5

NC NC

6
7

P

2

8

P

3

9

CEP

20 19

1

L20-2

10 11 12 13

PE

NC NC

GND

18
17
16
15
14

CET

Q

0

Q

1

Q

2

Q

3

2611 drw 03

LCC

TOP VIEW

FUNCTION TABLE

(1)

SR

SR

PEPECET CEP Clock Edge(s)

(2)

Action on the Rising

L X X X Reset (Clear)

H L X X Load (P

n→Qn)

H H H H Count (Increment)
H H L X No Change (Hold)
H H X L No Change (Hold)

NOTES:

1. 163 only.

2. H = HIGH Voltage Level, L = LOW Voltage Level, X = Don’t Care.

2611 tbl 02

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Commercial Military Unit

(2)

VTERM

Terminal Voltage

–0.5 to +7.0 –0.5 to +7.0 V
with Respect to
GND

(3)

VTERM

TA Operating

Terminal Voltage
with Respect to
GND

–0.5 to

CC +0.5

V

–0.5 to

VCC +0.5

0 to +70 –55 to +125 °C

V

Temperature

TBIAS Temperature

–55 to +125 –65 to +135 °C
Under Bias

TSTG Storage

–55 to +125 –65 to +150 °C
Temperature

PT Power Dissipation 0.5 0.5 W
IOUT DC Output

–60 to +120 –60 to +120 mA
Current

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other condi­tions above those indicated in the operational sections of this specifica­tion is not
extended periods may affect reliability. No terminal voltage may exceed
V

2. Input and V

3. Outputs and I/O terminals only.

implied. Exposure to absolute maximum rating conditions for

CC by +0.5V unless otherwise noted.

CC terminals only.

2611 lnk 03

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol Parameter

CIN Input

Capacitance

COUT Output

Capacitance

NOTE:

1. This parameter is measured at characterization but not tested.

(1)

Conditions Typ. Max. Unit

VIN = 0V 6 10 pF

VOUT = 0V 8 12 pF

2611 lnk 04

6.7 2

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%

Symbol Parameter Test Conditions

V

IH Input HIGH Level Guaranteed Logic HIGH Level COM'L

(1)

(5)

Min. Typ.

2.0V — — V

MIL 2.7V — — V

IL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V

V

IH Input HIGH Current

I
I

IL Input LOW Current

I

I Input HIGH Current

IK Clamp Diode Voltage VCC = Min., IN = –18mA — –0.7 –1.2 V

V

OS Short Circuit Current VCC = Max.

I

OH Output HIGH Voltage VCC = Min. IOH = –6mA MIL. 2.4 3.3 — V

V

OL Output LOW Voltage VCC = Min. IOL= 32mA MIL. — 0.3 0.5 V

V

H Input Hysteresis — — 200 — mV

V

CC Quiescent Power VCC = Max. — 0.01 1 mA

I

Supply Current V

NOTES: 2611 tbl 05

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.

4. The test limit for this parameter is ±5µA at T

5. Clock pin requires a minimum V

CC = 5.0V, +25°C ambient.

(4)

(4)

(4)

IH of 2.5V.

VCC = Max. VI = 2.7V — — ±1 µA
VCC = Max. VI = 0.5V ——±1µA
VCC = Max., VI = VCC (Max.) — — ±1 µA

(3)

, VO = GND –60 –120 –225 mA

V

IN = VIH or VIL IOH = –8mA COM’L.

OH = –12mA MIL. 2.0 3.0 — V

I
I

OH = –15mA COM’L.

V

IN = VIH or VIL IOL= 48mA COM’L.

IN = GND or VCC

A = -55°C.

(2)

Max. Unit

6.7 3

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

POWER SUPPLY CHARACTERISTICS

Symbol Parameter Test Conditions

CC Quiescent Power Supply Current VCC = Max. — 0.5 2.0 mA

∆I

TTL Inputs HIGH V

ICCD Dynamic Power Supply Current

IN = 3.4V

(4)

VCC = Max., Outputs Open V IN = VCC — 0.15 0.25 mA/

(3)

Load Mode V

(1)

IN = GND MHz

Min. Typ.

CEP = CET = PE = GND

MR

or SR = V

CC

One Input Toggling
50% Duty Cycle

C Total Power Supply Current

I

(6)

VCC = Max., Outputs Open V IN = VCC — 1.5 3.5 mA
Load Mode V
f

CP = 10MHz

IN = GND

50% Duty Cycle
CEP = CET = PE = GND V

MR

or SR = V

CC VIN = GND

IN = 3.4V — 2.0 5.5

One Bit Toggling
at f

i = 5MHz

50% Duty Cycle
V

CC = Max., Outputs Open VIN = VCC — 3.8 7.3

Load Mode VIN = GND
f

CP = 10MHz

50% Duty Cycle
CEP = CET = PE = GND V

MR

or SR = VCC VIN = GND

IN = 3.4V — 5.0 12.3

Four Bits Toggling
at f

i = 5MHz

50% Duty Cycle

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Per TTL driven input (V

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the I

C = IQUIESCENT + IINPUTS + IDYNAMIC

6. I

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)

CC = Quiescent Current

I

CC = Power Supply Current for a TTL High Input (VIN = 3.4V)

∆I

H = Duty Cycle for TTL Inputs High

D
N

T = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

f

i = Input Frequency

f
N

i = Number of Inputs at fi

All currents are in milliamps and all frequencies are in megahertz.

CC = 5.0V, +25°C ambient.

IN = 3.4V). All other inputs at VCC or GND.

CC formula. These limits are guaranteed but not tested.

(2)

Max. Unit

(5)

(5)

2611 tbl 06

6.7 4

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

IDT54/74FCT161T IDT54/74FCT161AT IDT54/74FCT161CT
IDT54/74FCT163T IDT54/74FCT163AT IDT54/74FCT163CT

Com'l. Mil. Com'l. Mil. Com'l Mil.

Symbol Parameter Condition

PLH Propagation Delay CL = 50pF 2.0 11.0 2.0 11.5 2.0 7.2 2.0 7.5 2.0 5.8 2.0 6.3 ns

t
t

PHL CP to Qn RL = 500Ω

(1)

(PE Input HIGH)

t

PLH Propagation Delay 2.0 9.5 2.0 10.0 2.0 6.2 2.0 6.5 2.0 5.8 2.0 6.3 ns

t

PHL CP to Qn

(PE Input LOW)

PLH Propagation Delay 2.0 15.0 2.0 16.5 2.0 9.8 2.0 10.8 2.0 7.4 2.0 8.3 ns

t
t

PHL CP to TC
PLH Propagation Delay 1.5 8.5 1.5 9.0 1.5 5.5 1.5 5.9 1.5 5.2 1.5 5.6 ns

t
t

PHL CET to TC
PHL Propagation Delay 2.0 13.0 2.0 14.0 2.0 8.5 2.0 9.1 2.0 6.0 2.0 6.6 ns

t

MR

to Q

n ('161)

PHL Propagation Delay 2.0 11.5 2.0 12.5 2.0 7.5 2.0 8.2 2.0 7.0 2.0 7.7 ns

t

MR

to TC ('161)

t

SU Set-up Time, 5.0 — 5.5 — 4.0 — 4.5 — 4.0 — 4.5 — ns

HIGH or LOW
P

n to CP

t

H Hold Time, 1.5 — 2.0 — 1.5 — 2.0 — 1.5 — 2.0 — ns

HIGH or LOW
P

n to CP

SU Set-up Time, 11.5 — 13.5 — 9.5 — 11.5 — 9.5 — 11.5 — ns

t

HIGH or LOW

PE

or SR to CP

t

H Hold Time, 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns

HIGH or LOW

PE

or SR to CP

t

SU Set-up Time, 11.5 — 13.0 — 9.5 — 11.0 — 9.5 — 11.0 — ns

HIGH or LOW
CEP or CET to CP

t

H Hold Time, 0 — 0 — 0 — 0 — 0 — 0 — ns

HIGH or LOW
CEP or CET to CP

t

W Clock Pulse 5.0 — 5.0 — 4.0

Width (Load)
HIGH or LOW

t

W Clock Pulse 7.0 — 8.0 — 6.0 — 7.0 — 6.0 — 7.0 — ns

Width (Count)
HIGH or LOW

t

W

MR

Pulse Width, 5.0 — 5.0 — 4.0

LOW ('161)

REM Recovery Time 6.0 — 6.0 — 5.0 — 5.0 — 5.0 — 5.0 — ns

t

MR

to CP ('161)

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

(3)

(3)

Max. Min.

— 4.0

— 4.0

(2)

(3)

(3)

Max. Min.

— 4.0

— 4.0

(2)

(3)

(3)

Max. Min.

— 4.0

— 4.0

(2)

Max. Unit

(3)

—ns

(3)

—ns

NOTES: 2611 tbl 07

1. See test circuits and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. This limit is guaranteed but not tested.

6.7 5

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

V

CC

7.0V

SWITCH POSITION

Test

Open Drain
Disable Low

Enable Low

All Other Tests

Generator.

Pulse

Generator

500

Ω

V

V

IN

OUT

D.U.T.

50pF

500

T

R

C

L

Ω

2611 drw 04

DEFINITIONS:

L= Load capacitance: includes jig and probe capacitance.

C
R

T = Termination resistance: should be equal to ZOUT of the Pulse

SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

PRESET

CLEAR

CLOCK ENABLE

ETC.

t

t

REM

H

t

H

t

SU

t

SU

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V

0V

3V

1.5V
0V

2611 drw 05

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

Switch

Closed

Open

2611 lnk 08

1.5V

t

W

1.5V

2611 drw 06

SAME PHASE

INPUT TRANSITION

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

t

PLH

t

PLH

t

t

PHL

PHL

3V

1.5V
0V

OH

V

1.5V

V

OL

3V

1.5V
0V

2611 drw 07

ENABLE AND DISABLE TIMESPROPAGATION DELAY

ENABLE DISABLE

3V

CONTROL

INPUT

t

PHZ

PLZ

t

F ≤ 2.5ns; tR ≤ 2.5ns

t

PZL

OUTPUT

NORMALLY

OUTPUT

NORMALLY

HIGH

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t

LOW

SWITCH
CLOSED

t

PZH

SWITCH
OPEN

3.5V

1.5V

1.5V
0V

0.3V

0.3V

1.5V
0V

3.5V

V

OL

V

OH

0V

2611 drw 08

6.7 6

IDT54/74FCT161T/AT/CT, IDT54/74FCT163T/AT/CT
FAST CMOS SYNCHRONOUS PRESETTABLE BINARY COUNTERS MILITARY AND COMMERCIAL TEMPERATURE RANGES

ORDERING INFORMATION

FCTIDT

X

Temperature

Range

X

Family

XXXX

Device

Type

X

PackageXProcess

Blank
B

P
D
L
SO
E
Q

161T
163T
161AT
163AT

54
74

Commercial
MIL-STD-883, Class B

Plastic DIP
CERDIP
Leadless Chip Carrier
Small Outline IC
CERPACK
Quarter-size Small Outline Package

Synchronous Binary Counter
with Asynchronous Master Reset

High DriveBlank

-55°C to +125°C
0° to +70°C

2611 drw 09

6.7 7