Datasheet IDT74FCT163827CPV, IDT74FCT163827CPF, IDT74FCT163827CPA, IDT74FCT163827BPV, IDT74FCT163827BPF Datasheet (Integrated Device Technology)

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Integrated Device Technology, Inc.
DESCRIPTION:
The FCT163827A/B/C 20-bit buffers are built using ad­vanced dual metal CMOS technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or busses carrying parity. Two pairs of NAND-ed output enable controls offer maximum control flexibility and are organized to operate the device as two 10­bit buffers or one 20-bit buffer. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin.
The FCT163827A/B/C have series current limiting resis­tors. This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors.
The inputs of the FCT163827A/B/C can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system.
3.3V CMOS 20-BIT BUFFERS
IDT74FCT163827A/B/C
1
FEATURES:
• 0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP and 15.7 mil pitch TVSOP
• Extended commercial range of -40°C to +85°C
•V
CC = 3.3V ±0.3V, Normal Range or
VCC = 2.7 to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V components
3083 drw 01
3083 drw 02
FUNCTIONAL BLOCK DIAGRAM
1Y1
TO 9 OTHER CHANNELS
1OE1
1OE2
1A1
2Y1
TO 9 OTHER CHANNELS
2OE1
2OE2
2A1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE AUGUST 1996
1996 Integrated Device Technology, Inc. 8.9 DSC-3083/3
8.9 2
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATIONS
1Y1
GND
1Y3
V
CC
1
OE
1
GND
1Y10
GND
1Y2
1
Y
4
1
Y
5
1
Y
6
1
Y
7
1
Y
8
1
Y
9
2
Y
3
V
CC
GND
2Y4
2
Y
5
2
Y
7
2
Y
8
2
Y
6
2OE1
1
OE
2
1
A
1
1
A
2
GND
1A3
1
A
4
V
CC
1
A
5
1
A
6
1
A
7
1
A
8
1
A
9
1
A
10
GND
GND
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56 55
49
50
51
52
53
54
48
1 2 3 4 5 6 7 8 9 10
12 13 14 15 16 17 18 19 20
11
21 22 23 24
SSOP/
TSSOP/TVSOP
TOP VIEW
SO56-1 SO56-2 SO56-3
2Y1 2
Y
2
2
Y
10
2
Y
9
2
A
3
2
A
4
V
CC
2
A
5
2
A
7
2
A
8
2
A
6
GND
2A9
2
A
10
2
OE
2
29
30
31
3225 26 27 28
2A1
2
A
2
3083 drw 03
PIN DESCRIPTION
Pin Names Description
xOEx Output Enable Inputs (Active LOW)
xAx Data Inputs xYx 3-State Outputs
3083 tbl 01
ABSOLUTE MAXIMUM RATINGS
(1)
3083 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex­tended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
Symbol Description Max. Unit
V
TERM
(2)
Terminal Voltage with Respect to GND
–0.5 to +4.6 V
V
TERM
(3)
Terminal Voltage with Respect to GND
–0.5 to +7.0 V
V
TERM
(4)
Terminal Voltage with Respect to GND
–0.5 to
V
CC
+ 0.5
V
T
STG
Storage Temperature –65 to +150
°
C
I
OUT
DC Output Current –60 to +60 mA
CAPACITANCE (TA = +25°C, f = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
3083 lnk 04
Symbol Parameter
(1)
Conditions Typ. Max. Unit
C
IN
Input Capacitance
VIN = 0V 3.5 6.0
pF
C
OUT
Output Capacitance
V
OUT
= 0V 3.5 8.0
pF
NOTE: 3083 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level X = Don’t Care Z = High Impedance
FUNCTION TABLE
(1)
Inputs Outputs
x
OE
OE
1 x
OE
OE
2 xAxxYx
LLL L
LLH H HXX Z XHX Z
8.9 3
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: T
A = –40°C to +85°C, VCC = 2.7V to 3.6V
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
IH
Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2.0 5.5 V Input HIGH Level (I/O pins) 2.0 VCC+0.5
V
IL
Input LOW Level Guaranteed Logic LOW Level –0.5
0.8 V
(Input and I/O pins)
I
I H
Input HIGH Current (Input pins) VCC = Max. VI = 5.5V
±
1
µ
A
Input HIGH Current (I/O pins) VI = V
CC
±
1
I
I L
Input LOW Current (Input pins) VI = GND
±
1
Input LOW Current (I/O pins) VI = GND
±
1
I
OZH
High Impedance Output Current VCC = Max. VO = V
CC
±
1
µ
A
I
OZL
(3-State Output pins) VO = GND
±
1
V
IK
Clamp Diode Voltage VCC = Min., I
IN
= –18mA
0.7
1.2 V
I
ODH
Output HIGH Current VCC = 3.3V, V
IN
= V
IH
or V
IL, VO
= 1.5V
(3)
–36 –60 –110 mA
I
ODL
Output LOW Current VCC = 3.3V, V
IN
= V
IH
or V
IL, VO
= 1.5V
(3)
50 90 200 mA
V
OH
Output HIGH Voltage VCC = Min. IOH = –0.1mA V
CC
0.2 V
VIN = V
IH
or V
IL
IOH = –3mA 2.4 3.0
VCC = 3.0V V
IN
= V
IH
or V
IL
IOH = –8mA 2.4
(5)
3.0
V
OL
Output LOW Voltage VCC = Min. IOL = 0.1mA 0.2 V
VIN = V
IH
or V
IL
IOL = 16mA 0.2 0.4 IOL = 24mA 0.3 0.55
VCC = 3.0V V
IN
= V
IH
or V
IL
IOL = 24mA 0.3 0.50
I
OS
Short Circuit Current
(4)
VCC = Max., VO = GND
(3)
–60
135 –240 mA
V
H
Input Hysteresis
150
mV
I
CCL
I
CCH
Quiescent Power Supply Current VCC = Max.,
V
IN
= GND or V
CC
0.1 10
µ
A
I
CCZ
3083 lnk 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH = VCC –0.6V at rated current.
8.9 4
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
3083 tbl 06
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC = 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC formula. These limits are guaranteed but not tested.
6. I
C = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) I
CC = Quiescent Current (ICCL, ICCH and ICCZ)
I
CC = Power Supply Current for a TTL High Input
D
H = Duty Cycle for TTL Inputs High
N
T = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP = Number of Clock Inputs at fCP
fi = Input Frequency N
i = Number of Inputs at fi
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
ICC Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max. VIN = VCC –0.6V
(3)
2.0 30 µA
ICCD Dynamic Power Supply Current
(4)
VCC = Max. Outputs Open x
OE
1 = xOE2 = GND
One Input Toggling 50% Duty Cycle
V
IN = VCC
V
IN = GND
—5075µA/
MHz
IC Total Power Supply Current
(6)
VCC = Max. Outputs Open fi = 10MHz
VIN = VCC V
IN = GND
0.5 0.7 mA
50% Duty Cycle x
OE
1 = xOE2 = GND
One Bit Toggling
V
IN = VCC –0.6V
V
IN = GND
0.5 0.8
VCC = Max. Outputs Open fi = 2.5MHz
VIN = VCC V
IN = GND
2.5 3.7
(5)
50% Duty Cycle x
OE
1 = xOE2 = GND
Twenty Bits Toggling
V
IN = VCC –0.6V
V
IN = GND
2.5 4.1
(5)
8.9 5
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(4)
FCT163827A FCT163827B FCT163827C
Symbol Parameter Conditions
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max.
Unit
tPLH tPHL
Propagation Delay xAx
to xYx
C
L = 50pF
R
L = 500
1.5 8.0 1.5 5.0 1.5 4.4 ns
CL = 300pF
(4)
RL = 500
1.5 15.0 1.5 13.0 1.5 10.0
tPZH tPZL
Output Enable Time xOEx to xYx
CL = 50pF R
L = 500
1.5 12.0 1.5 8.0 1.5 7.0 ns
CL = 300pF
(4)
RL = 500
1.5 23.0 1.5 15.0 1.5 14.0
tPHZ tPLZ
Output Disable Time xOEx to xYx
CL = 5pF
(4)
RL = 500
1.5 9.0 1.5 6.0 1.5 5.7 ns
CL = 50pF R
L = 500
1.5 10.0 1.5 7.0 1.5 6.0
tSK(o) Output Skew
(3)
0.5 0.5 0.5 ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. Propagation Delays and Enable/Disable times are with V
CC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
3083 tbl 07
8.9 6
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMESPROPAGATION DELAY
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
SWITCH POSITION
3083 drw 05
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate 1.0MHz; t
F ≤ 2.5ns; tR 2.5ns.
3. If V
CC is below 3V, input voltage swings should be adjusted not to
exceed V
CC.
DEFINITIONS:
C
L= Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Test Switch
Open Drain
Disable Low
Enable Low
6V
Disable High
Enable High
GND
All Other tests Open
3083 lnk 08
3083 drw 09
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V
0V
3V
1.5V 0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
tSU
tH
tREM
tSU
tH
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
tW
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V 0V
1.5V
V
OH
tPLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V 0V
tPLH tPHL
tPHL
VOL
CONTROL
INPUT
3V
1.5V 0V
3V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH 6V
SWITCH GND
VOL
0.3V
0.3V
t
PLZtPZL
tPZH tPHZ
3V
0V
1.5V
1.5V
ENABLE DISABLE
VOH
PRESET
CLEAR
CLOCK ENABLE
ETC.
Pulse
Generator
R T
D.U.T.
V
CC
V IN
C
L
V
OUT
50pF
500
500
GND
6V
Open
3083 drw 07
3083 drw 06
3083 drw 08
8.9 7
IDT74FCT163827A/B/C FAST CMOS 20-BIT BUFFERS COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX
Temp. Range
XXXX
Device Type
X
Package
74 –40°C to +85°C
PV PA PF
163827A 163827B 163827C
Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3)
Non-Inverting 20-Bit Buffers
FCT
3083 drw 10
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