Datasheet IDT74FCT163652PVB, IDT74FCT163652CPF, IDT74FCT163652CPAB, IDT74FCT163652CPA, IDT74FCT163652CEB Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.



The IDT logo is a registered trademark of Integrated Device Technology, Inc.

3.3V CMOS 16-BIT BUS
TRANSCEIVER/
REGISTERS

IDT54/74FCT163652/A/C

PRODUCT PREVIEW

FEATURES:

• 0.5 MICRON CMOS Technology

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)

• Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack

• Extended commercial range of -40°C to +85°C

•VCC = 3.3V ±0.3V, Normal Range or
VCC = 2.7 to 3.6V, Extended Range

• CMOS power levels (0.4µW typ. static)

• Rail-to-Rail output swing for increased noise margin

• Military product compliant to MIL-STD-883, Class B

• Low Ground Bounce (0.3V typ.)

• Inputs (except I/O) can be driven by 3.3V or 5V
components

These high-speed, low-power devices are organized as two
independent 8-bit bus transceivers with 3-state D-type regis­ters. For example, the xOEAB and x

OEBA

signals control the

transceiver functions.

The xSAB and xSBA control pins are provided to select
either real time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between stored
and real time data. A LOW input level selects real-time data
and a HIGH level selects stored data.

Data on the A or B data bus, or both, can be stored in the
internal D-flip-flops by LOW-to-HIGH transitions at the appro­priate clock pins (xCLKAB or xCLKBA), regardless of the
select or enable control pins. Flow-through organization of
signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.

The IDT54/74FCT163652/A/C have series current limiting
resistors. This offers low ground bounce, minimal under­shoot, and controlled output fall times–reducing the need for
external series terminating resistors.

DESCRIPTION:

The IDT54/74FCT163652/A/C 16-bit registered transceiv-

ers are built using advanced dual metal CMOS technology.

1A1

1

OEBA

1CLKBA

1SBA

1CLKAB

1SAB

1OEAB

3084 drw 01

1B1

B REG

A REG

D
C

C

D

TO 7 OTHER CHANNELS

2B1

2

CLKAB

2OEBA

2CLKBA

2SBA

2A1

2

OEAB

2SAB

3084 drw 02

TO 7 OTHER CHANNELS

B REG

A REG

D
C

C

D

FUNCTIONAL BLOCK DIAGRAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996

1996 Integrated Device Technology, Inc. 8.7 DSC-3084/2

1

8.7 2

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS

1OEAB

1CLKAB

1SAB

GND

1A1

1

A2

VCC

1

A3

1

A4

GND

1A5

1

A6

1

A7

1

A8

GND

2A1

2

A2

VCC

2

A3

2

SAB

2A5

2

A4

2

A7

GND

2A8

2

CLKAB
2OEAB

2A6

1

B1

1

B2

GND

1B3

1

B4

VCC

1

B5

1

B6

1

OEBA

1SBA

1B7

1

B8

2

B1

2

B2

GND

2B3

2

B4

VCC

2

B5

GND

1CLKBA

2B7

2

B6

2

B8

GND

2SBA
2CLKBA
2OEBA

47

37

38

39

40

41

42

43

44

45

46

33

34

35

36

56
55

49

50

51

52

53

54

48

1
2

3
4
5
6
7
8
9
10

12
13
14
15
16
17
18
19
20

11

21
22
23
24

29

30

31

3225
26
27
28

3084 drw 04

CERPACK
TOP VIEW

E56-1

PIN DESCRIPTION

3084 tbl 01

Pin Names Description

xAx Data Register A Inputs

Data Register B Outputs

xBx Data Register B Inputs

Data Register A Outputs

xCLKAB, xCLKBA Clock Pulse Inputs

xSAB, xSBA Output Data Source Select Inputs

xOEAB, x

OEBA

Output Enable Inputs

1B1

1

B

2

GND

1B3

1

B

4

V

CC

1

B

5

1

B

6

1

OEBA

1

SBA

1B7

1

B

8

2

B

1

2

B

2

GND

2B3

2

B

4

V

CC

2

B

5

GND

1

CLKBA

2B7

2

B

6

2

B

8

GND

2

SBA

2

CLKBA

2

OEBA

1

OEAB

1

CLKAB

1

SAB

GND

1A1

1

A

2

V

CC

1

A

3

1

A

4

GND

1A5

1

A

6

1

A

7

1

A

8

GND

2A1

2

A

2

V

CC

2

A

3

2

SAB

2A5

2

A

4

2

A

7

GND

2A8

2

CLKAB

2OEAB

2A6

3084 drw 03

47

37

38

39

40

41

42

43

44

45

46

33

34

35

36

56
55

49

50

51

52

53

54

48

1
2
3
4
5
6
7
8
9
10

12
13
14
15
16
17
18
19
20

11

21
22
23
24

SSOP/

TSSOP/TVSOP

TOP VIEW

SO56-1
SO56-2
SO56-3

29

30

31

3225
26
27
28

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.7 3

FUNCTION TABLE

(2)

NOTES: 3084 tbl 03

1. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs.
Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH
transition on the clock inputs.

2. Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.

3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
↑ = LOW-to-HIGH Transition

CAPACITANCE (TA = +25°C, f = 1.0MHz) ABSOLUTE MAXIMUM RATINGS

(1)

Inputs Data I/O

(1)

Operation or Function

xOEAB x

OEBA

OEBA

xCLKAB xCLKBA xSAB xSBA xAx xBx

L
L

H
H

H or L↑H or L

↑

X
X

X
X

Input Input Isolation

Store A and B Data

X
H

H
H

↑
↑

H or L

↑

X

X

(2)

X
X

Input
Input

Unspecified

(1)

Output

Store A, Hold B
Store A in Both Registers

L
L

X
L

H or L

↑

↑
↑

X
X

X

X

(2)

Unspecified

(1)

Output

Input
Input

Hold A, Store B
Store B in both Registers

L
L

L
L

X
X

X

H or L

X
X

L
H

Output Input Real Time B Data to A Bus

Stored B Data to A Bus
H
H

H
H

X

H or L

X
X

L
H

X
X

Input Output Real Time A Data to B Bus

Stored A Data to B Bus
H L H or L H or L H H Output Output Stored A Data to B Bus and

Stored B Data to A Bus

Symbol Parameter

(1)

Conditions Typ. Max. Unit

CIN Input

Capacitance

VIN = 0V 3.5 6.0 pF

CI/O I/O

Capacitance

VOUT = 0V 3.5 8.0 pF

NOTE:

1. This parameter is measured at characterization but not tested.

3084 lnk 02

Symbol Description Max. Unit

VTERM

(2)

Terminal Voltage with
Respect to GND

–0.5 to +4.6 V

VTERM

(3)

Terminal Voltage with
Respect to GND

–0.5 to +7.0 V

VTERM

(4)

Terminal Voltage with
Respect to GND

–0.5 to

V

CC + 0.5

V

TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +60 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.

2. Vcc terminals.

3. Input terminals.

4. Output and I/O terminals.

3084 lnk 04

8.7 4

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

REAL-TIME TRANSFER

BUS B TO A

REAL-TIME TRANSFER

BUS A TO B

BUS

A

BUS

B

xOEAB xOEBA

xCLKAB

xCLKBA xSAB xSBA

LL X X XL

3084 drw 05

BUS

A

BUS

B

x

OEABxOEBAxCLKAB

x

CLKBA

x

SAB

x

SBA

H

H

X

XL X

3084 drw 06

BUS

A

BUS

B

x

OEABxOEBAxCLKAB

x

CLKBA

x

SABxSBA

LXX

X

LH XX

X

X

X

H

↑

XX

↑

↑
↑

X

3084 drw 07

TRANSFER STORED

DATA TO A AND/OR B

STORAGE FROM

A AND/OR B

BUS

A

BUS

B

xOEAB x OEBA xCLKAB xCLKBA xSAB xSBA

HL

H or L

H

H or L

H

3084 drw 08

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.7 5

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V; Military: TA = –55°C to +125°C, VCC = 2.7V to 3.6V

3084 lnk 05

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. V

OH = VCC –0.6V at rated current.

6. The test limit for this parameter is ±5µA at T

A = –55°C.

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

V

IH

Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2.0 — 5.5 V
Input HIGH Level (I/O pins) 2.0 — VCC+0.5

V

IL

Input LOW Level Guaranteed Logic LOW Level –0.5

—

0.8 V

(Input and I/O pins)

I

I H

Input HIGH Current (Input pins)

(6)

VCC = Max. VI = 5.5V —

—

±

1

µ

A

Input HIGH Current (I/O pins)

(6)

VI = V

CC

—

—

±

1

I

I L

Input LOW Current (Input pins)

(6)

VI = GND —

—

±

1

Input LOW Current (I/O pins)

(6)

VI = GND —

—

±

1

I

OZH

High Impedance Output Current VCC = Max. VO = V

CC

—

—

±

1

µ

A

I

OZL

(3-State Output pins)

(6)

VO = GND —

—

±

1

V

IK

Clamp Diode Voltage VCC = Min., I

IN

= –18mA —

–

0.7

–

1.2 V

I

ODH

Output HIGH Current VCC = 3.3V, V

IN

= V

IH

or V

IL, VO

= 1.5V

(3)

–36 –60 –110 mA

I

ODL

Output LOW Current VCC = 3.3V, V

IN

= V

IH

or V

IL, VO

= 1.5V

(3)

50 90 200 mA

V

OH

Output HIGH Voltage VCC = Min. IOH = –0.1mA V

CC

–

0.2 — — V

VIN = V

IH

or V

IL

IOH = –3mA 2.4 3.0 —

VCC = 3.0V
V

IN

= V

IH

or V

IL

IOH = –6mA MIL.
I

OH

= –8mA COM'L.

2.4

(5)

3.0 —

V

OL

Output LOW Voltage VCC = Min. IOL = 0.1mA — — 0.2 V

VIN = V

IH

or V

IL

IOL = 16mA — 0.2 0.4
IOL = 24mA — 0.3 0.55

VCC = 3.0V
V

IN

= V

IH

or V

IL

IOL = 24mA — 0.3 0.50

I

OS

Short Circuit Current

(4)

VCC = Max., VO = GND

(3)

–60

–

135 –240 mA

V

H

Input Hysteresis

—

— 150

—

mV

I

CCL

I

CCH

Quiescent Power Supply Current VCC = Max.,

V

IN

= GND or V

CC

COM'L. — 0.1 10

µ

A

I

CCZ

MIL. — 0.1 100

8.7 6

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

NOTES:

1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

CC = 3.3V, +25°C ambient.

3. Per TTL driven input; all other inputs at V

CC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the I

CC formula. These limits are guaranteed but not tested.

6. I

C = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
I

CC = Quiescent Current (ICCL, ICCH and ICCZ)

∆I

CC = Power Supply Current for a TTL High Input

D

H = Duty Cycle for TTL Inputs High

N

T = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f

CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

N

CP = Number of Clock Inputs at fCP

fi = Input Frequency
N

i = Number of Inputs at fi

POWER SUPPLY CHARACTERISTICS

3084 tbl 08

Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

∆I

CC

Quiescent Power Supply Current
TTL Inputs HIGH

VCC = Max. V

IN

= V

CC

–0.6V

(3)

— 2.0 30

µ

A

I

CCD

Dynamic Power Supply Current

(4)

VCC = Max.
Outputs Open
xOEAB = x

OEBA

=GND
One Input Toggling
50% Duty Cycle

V

IN

= V

CC

VIN = GND

— 60 100

µ

A/

MHz

I

C

Total Power Supply Current

(6)

VCC = Max.
Outputs Open
f

CP

= 10MHz (xCLKBA)

50% Duty Cycle

V

IN

= V

CC

VIN = GND

— 0.6 1.0 mA

xOEAB = x

OEBA

=GND
One Bit Toggling
fi = 5MHz
50% Duty Cycle

V

IN

= V

CC

–0.6V

V

IN

= GND

— 0.6 1.0

VCC = Max.
Outputs Open
f

CP

= 10MHz (xCLKBA)

50% Duty Cycle

V

IN

= V

CC

VIN = GND

— 3.0 5.0

(5)

xOEAB = x

OEBA

=GND
Sixteen Bits Toggling
fi = 2.5MHz
50% Duty Cycle

V

IN

= V

CC

–0.6V

V

IN

= GND

— 3.0 5.3

(5)

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.7 7

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs of the same package, switching in the same direction. This parameter is guaranteed by design.

4. Propagation Delays and Enable/Disable times are with V

CC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays

and Enable/Disable times should be degraded by 20%.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

(4)

3084 tbl 09

FCT163652 FCT163652A FCT163652C

Com'l. Mil. Com'l. Mil. Com'l. Mil.

Symbol Parameter Condition

(1)

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

tPLH
tPHL

Propagation Delay
Bus to Bus

CL = 50pF

R

L = 500Ω

2.0 9.0 2.0 11.0 2.0 6.3 2.0 7.7 1.5 5.4 — — ns

tPZH

tPZL

Output Enable Time
xOEAB or x

OEBA

to Bus

2.0 14.0 2.0 15.0 2.0 9.8 2.0 10.5 1.5 7.8 — — ns

tPHZ

tPLZ

Output Disable Time
xOEAB or x

OEBA

to Bus

2.0 9.0 2.0 11.0 2.0 6.3 2.0 7.7 1.5 6.3 — — ns

tPLH
tPHL

Propagation Delay
Clock to Bus

2.0 9.0 2.0 10.0 2.0 6.3 2.0 7.0 1.5 5.7 — — ns

tPLH
tPHL

Propagation Delay xSBA or
xSAB to Bus

2.0 11.0 2.0 12.0 2.0 7.7 2.0 8.4 1.5 6.2 — — ns

tSU Set-up Time HIGH or LOW

Bus to Clock

4.0 — 4.5 — 2.0 — 2.0 — 2.0 — — — ns

tH Hold Time HIGH or LOW

Bus to Clock

2.0 — 2.0 — 1.5 — 1.5 — 1.5 — — — ns

tW Clock Pulse Width

HIGH or LOW

6.0 — 6.0 — 5.0 — 5.0 — 5.0 — — — ns

tSK(o) Output Skew

(3)

— 0.5 — 0.5 — 0.5 — 0.5 — 0.5 — — ns

8.7 8

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

ENABLE AND DISABLE TIMESPROPAGATION DELAY

SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH

SWITCH POSITION

3084 drw 13

3084 drw 11

3084 drw 09

3084 drw 10

3084 drw 12

3V

1.5V
0V

3V

1.5V

0V
3V

1.5V
0V

3V

1.5V

0V

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

tSU

tH

tREM

tSU

tH

HIGH-LOW-HIGH

PULSE

LOW-HIGH-LOW

PULSE

tW

1.5V

1.5V

SAME PHASE

INPUT TRANSITION

3V

1.5V
0V

1.5V

V

OH

tPLH

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

3V

1.5V
0V

tPLH tPHL

tPHL

VOL

CONTROL

INPUT

3V

1.5V
0V

3V

0V

OUTPUT

NORMALLY

LOW

OUTPUT

NORMALLY

HIGH

SWITCH
6V

SWITCH
GND

VOL

0.3V

0.3V

t

PLZtPZL

tPZH tPHZ

3V

0V

1.5V

1.5V

ENABLE DISABLE

VOH

PRESET

CLEAR

CLOCK ENABLE

ETC.

Pulse

Generator

R T

D.U.T.

V

CC

V IN

C

L

V

OUT

50pF

500Ω

500Ω

GND

6V

←

Open

DEFINITIONS:

C

L= Load capacitance: includes jig and probe capacitance.

R

T = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

3084 lnk 10

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t

F ≤ 2.5ns; tR ≤ 2.5ns.

3. If V

CC is below 3V, input voltage swings should be adjusted not to

exceed V

CC.

Test Switch

Open Drain

Disable Low

Enable Low

6V

Disable High

Enable High

GND

All Other tests Open

IDT54/74FCT163652/A/C

3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES

8.7 9

ORDERING INFORMATION

IDT XX FCT XXXX

Device TypeXPackage

X

Process

Blank
B

PV
PA
PF
E

163652
163652A
163652C

Commercial
MIL-STD-883, Class B

Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
CERPACK (E56-1)

Non-Inverting 16-Bit Bus Transceiver/Register

Temperature

Range

54
74

–55°C to +125°C
–40°C to +85°C

3084 drw 14