Datasheet IDT74FCT163373PV, IDT74FCT163373PF, IDT74FCT163373PA, IDT74FCT163373CPV, IDT74FCT163373CPF Datasheet (Integrated Device Technology)

Integrated Device Technology, Inc.

3.3V CMOS
16-BIT TRANSPARENT
LATCH

IDT74FCT163373/A/C

FEATURES:

• 0.5 MICRON CMOS Technology

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)

• Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP and 15.7 mil pitch TVSOP

• Extended commercial range of -40°C to +85°C

•V

CC = 3.3V ±0.3V, Normal Range or

VCC = 2.7 to 3.6V, Extended Range

• CMOS power levels (0.4µW typ. static)

• Rail-to-Rail output swing for increased noise margin

• Low Ground Bounce (0.3V typ.)

• Inputs (except I/O) can be driven by 3.3V or 5V
components

FUNCTIONAL BLOCK DIAGRAM

1OE

DESCRIPTION:

The FCT163373/A/C 16-bit transparent D-type latches are
built using advanced dual metal CMOS technology. These
high-speed, low-power latches are ideal for temporary stor­age of data. They can be used for implementing memory
address latches, I/O ports, and bus drivers. The Output
Enable and Latch Enable controls are organized to operate
each device as two 8-bit latches or one 16-bit latch. Flow­through organization of signal pins simplifies layout. All inputs
are designed with hysteresis for improved noise margin.

The inputs of FCT163373/A/C can be driven from either

3.3V or 5V devices. This feature allows the use of these
transparent latches as translators in a mixed 3.3V/5V supply
system. With xLE inputs HIGH, the FCT163373/A/C can be
used as buffers to connect 5V components to a 3.3V bus.

2

OE

1LE
1D1

D

C

TO 7 OTHER CHANNELS

2601 drw 01

1O1

2LE

2D1

D

C

TO 7 OTHER CHANNELS

2O1

2601 drw 02

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE AUGUST 1996

1996 Integrated Device Technology, Inc. 8.4 DSC-2601/6

1

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS

1

OE

1O1
1O2

GND

1O3

O4

1

VCC

O5

1

O6

1

GND

O7

1

O8

1

O1

2
2O2

GND

O3

2

O4

2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

SO48-1
SO48-2
SO48-3

48
47
46
45
44
43
42
41

40

39
38
37
36

35

34
33
32

1LE
1D1

D2

1

GND

1D3

D4

1

VCC

D5

1

D6

1

GND

D7

1

D8

1

D1

2

D2

2

GND

2

D3
D4

2

PIN DESCRIPTION

Pin Names Description

xDx Data Inputs
xLE Latch Enable Input (Active HIGH)
x

OE

xOx 3-State Outputs

ABSOLUTE MAXIMUM RATINGS

Symbol Description Max. Unit

(2)

V

TERM

(3)

V

TERM

(4)

V

TERM

T

STG

I

OUT

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT­INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for ex­tended periods may affect reliability.

2. Vcc terminals.

3. Input terminals.

4. Output and I/O terminals.

Output Enable Input (Active LOW)

2601 tbl 01

(1)

Terminal Voltage with

–0.5 to +4.6 V
Respect to GND
Terminal Voltage with

–0.5 to +7.0 V
Respect to GND
Terminal Voltage with
Respect to GND

–0.5 to

CC

+ 0.5

V

Storage Temperature –65 to +150

V

°

C

DC Output Current –60 to +60 mA

2601 lnk 03

V

CC

O5

2

2

O6

GND

O7

2

O8

2

2OE

18
19
20
21
22
23
24

SSOP/

TSSOP/TVSOP

TOP VIEW

31
30
29
28
27
26
25

VCC

D5

2

2

D6

GND

D7

2

D8

2

LE

2

2601 drw 03

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol Parameter

CIN Input

Capacitance

COUT Output

Capacitance

NOTE:

1. This parameter is measured at characterization but not tested.

FUNCTION TABLE

xDx xLE x

HHLH

LHLL

XXHZ

NOTE: 2601 tbl 02

1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance

(1)

Conditions Typ. Max. Unit

VIN = 0V 3.5 6.0 pF

VOUT = 0V 3.5 8.0 pF

2601 lnk 04

(1)

Inputs Outputs

OE

OE

xOx

8.4 2

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: T

A = –40°C to +85°C, VCC = 2.7V to 3.6V

Symbol Parameter Test Conditions

(1)

Min. Typ.

(2)

Max. Unit

VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2.0 — 5.5 V

Input HIGH Level (I/O pins) 2.0 — VCC+0.5

VIL Input LOW Level Guaranteed Logic LOW Level –0.5 — 0.8 V

(Input and I/O pins)

II H Input HIGH Current (Input pins) VCC = Max. VI = 5.5V — — ±1 µA

Input HIGH Current (I/O pins) VI = VCC — — ±1

II L Input LOW Current (Input pins) VI = GND — — ±1

Input LOW Current (I/O pins) VI = GND — — ±1
IOZH High Impedance Output Current VCC = Max. VO = VCC — — ±1 µA
IOZL (3-State Output pins) VO = GND — — ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IODH Output HIGH Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V
IODL Output LOW Current VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V

(3)
(3)

–36 –60 –110 mA

50 90 200 mA

VOH Output HIGH Voltage VCC = Min. IOH = –0.1mA VCC–0.2 — — V

VIN = VIH or VIL IOH = –3mA 2.4 3.0 —
VCC = 3.0V

V

IN = VIH or VIL

IOH = –8mA 2.4

(5)

3.0 —

VOL Output LOW Voltage VCC = Min. IOL = 0.1mA — — 0.2 V

VIN = VIH or VIL IOL = 16mA — 0.2 0.4

IOL = 24mA — 0.3 0.55

IOS Short Circuit Current

(4)

VCC = 3.0V
V

IN = VIH or VIL

VCC = Max., VO = GND

IOL = 24mA — 0.3 0.50

(3)

–60 –135 –240 mA
VH Input Hysteresis — — 150 — mV
ICCL

ICCH

Quiescent Power Supply Current VCC = Max.,

V

IN = GND or VCC

— 0.1 10 µA

ICCZ

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. V

OH = VCC –0.6V at rated current.

2601 lnk 05

8.4 3

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

POWER SUPPLY CHARACTERISTICS

Symbol Parameter Test Conditions

∆ICC Quiescent Power Supply Current

VCC = Max. VIN = VCC – 0.6V

(1)

(3)

Min. Typ.

— 2.0 30 µA

TTL Inputs HIGH

ICCD Dynamic Power Supply

(4)

Current

VCC = Max.
Outputs Open

V

IN = VCC

V

IN = GND

—5075µA/

xOE = GND
One Input Toggling
50% Duty Cycle

IC Total Power Supply Current

(6)

VCC = Max. VIN = VCC — 0.5 0.8 mA
Outputs Open VIN = GND
fi =10MHz
50% Duty Cycle VIN = VCC –0.6V — 0.5 0.8
xOE = GND

xLE

= VCC

IN = GND

V

One Bit Toggling
VCC = Max.

Outputs Open

V

IN = VCC

V

IN = GND

— 2.0 3.0

fi = 2.5MHz
50% Duty Cycle
xOE = GND
xLE = V

CC

V

IN = VCC –0.6V

V

IN = GND

— 2.0 3.3

Sixteen Bits Toggling

NOTES:

1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Per TTL driven input; all other inputs at V

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the I

C = IQUIESCENT + IINPUTS + IDYNAMIC

6. I
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
I

CC = Quiescent Current (ICCL, ICCH and ICCZ)

CC = Power Supply Current for a TTL High Input

∆I

H = Duty Cycle for TTL Inputs High

D

T = Number of TTL Inputs at DH

N
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

f

CP = Number of Clock Inputs at fCP

N
fi = Input Frequency

i = Number of Inputs at fi

N

CC = 3.3V, +25°C ambient.

CC or GND.

CC formula. These limits are guaranteed but not tested.

(2)

Max. Unit

MHz

(5)

(5)

2601 tbl 06

8.4 4

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

(4)

FCT163373 FCT163373A FCT163373C

Symbol Parameter Condition

tPLH
tPHL
tPLH
tPHL
tPZH

Propagation Delay
xDx to xOx

CL = 50pF

R

L = 500Ω

Propagation Delay
xLE to xOx
Output Enable Time 1.5 12.0 1.5 6.5 1.5 5.5 ns

(1)

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

1.5 8.0 1.5 5.2 1.5 4.2 ns

2.0 13.0 2.0 8.5 2.0 5.5 ns

tPZL
tPHZ

Output Disable Time 1.5 7.5 1.5 5.5 1.5 5.0 ns

tPLZ
tSU Set-up Time HIGH

2.0 — 2.0 — 2.0 — ns

or LOW, xDx to xLE

tH Hold Time HIGH

1.5 — 1.5 — 1.5 — ns

or LOW, xDx to xLE

tW xLE Pulse Width

6.0 — 5.0 — 5.0 — ns

HIGH

tSK(o) Output Skew

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

4. Propagation Delays and Enable/Disable times are with V
and Enable/Disable times should be degraded by 20%.

(3)

— 0.5 — 0.5 — 0.5 ns

CC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays

Max. Unit

2601 tbl 07

8.4 5

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS

V

CC

V

OUT

50pF

C

L

Pulse

Generator

V

IN

D.U.T.

R

T

500

500

←

Open

GND

Ω

Ω

2601 drw 05

SWITCH POSITION

6V

DEFINITIONS:

L= Load capacitance: includes jig and probe capacitance.

C

T = Termination resistance: should be equal to ZOUT of the Pulse

R

Generator.

Test Switch

Open Drain
Disable Low
Enable Low

Disable High

Enable High

All Other tests Open

SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

PRESET

CLEAR

CLOCK ENABLE

ETC.

t

t

REM

H

t

H

t

SU

t

SU

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

3V

1.5V
0V

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

6V

GND

2601 lnk 08

1.5V

t

W

1.5V

2601 drw 07

SAME PHASE

INPUT TRANSITION

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

t

PLH

t

PLH

t

t

PHL

PHL

2601 drw 06

3V

1.5V
0V

OH

V

1.5V

V

OL

3V

1.5V
0V

2601 drw 08

ENABLE AND DISABLE TIMESPROPAGATION DELAY

ENABLE DISABLE

3V

CONTROL

INPUT

t

PHZ

PLZ

t

0.3V

0.3V

F ≤ 2.5ns; tR ≤ 2.5ns.

t

PZL

OUTPUT

NORMALLY

OUTPUT

NORMALLY

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable­HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t

CC is below 3V, input voltage swings should be adjusted not to exceed

3. If V

CC.

V

LOW

HIGH

SWITCH
6V

t

PZH

SWITCH
GND

3V

1.5V

1.5V
0V

1.5V
0V

3V

V

OL

V

OH

0V

2601 drw 09

8.4 6

IDT74FCT163373/A/C

3.3V 16-BIT TRANSPARENT LATCH COMMERCIAL TEMPERATURE RANGES

ORDERING INFORMATION

IDT XX

Temp. Range

FCT

XXXX

Device Type

X

Package

PV
PA
PF

163373

Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)

Non-Inverting 16-Bit Transparent Latch

163373A
163373C

74 –40°C to +85°C

2601 drw 10

8.4 7