– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
• Features for FCT16245T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162245T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The 16-bit transceivers are built using advanced dual metal
CMOS technology. These high-speed, low-power transceivers are ideal for synchronous communication between two
busses (A and B). The Direction and Output Enable controls
operate these devices as either two independent 8-bit transceivers or one 16-bit transceiver. The direction control pin
(xDIR) controls the direction of data flow. The output enable
pin (xOE) overrides the direction control and disables both
ports. All inputs are designed with hysteresis for improved
noise margin.
The FCT16245T are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live
insertion" of boards when used as backplane drivers.
The FCT162245T have balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot, and controlled output fall times– reducing the
need for external series terminating resistors. The
FCT162245T are plug-in replacements for the FCT16245T
and ABT16245 for on-board interface applications.
The FCT166245T are suited for very low noise, point-topoint driving where there is a single receiver, or a light lumped
1DIR
1A1
A2
1
A3
1
1
A4
A5
1
A6
1
1
A7
1
A8
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1OE
1
B1
B2
1
B3
1
1
B4
B5
1
1
B6
1
B7
1
B8
2545 drw 01
2
DIR
2A1
A
2
2
A
2
A
2
A
A
2
2
A
A
2
2
OE
2
B
1
2
2
B
2
3
2
B
3
4
B
4
2
5
2
B
5
6
2
B
6
7
B
7
2
8
B
8
2
2545 drw 02
MILITARY AND COMMERCIAL TEMPERATURE RANGESAUGUST 1996
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
FEATURES: (Cont'd.)
• Features for FCT166245T/AT/CT:
– Light Drive A Port:±8mA (commercial),
±6mA (military)
– High Drive B Port:+64mA, –32mA (commercial),
+48mA, –24mA (military)
– Minimal system switching noise
– Typical VOLP (Output Ground Bounce) < 0.25V at
VCC = 5V,TA = 25°C (A Port Switching)
• Features for FCT162H245T/AT/CT/ET:
– Bus Hold retains last active bus state during 3-state
– Eliminates the need for external pull up resistors
PIN CONFIGURATIONS
1
DIR
1B1
1B2
GND
1B3
1
B
V
CC
1
B
1
B
GND
4
5
6
1
2
3
4
5
6
7
8
9
10
48
47
46
45
44
43
42
41
40
39
1
OE
1A1
1
A
2
GND
1A3
1
A
4
V
CC
1
A
5
1
A
6
GND
1DIR
1B1
1B2
GND
1B3
B4
1
VCC
B5
1
1
B6
GND
DESCRIPTION: (Cont'd.)
load (<100pF). The buffers are designed to limit the output
current to levels which will avoid noise and ringing on the
signal lines without using external series terminating resistors. These parts have a ±8mA driver on the "A" Port and a
+64/–32mA driver on the "B" Port, making them ideal for
interfacing noisy system busses to noise sensitive interfaces.
The FCT162H245T have "Bus Hold" which retains the
input's last state whenever the input goes to high impedance.
This prevents "floating" inputs and eliminates the need for
pull-up/down resistors.
1
2
3
4
5
6
7
8
9
10
48
47
46
45
44
43
42
41
40
39
1OE
1A1
1
A2
GND
1A3
1
A4
VCC
1
A5
1
A6
GND
1
B
1
B
2
B
2B2
GND
2
B
B
2
V
CC
2
B
B
2
GND
2
B
2
B
2
DIR
1
7
8
11
12
SO48-1
38
37
1
A
7
1
A
8
SO48-2
1
3
4
5
6
7
8
13
14
15
16
17
18
19
20
21
22
23
24
SO48-3
36
35
34
33
32
31
30
29
28
27
26
25
2
A
1
2
A
2
GND
2
A
3
A
4
2
V
CC
2
A
5
A
6
2
GND
2
A
7
2
A
8
2
OE
2545 drw 03
B7
1
B8
2
B1
2B2
GND
B3
2
B4
2
CC
V
B5
2
2
B6
GND
B7
2
2
B8
DIR
2
SSOP/
TSSOP/TVSOP
TOP VIEW
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CERPACK
TOP VIEW
E48-1
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2545 drw 04
1
A7
1
A8
2
A1
2
A2
GND
A3
2
A4
2
VCC
2
A5
2
A6
GND
A7
2
2
A8
2OE
5.32
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin NamesDescription
x
OE
xDIRDirection Control Input
xAxSide A Inputs or 3-State Outputs
xBxSide B Inputs or 3-State Outputs
NOTES:
1. On FCT162H245T these pins have “Bus Hold”. All other pins are standard
inputs, outputs or I/Os.
2. On FCT166245T this is the ±8mA Port.
3. On FCT166245T this is the +64/–32mA Port.
ABSOLUTE MAXIMUM RATINGS
SymbolDescriptionMax.Unit
(2)
VTERM
(3)
VTERM
TSTGStorage Temperature–65 to +150°C
IOUTDC Output Current–60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT and FCT166XXXT (A-Port)
Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT and FCT166XXXT (A-Port).
Output Enable Input (Active LOW)
Terminal Voltage with Respect to
GND
Terminal Voltage with Respect to
GND
(1,2)
(1,3)
2545 tbl 01
(1)
–0.5 to +7.0V
–0.5 to
CC +0.5
V
2545 lnk 03
V
FUNCTION TABLE
(1)
Inputs
x
OE
OE
xDIROutputs
LLBus B Data to Bus A
LHBus A Data to Bus B
HXHigh Z State
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
CAPACITANCE (TA = +25°C, f = 1.0MHz)
SymbolParameter
CINInput
Capacitance
CI/OI/O
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
ConditionsTyp.Max. Unit
VIN = 0V3.56.0pF
VOUT = 0V3.58.0pF
2545 tbl 02
2545 lnk 04
5.33
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (STANDARD PARTS)
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
SymbolParameterTest Conditions
VIHInput HIGH LevelGuaranteed Logic HIGH Level2.0——V
VILInput LOW LevelGuaranteed Logic LOW Level——0.8V
II HInput HIGH Current (Input pins)
A =–40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Input HIGH Current (I/O pins)
Input LOW Current (I/O pins)
(5)
(1)
(5)
VCC = Max.VI = VCC——±1µA
(5)
(5)
VI = GND——±1
(5)
Min. Typ.
——±1
——±1
VO = 0.5V——±1
(3)
–80–140–225mA
(2)
Max.Unit
Quiescent Power Supply CurrentVCC = Max., VIN = GND or VCC—5500µA
2545 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16245T AND FCT166245T (B-PORT)
SymbolParameterTest Conditions
IOOutput Drive CurrentVCC = Max., VO = 2.5V
(3)
(1)
Min. Typ.
–50—–180mA
VOHOutput HIGH VoltageVCC = Min.IOH = –3mA 2.53.5—V
VIN = VIH or VILIOH = –12mA MIL.
VOLOutput LOW VoltageVCC = Min.
IN = VIH or VIL
V
IOFFInput/Output Power Off Leakage
(5)
VCC = 0V, VIN or VO ≤ 4.5V——±1µA
OH = –15mA COM'L.
I
IOH = –24mA MIL.
OH = –32mA COM'L.
I
IOL = 48mA MIL.
OL = 64mA COM'L.
I
2.43.5—V
2.03.0—V
(4)
—0.20.55V
(2)
Max.Unit
2545 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT162245T
SymbolParameterTest Conditions
I
ODL
I
ODH
V
V
OH
OL
Output LOW CurrentVCC = 5V, V
Output HIGH CurrentVCC = 5V, V
Output HIGH VoltageVCC = Min.
IN
= V
IH
V
or V
Output LOW VoltageVCC = Min.
IN
= V
IH
V
or V
IN
= V
IH or VIL, VOUT
IN
= V
IH
IL
IL
or V
IL,
V
OUT
IOH = –16mA MIL.
OH
= –24mA COM'L.
I
IOL = 16mA MIL.
OL
= 24mA COM'L.
I
(1)
= 1.5V
= 1.5V
(3)
(3)
Min. Typ.
60115200mA
–60–115–200mA
2.43.3—V
—0.30.55V
(2)
Max. Unit
2545 lnk 07
OUTPUT DRIVE CHARACTERISTICS FOR FCT166245T (A-PORT ONLY)
SymbolParameterTest Conditions
I
ODL
I
ODH
V
OH
V
OL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at T
Output LOW CurrentVCC = 5V, V
Output HIGH CurrentVCC = 5V, V
Output HIGH VoltageVCC = Min.
IN
= V
IH
V
or V
Output LOW VoltageVCC = Min.
IN
= V
IH
V
or V
ADVANCE INFORMATION
A = –55°C.
IN
= V
IH or VIL, VOUT
IN
= V
IH
IL
IL
or V
IL,VOUT
(1)
(3)
= 1.5V
(3)
= 1.5V
IOH = –6mA MIL.
OH
= –8mA COM'L.
I
IOL = 6mA MIL.
OL
= 8mA COM'L.
I
Min. Typ.
164896mA
–16–48–96mA
2.43.3—V
—0.30.55V
(2)
Max. Unit
2545 lnk 08
5.34
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE (BUS HOLD)
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
SymbolParameterTest Conditions
V
IH
V
IL
I
I H
I
I L
I
BHH
I
BHL
I
OZH
I
OZL
V
IK
I
OS
V
H
I
CCL
I
CCH
I
CCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. The test limit for this parameter is ± 5µA at T
6. Does not include Bus Hold I/O pins.
A =–40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
(1)
Min. Typ.
Input HIGH LevelGuaranteed Logic HIGH Level2.0—
(2)
Max.Unit
—
Input LOW LevelGuaranteed Logic LOW Level——0.8V
Input Standard Input
HIGH Standard I/O
(4)
Current
Bus Hold Input——
Bus Hold I/O——
InputStandard Input
LOWStandard I/O
(4)
Current
Bus Hold Input——
Bus Hold I/O——
(5)
(5)
(5)
(5)
——
VCC = Max.VI = V
VI = GND——
CC
——
——
±
1
±
1
±
100
±
100
±
1
±
1
±
100
±
100
Bus HoldBus Hold InputVCC = Min.VI = 2.0V–50——
Sustain
(4)
Current
High Impedance Output CurrentVCC = Max.VO = 2.7V—
(3-State Output pins)
Clamp Diode VoltageVCC = Min., I
(5,6)
IN
= –18mA—
Short Circuit CurrentVCC = Max., VO = GND
Input Hysteresis
—
Quiescent Power Supply CurrentVCC = Max., VIN = GND or V
A = –55°C.
I
= 0.8V+50——
V
—
VO = 0.5V—
(3)
–80–140–225mA
–
—
0.7
—100
CC
—5500
±
1
±
1
–
1.2V
—
2545 lnk 09
V
µ
A
µ
A
µ
A
mV
µ
A
5.35
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
SymbolParameterTest Conditions
CCQuiescent Power Supply CurrentVcc = Max.—0.51.5mA
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Per TTL driven input (V
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C = IQUIESCENT + IINPUTS + IDYNAMIC
6. I
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
CC = Quiescent Current (ICCL, ICCHand ICCZ)
I
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
∆I
H = Duty Cycle for TTL Inputs High
D
T = Number of TTL Inputs at DH
N
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
CP = Number of Clock Inputs at fCP
N
fi = Input Frequency
i = Number of Inputs at fi
N
CC = 5.0V, +25°C ambient.
IN = 3.4V). All other inputs at VCC or GND.
CC formula. These limits are guaranteed but not tested.
(2)
Max.Unit
(5)
(5)
2545 tbl 10
5.36
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16245T/162245T
Com'l.Mil.Com'l.Mil.
SymbolParameterCondition
tPLH
Propagation Delay
tPHL
A to B, B to A
tPZH
Output Enable Time
tPZL
xOE to A or B
tPHZ
Output Disable Time
tPLZ
xOE to A or B
tPZH
Output Enable Time
tPZL
xDIR to A or B
tPHZ
Output Disable Time
tPLZ
xDIR to A or B
tSK(o) Output Skew
SymbolParameterCondition
tPLH
Propagation Delay
A to B, B to A
tPHL
tPZH
Output Enable Time
xOE to A or B
tPZL
tPHZ
Output Disable Time
xOE to A or B
tPLZ
tPZH
Output Enable Time
xDIR to A or B
tPZL
tPHZ
Output Disable Time
xDIR to A or B
tPLZ
tSK(o) Output Skew
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
5. Including parts with Bus Hold.
(4)
(4)
(3)
(4)
(4)
(3)
CL = 50pF
R
CL = 50pF
R
(1)
L = 500Ω
(1)
L = 500Ω
(2)
Min.
Max.Min.
1.57.01.57.51.54.61.54.9ns
1.59.51.510.01.56.21.56.5ns
1.57.51.510.01.55.01.56.0ns
1.59.51.510.01.56.21.56.5ns
1.57.51.510.01.55.01.56.0ns
—0.5—0.5—0.5—0.5ns
FCT16245CT/162245CT
Com'l.Mil.Com'l.Mil.
(2)
Min.
Max.Min.
1.54.11.54.51.53.2——ns
1.55.81.56.21.54.4——ns
1.54.81.55.21.54.0——ns
1.55.81.56.21.54.8——ns
1.54.81.55.21.54.0——ns
—0.5—0.5—0.5——ns
(5)
(2)
(2)
Max.Min.
(5)
Max.Min.
FCT16245AT/162245AT
(2)
Max.Min.
FCT16245ET/162245ET
(2)
Max.Min.
(2)
(2)
(5)
Max.Unit
2545 tbl 11
(5)
Max.Unit
2545 tbl 12
5.37
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT166245TFCT166245ATFCT166245CT
Com'l.Mil.Com'l.Mil.Com'l.Mil.
(1)
SymbolParameterCondition
tPLH
Propagation Delay
A to B
tPHL
tPLH
Propagation Delay
B to A
tPHL
tPZH
Output Enable Time
xOE to B
tPZL
tPZH
Output Enable Time
xOE to A
tPZL
tPHZ
Output Disable Time
xOE to B
tPLZ
tPHZ
Output Disable Time
xOE to A
tPLZ
tPZH
Output Enable Time
xDIR to B
tPZL
tPZH
Output Enable Time
xDIR to A
tPZL
tPHZ
Output Disable Time
xDIR to B
tPLZ
tPHZ
Output Disable Time
xDIR to A
tPLZ
tSK(o) Output Skew
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This parameter is guaranteed but not tested.
(4)
(4)
(4)
(4)
(3)
ADVANCE INFORMATION
CL = 50pF
R
L = 500Ω
(2)
Min.
Max. Min.
1.54.61.54.91.54.11.54.5ns
1.57.01.57.51.54.61.54.9ns
1.56.21.56.51.55.81.56.2ns
1.59.51.510.0 1.56.21.56.5ns
1.55.01.56.01.54.81.55.2ns
1.57.51.510.0 1.55.01.56.0ns
1.56.21.56.51.55.81.56.2ns
1.59.51.510.0 1.56.21.56.5ns
1.55.01.56.01.54.81.55.2ns
1.57.51.510.0 1.55.01.56.0ns
—0.5—0.5—0.5—0.5ns
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
2545 tbl 13
5.38
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
7.0V
SWITCH POSITION
TestSwitch
Open Drain
Disable Low
Enable Low
All Other Tests
Generator.
Pulse
Generator
500
Ω
V
V
IN
OUT
D.U.T.
50pF
500
T
R
C
L
Ω
2545 drw 05
DEFINITIONS:
L= Load capacitance: includes jig and probe capacitance.
C
T = Termination resistance: should be equal to ZOUT of the Pulse
R
SET-UP, HOLD AND RELEASE TIMESPULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
t
REM
t
H
H
t
SU
t
SU
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2545 drw 06
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
Closed
Open
2545 lnk 14
1.5V
t
W
1.5V
2545 drw 07
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
OPPOSITE PHASE
INPUT TRANSITION
PLH
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
2545 drw 08
ENABLE AND DISABLE TIMES
ENABLEDISABLE
3V
CONTROL
INPUT
t
PHZ
PLZ
t
F≤ 2.5ns; tR≤ 2.5ns
t
PZL
OUTPUT
NORMALLY
OUTPUT
NORMALLY
HIGH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
LOW
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
1.5V
0V
0.3V
0.3V
1.5V
0V
3.5V
V
V
0V
OL
OH
2545 drw 09
5.39
IDT54/74FCT16245T/AT/CT/ET, 162245T/AT/CT/ET, IDT54/74FCT166245T/AT/CT, IDT54/74FCT162H245T/AT/CT/ET
FAST CMOS 16-BIT BIDIRECTIONAL TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
X
IDT XX
Temp. Range
FCT
DriveXBus Hold
XXXX
Device TypeXPackage
X
Process
Blank
B
PV
PA
PF
E
245T
245AT
245CT
245ET
Blank
H
16
162
166
54
74
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
CERPACK (E48-1)
Non-Inverting 16-Bit Bidirectional Transceiver
Standard
Bus Hold
16-Bit High Drive
16-Bit Balanced Drive
16-Bit Light Drive
–55°C to +125°C
–40°C to +85°C
2545 drw 10
5.310
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