Datasheet IDT74FCT16827CTE, IDT74FCT16827BTPVB, IDT74FCT16827BTPV, IDT74FCT16827BTPFB, IDT74FCT16827BTPF Datasheet (Integrated Device Technology)
...
Integrated Device Technology, Inc.
FAST CMOS 20-BIT
BUFFERS
IDT54/74FCT16827AT/BT/CT/ET
IDT54/74FCT162827AT/BT/CT/ET
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
–V
CC = 5V ±10%
• Features for FCT16827AT/BT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162827AT/BT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
DESCRIPTION:
The FCT16827AT/BT/CT/ET and FCT162827AT/BT/CT/
ET 20-bit buffers are built using advanced dual metal CMOS
technology. These 20-bit bus drivers provide high-performance bus interface buffering for wide data/address paths or
busses carrying parity. Two pair of NAND-ed output enable
controls offer maximum control flexibility and are organized to
operate the device as two 10-bit buffers or one 20-bit buffer.
Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise margin.
The FCT16827AT/BT/CT/ET are ideally suited for driving
high capacitance loads and low impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162827AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162827AT/BT/CT/ET are plug-in replacements for the
FCT16827AT/BT/CT/ET and ABT16827 for on-board interface applications.
FUNCTIONAL BLOCK DIAGRAM
1OE1
1OE2
1A1
TO 9 OTHER CHANNELS
1Y1
2773 drw 01
2OE1
2OE2
2A1
TO 9 OTHER CHANNELS
2Y1
2773 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996
1996 Integrated Device Technology, Inc. 5.17 DSC-2773/7
1
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
OE
1
1Y1
1Y2
GND
1Y3
1
Y
V
CC
1
Y
1
Y
1
Y
GND
1
Y
Y
1
1Y10
2Y1
2
Y
2
Y
GND
2Y4
Y
2
Y
2
V
CC
2
Y
2
Y
GND
Y
2
2
Y
2OE1
OE
2
1
1
2
3
4
5
4
6
7
5
6
7
8
9
10
11
8
9
2
3
12
13
14
15
16
17
SO56-1
SO56-2
SO56-3
18
19
5
6
20
21
22
7
8
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
3225
9
10
26
27
28
31
30
29
1
1
A
1
A
GND
1A3
1
A
V
CC
1
A
1
A
1
A
GND
1
A
A
1
1
A
2A1
2
A
A
2
GND
A
2
A
2
A
2
V
CC
2
A
2
A
GND
2A9
A
2
2
OE
1
OE1
1
2
1Y1
1
Y2
GND
1Y3
4
1
Y4
VCC
5
6
7
1
Y5
1
Y6
Y7
1
GND
8
9
10
2
3
1
Y8
1
Y9
1Y10
2
Y1
2
Y2
Y3
2
GND
4
5
6
7
8
2
2
2
V
2Y7
2
Y4
Y5
Y6
CC
Y8
GND
2Y9
10
2
2
Y10
2OE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
E56-1
48
43
56
55
54
53
52
51
50
49
47
46
45
44
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OE2
A1
1
1
A2
GND
1A3
1
A4
VCC
1
A5
1
A6
A7
1
GND
1
A8
1
A9
1
A10
A1
2
2
A2
2
A3
GND
2A4
A5
2
2
A6
VCC
2A7
A8
2
GND
2
A9
2
A10
2
OE2
SSOP/
TSSOP/TVSOP
TOP VIEW
2773 drw 03
CERPACK
TOP VIEW
2773 drw 04
5.17 2
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
xOEx Output Enable Inputs (Active LOW)
xAx Data Inputs
xYx 3-State Outputs
2773 tbl 01
ABSOLUTE MAXIMUM RATINGS
Symbol Description Max. Unit
(2)
VTERM
VTERM
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
Terminal Voltage with Respect to
GND
(3)
Terminal Voltage with Respect to
GND
(1)
–0.5 to +7.0 V
–0.5 to
CC +0.5
V
2773 lnk 03
V
FUNCTION TABLE
(1)
Inputs Outputs
x
OE
OE
1 x
OE
2 xAxxYx
OE
LLL L
LLH H
HXX Z
XHX Z
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
NOTE:
1. This parameter is measured at characterization but not tested.
(1)
Conditions Typ. Max. Unit
VIN = 0V 3.5 6.0
V
OUT
= 0V 3.5 8.0
2773 tbl 02
pF
pF
2773 lnk 04
5.17 3
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
Symbol Parameter Test Conditions
VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
II H Input HIGH Current (Input pins)
II L Input LOW Current (Input pins)
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ±1 µA
IOZL (3-State Output pins)
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND
VH Input Hysteresis — — 100 — mV
ICCL
ICCH
ICCZ
A = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC
(1)
(5)
VCC = Max. VI = VCC — — ±1 µA
Input HIGH Current (I/O pins)
Input LOW Current (I/O pins)
(5)
(5)
(5)
VI = GND — — ±1
(5)
VO = 0.5V — — ±1
(3)
= 5.0V ± 10%
Min. Typ.
(2)
Max. Unit
— — ±1
— — ±1
–80 –140 –225 mA
Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 5 500 µA
2773 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16827T
Symbol Parameter Test Conditions
I
O
V
OH
Output Drive Current VCC = Max., VO = 2.5V
Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 3.5 — V
VIN = V
IH
or V
IL
(3)
IOH = –12mA MIL.
I
OH
= –15mA COM'L.
IOH = –24mA MIL.
I
OH
= –32mA COM'L.
V
I
OFF
OL
Output LOW Voltage VCC = Min.
V
IN
= V
IH
VCC = 0V, V
Input/Output Power Off Leakage
(5)
or V
IN
I
OL
= 48mA MIL.
IL
or V
I
OL
= 64mA COM'L.
O
≤ 4.5V — —
(1)
Min. Typ.
–50
2.4 3.5 — V
2.0 3.0 — V
(4)
— 0.2 0.55 V
(2)
—–
OUTPUT DRIVE CHARACTERISTICS FOR FCT162827T
Symbol Parameter Test Conditions
I
ODL
I
ODH
V
OH
V
OL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at T
Output LOW Current VCC = 5V, V
Output HIGH Current VCC = 5V, V
Output HIGH Voltage VCC = Min.
IN
= V
IH
V
or V
Output LOW Voltage VCC = Min.
IN
= V
IH
V
A = –55°C.
or V
IN
= V
IH or VIL, VOUT
IN
= V
IH
IL
IL
or V
IL,
(1)
(3)
= 1.5V
= 1.5V
(3)
V
OUT
IOH = –16mA MIL.
OH
= –24mA COM'L.
I
IOL = 16mA MIL.
OL
= 24mA COM'L.
I
Min. Typ.
60 115 200 mA
–60 –115 –200 mA
2.4 3.3 — V
— 0.3 0.55 V
(2)
Max. Unit
180 mA
±
1
µ
A
2773 lnk 06
Max. Unit
2773 lnk 07
5.17 4
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
IN = VCC
V
IN = GND
(1)
Min. Typ.
— 0.5 1.5 mA
— 60 100 µA/
Symbol Parameter Test Conditions
∆ICC Quiescent Power Supply Current
TTL Inputs HIGH
ICCD Dynamic Power Supply Current
(4)
VCC = Max.
V
IN = 3.4V
VCC = Max.
(3)
Outputs Open
x
OE
1 = xOE2 = GND
One Input Toggling
50% Duty Cycle
IC Total Power Supply Current
(6)
VCC = Max.
Outputs Open
VIN = VCC
V
IN = GND
— 0.6 1.5 mA
fi = 10MHz
50% Duty Cycle
x
OE
1 = xOE2 = GND
IN = 3.4V
V
V
IN = GND
— 0.9 2.3
One Bit Toggling
VCC = Max.
Outputs Open
VIN = VCC
V
IN = GND
— 3.0 5.5
fi = 2.5MHz
50% Duty Cycle
x
OE
1 = xOE2 = GND
IN = 3.4V
V
V
IN = GND
— 8.0 20.5
Twenty Bits Toggling
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Per TTL driven input (V
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C = IQUIESCENT + IINPUTS + IDYNAMIC
6. I
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
I
CC = Quiescent Current (ICCL, ICCH and ICCZ)
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
∆I
H = Duty Cycle for TTL Inputs High
D
T = Number of TTL Inputs at DH
N
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
CP = Number of Clock Inputs at fCP
N
fi = Input Frequency
N
i = Number of Inputs at fi
CC = 5.0V, +25°C ambient.
IN = 3.4V). All other inputs at VCC or GND.
CC formula. These limits are guaranteed but not tested.
(2)
Max. Unit
MHz
(5)
(5)
2773 tbl 08
5.17 5
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16827AT/162827AT FCT16827BT/162827BT
Com'l. Mil. Com'l. Mil.
Symbol Parameter Condition
tPLH
Propagation Delay
tPHL
xAx to xYx
CL = 50pF
L = 500Ω
R
CL = 300pF
(1)
(4)
RL = 500Ω
tPZH
Output Enable Time
tPZL
xOEx to xYx
CL = 50pF
L = 500Ω
R
CL = 300pF
(4)
RL = 500Ω
tPHZ
Output Disable Time
tPLZ
xOEx to xYx
CL = 5pF
RL = 500Ω
(4)
CL = 50pF
L = 500Ω
tSK(o) Output Skew
Symbol Parameter Condition
t
PLH
Propagation Delay
xAx to xYx
t
PHL
t
PZH
Output Enable Time
xOEx to xYx
t
PZL
t
PHZ
Output Disable Time
xOEx to xYx
t
PLZ
(3)
R
CL = 50pF
R
L
= 500
Ω
CL = 300pF
RL = 500
Ω
CL = 50pF
R
L
= 500
Ω
CL = 300pF
RL = 500
CL = 5pF
RL = 500
Ω
(4)
Ω
(1)
(4)
(4)
CL = 50pF
R
L
= 500
tSK(o) Output Skew
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This condition is guaranteed but not tested.
(3)
Ω
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
1.5 8.0 1.5 9.0 1.5 5.0 1.5 6.5 ns
1.5 15.0 1.5 17.0 1.5 13.0 1.5 14.0
1.5 12.0 1.5 13.0 1.5 8.0 1.5 9.0 ns
1.5 23.0 1.5 25.0 1.5 15.0 1.5 16.0
1.5 9.0 1.5 9.0 1.5 6.0 1.5 7.0 ns
1.5 10.0 1.5 10.0 1.5 7.0 1.5 8.0
— 0.5 — 0.5 — 0.5 — 0.5 ns
2773 tbl 09
FCT16827CT/162827CT FCT16827ET/162827ET
Com'l. Mil. Com'l. Mil.
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
1.5 4.4 1.5 5.0 1.5 3.2 — — ns
1.5 10.0 1.5 11.0 1.5 7.0 — —
1.5 7.0 1.5 8.0 1.5 4.8 — — ns
1.5 14.0 1.5 15.0 1.5 9.0 — —
1.5 5.7 1.5 6.7 1.5 4.0 — — ns
1.5 6.0 1.5 7.0 1.5 4.0 — —
— 0.5 — 0.5 — 0.5 — — ns
2773 tbl 10
5.17 6
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test Switch
V
CC
7.0V
Open Drain
Disable Low
500
Pulse
Generator
Ω
V
V
IN
D.U.T.
T
R
OUT
50pF
C
L
500
Ω
2773 drw 05
DEFINITIONS:
L= Load capacitance: includes jig and probe capacitance.
C
T = Termination resistance: should be equal to ZOUT of the Pulse
R
Enable Low
All Other Tests
Generator.
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
t
REM
H
t
H
t
SU
t
SU
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
2773 drw 06
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
Closed
Open
2773 lnk 11
1.5V
t
W
1.5V
2773 drw 07
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
t
PLH
t
PLH
t
t
PHL
PHL
3V
1.5V
0V
OH
V
1.5V
V
OL
3V
1.5V
0V
2773 drw 08
ENABLE AND DISABLE TIMESPROPAGATION DELAY
ENABLE DISABLE
3V
CONTROL
INPUT
t
PHZ
t
PLZ
t
PZL
OUTPUT
NORMALLY
OUTPUT
NORMALLY
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t
LOW
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
1.5V
0V
1.5V
0V
3.5V
0.3V
V
OL
V
0.3V
F ≤ 2.5ns; tR ≤ 2.5ns
OH
0V
2773 drw 09
5.17 7
IDT54/74FCT16827AT/BT/CT/ET, 162827AT/BT/CT/ET
FAST CMOS 20-BIT BUFFERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX
Temp. Range
FCT
XXXX
Device Type
X
Package
X
Process
Blank
B
PV
PA
PF
E
16827AT
16827BT
16827CT
16827ET
162827AT
162827BT
162827CT
162827ET
54
74
Commercial
MIL-STD-883, Class B
Shrink Small Outline Package (SO56-1)
Thin Shrink Small Outline Package (SO56-2)
Thin Very Small Outline Package (SO56-3)
CERPACK (E56-1)
Non-Inverting 20-Bit Buffers
–55°C to +125°C
–40°C to +85°C
2773 drw 10
5.17 8
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