Datasheet IDT54FCT162240TPFB, IDT54FCT162240TPV, IDT54FCT162240TPVB, IDT54FCT162240ATE, IDT54FCT162240ATEB Datasheet (Integrated Device Technology Inc)

Integrated Device Technology, Inc.

FAST CMOS 16-BIT
BUFFER/LINE DRIVER

IDT54/74FCT16240T/AT/CT/ET

IDT54/74FCT162240T/AT/CT/ET

FEATURES:

• Common features:

– 0.5 MICRON CMOS Technology

– High-speed, low-power CMOS replacement for

ABT functions

– Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage ≤1µA (max.)

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– Packages include 25 mil pitch SSOP, 19.6 mil pitch

TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
–VCC = 5V ±10%

• Features for FCT16240T/AT/CT/ET:

– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at

VCC = 5V, TA = 25°C

• Features for FCT162240T/AT/CT/ET:

– Balanced Output Drivers: ±24mA (commercial),

±16mA (military)

– Reduced system switching noise
– Typical V

VCC = 5V,TA = 25°C

OLP (Output Ground Bounce) < 0.6V at

DESCRIPTION:

The FCT16240T/AT/CT/ET and FCT162240T/AT/CT/ET
16-bit buffer/line drivers are built using advanced dual metal
CMOS technology. These high-speed, low-power devices
offer bus/backplane interface capability with improved packing
density. The flow-through organization of signal pins simplifies
layout. The three-state controls are designed to operate these
devices in a Quad-Nibble, Dual-Byte or single 16-bit word
mode. All inputs are designed with hysteresis for improved
noise margin.

The FCT16240T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.

The FCT162240T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times– reduc­ing the need for external series terminating resistors. The
FCT162240T/AT/CT/ET are plug-in replacements for
FCT16240T/AT/CT/ET and 54/74ABT16240 for on-board in­terface applications.

FUNCTIONAL BLOCK DIAGRAM

1OE

1A1

1A2

1

A3

1

A4

OE

2

2A1
2A2

2

A3

2

A4

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

Y1

1

Y2

1

Y3

1

Y4

1

Y1

2

Y2

2

Y3

2

Y4

2

2541 drw 01

3OE

3A1

3A2

A3

3

A4

3

4

OE

4A1
4A2

A3

4

A4

4

3

Y1

3

Y2

3

Y3

Y4

3

Y1

4

Y2

4

Y3

4

Y4

4

2541 drw 02

MILITARY AND COMMERCIAL TEMPERATURE RANGES AUGUST 1996

1996 Integrated Device Technology, Inc. 5.1 DSC–4226/9

1

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS

1

OE

1Y1

1Y2

GND

1Y3

1Y4

V

CC

2Y1

2Y2

GND

2Y3

2Y4

Y

3

3Y2

GND

3Y3

3Y4

V

CC

1
2
3
4
5
6
7
8
9
10
11

SO48-1

12

SO48-2
SO48-3

1

13
14
15
16
17
18

48
47
46
45
44
43
42
41

40

39
38
37
36

35

34
33
32
31

2

OE

1A1

1

A

2

GND

1A3

1

A

4

V

CC

2

A

1

2

A

2

GND

A

3

2

2

A

4

3

A

1

3

A

2

GND

3

A

3

3

A

4

V

CC

1

OE

1Y1

1Y2

GND

1Y3

1Y4

V

CC

2Y1

2Y2

GND

2Y3

2Y4

Y

3

3Y2

GND

3Y3

3Y4

CC

V

1

1
2

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

E48-1

48
47

46
45
44
43
42
41

40

39
38
37
36

35

34
33
32
31

2

OE

1A1

A

2

1

GND

1A3

1

A

4

V

CC

2

A

1

A

2

2

GND

2

A

3

2

A

4

A

1

3

3

A

2

GND

3

A

3

A

4

3

V

CC

4Y1

4Y2

GND

4Y3

4Y4

4

OE

19
20
21
22
23
24

SSOP/

TSSOP/TVSOP

TOP VIEW

30
29
28
27
26
25

4

A

1

A

2

4

GND

4

A

3

4

A

4

3

OE

2541 drw 03

4Y1

4Y2

GND

4Y3

4Y4

4

OE

19
20
21
22
23
24

CERPACK
TOP VIEW

30
29
28
27
26
25

2541drw 04

A

1

4

A

2

4

GND

4

A

3

4

A

4

3

OE

5.1 2

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN DESCRIPTION

Pin Names Description

x

OE

xAx Data Inputs
xYx 3-State Outputs

ABSOLUTE MAXIMUM RATINGS

Symbol Description Max. Unit

(2)

VTERM

(3)

VTERM

TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.

2. All device terminals except FCT162XXXT Output and I/O terminals.

3. Output and I/O terminals for FCT162XXXT.

3–State Output Enable Inputs (Active LOW)

Terminal Voltage with Respect to
GND
Terminal Voltage with Respect to
GND

2541 tbl 01

(1)

–0.5 to +7.0 V

–0.5 to

CC +0.5

V

2541 lnk 03

V

FUNCTION TABLE

(1)

Inputs Outputs

x

OEOE xAx x

YYx

LLH
LHL
HXZ

NOTE:

1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance

CAPACITANCE (TA = +25°C, f = 1.0MHz)

Symbol Parameter

C

IN

Input
Capacitance

C

OUT

Output
Capacitance

NOTE:

1. This parameter is measured at characterization but not tested.

(1)

Conditions Typ. Max. Unit

VIN = 0V 3.5 6.0

V

OUT

= 0V 3.5 8.0

2541 tbl 02

pF

pF

2541 lnk 04

5.1 3

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 5.0V ± 10%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%

Symbol Parameter Test Conditions

(1)

Min. Typ.

VIH Input HIGH Level Guaranteed Logic HIGH Level 2.0 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
II H Input HIGH Current (Input pins)

Input HIGH Current (I/O pins)

II L Input LOW Current (Input pins)

Input LOW Current (I/O pins)

(5)

VCC = Max. VI = VCC — — ±1 µA

(5)

(5)

VI = GND — — ±1

(5)

— — ±1

— — ±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ±1 µA
IOZL (3-State Output pins)

(5)

VO = 0.5V — — ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND

(3)

–80 –140 –225 mA
VH Input Hysteresis — — 100 — mV
ICCL

Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 5 500 µA
ICCH
ICCZ

(2)

Max. Unit

2541 lnk 05

OUTPUT DRIVE CHARACTERISTICS FOR FCT16240T

Symbol Parameter Test Conditions

IO Output Drive Current VCC = Max., VO = 2.5V

(3)

(1)

Min. Typ.

–50 —–180 mA

VOH Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 3.5 — V

VIN = VIH or VIL IOH = –12mA MIL.

VOL Output LOW Voltage VCC = Min.

IN = VIH or VIL

V

IOFF Input/Output Power Off Leakage

(5)

VCC = 0V, VIN or VO ≤ 4.5V — — ±1 µA

OH = –15mA COM'L.

I
IOH = –24mA MIL.

OH = –32mA COM'L.

I
IOL = 48mA MIL.

OL = 64mA COM'L.

I

2.4 3.5 — V

2.0 3.0 — V

(4)

— 0.2 0.55 V

(2)

Max. Unit

2541 lnk 06

OUTPUT DRIVE CHARACTERISTICS FOR FCT162240T

Symbol Parameter Test Conditions

IODL Output LOW Current VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V
IODH Output HIGH Current VCC = 5V, VIN = VIH or V IL,
VOH Output HIGH Voltage VCC = Min.

V

IN = VIH or VIL

VOL Output LOW Voltage VCC = Min.

V

IN = VIH or VIL

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 5.0V, +25°C ambient.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. Duration of the condition can not exceed one second.

5. The test limit for this parameter is ± 5µA at T

A = –55°C.

(1)

(3)

VOUT = 1.5V

(3)

IOH = –16mA MIL.
I

OH = –24mA COM'L.

IOL = 16mA MIL.
I

OL = 24mA COM'L.

Min. Typ.

60 115 200 mA

–60 –115 –200 mA

2.4 3.3 — V

— 0.3 0.55 V

(2)

Max. Unit

2541 lnk 07

5.1 4

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

POWER SUPPLY CHARACTERISTICS

V

IN

= VCC

V

IN

= GND

(1)

Min. Typ.

— 0.5 1.5 mA
— 60 100

Symbol Parameter Test Conditions

∆I
I

CCD

CC

Quiescent Power Supply Current
TTL Inputs HIGH

Dynamic Power Supply

(4)

Current

VCC = Max.

= 3.4V

(3)

V

IN

VCC = Max.
Outputs Open
xOE = GND
One Input Toggling
50% Duty Cycle

I

C

Total Power Supply Current

(6)

VCC = Max.
Outputs Open

V

IN

V

IN

= VCC
= GND

— 0.6 1.5 mA

fi = 10MHz
50% Duty Cycle
xOE = GND

V

IN

V

IN

= 3.4V
= GND

— 0.9 2.3

One Bit Toggling
VCC = Max.

Outputs Open

V

IN

= VCC

V

IN

= GND

— 2.4 4.5

fi = 2.5MHz
50% Duty Cycle
xOE = GND

V

IN

V

IN

= 3.4V
= GND

— 6.4 16.5

Sixteen Bits Toggling

NOTES:

1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at V

3. Per TTL driven input (V

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the I

C = IQUIESCENT + IINPUTS + IDYNAMIC

6. I
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)

CC = Quiescent Current (ICCL, ICCH and ICCZ)

I

CC = Power Supply Current for a TTL High Input (VIN = 3.4V)

∆I

H = Duty Cycle for TTL Inputs High

D

T = Number of TTL Inputs at DH

N
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f

CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

CP = Number of Clock Inputs at fCP

N
fi = Input Frequency

i = Number of Inputs at fi

N

CC = 5.0V, +25°C ambient.

IN = 3.4V). All other inputs at VCC or GND.

CC formula. These limits are guaranteed but not tested.

(2)

Max. Unit

(5)

(5)

µ

A/

MHz

2541 tbl 08

5.1 5

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

FCT16240T/162240T FCT16240AT/162240AT

Com'l. Mil. Com'l. Mil.

Symbol Parameter Condition

tPLH

Propagation Delay

tPHL

xAx to xYx

tPZH

Output Enable Time 1.5 10.0 1.5 10.5 1.5 6.2 1.5 6.5 ns

CL = 50pF

R

(1)

L = 500Ω

tPZL
tPHZ

Output Disable Time 1.5 9.5 1.5 10.0 1.5 5.6 1.5 5.9 ns
tPLZ
tSK(o) Output Skew

Symbol Parameter Condition

tPLH

Propagation Delay
tPHL

xAx to xYx
tPZH

Output Enable Time 1.5 5.8 1.5 6.5 1.5 4.4 — — ns

(3)

(1)

CL = 50pF

L = 500Ω

R

tPZL
tPHZ

Output Disable Time 1.5 5.2 1.5 5.7 1.5 3.6 — — ns
tPLZ
tSK(o) Output Skew

NOTES: 2541 tbl 09

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

(3)

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

1.5 8.0 1.5 9.0 1.5 4.8 1.5 5.1 ns

— 0.5 — 0.5 — 0.5 — 0.5 ns

FCT16240CT/162240CT FCT16240ET/162240ET

Com'l. Mil. Com'l. Mil.

Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Min.

(2)

Max. Unit

1.5 4.3 1.5 4.7 1.5 3.2 — — ns

— 0.5 — 0.5 — 0.5 — — ns

5.1 6

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS

7.0V

SWITCH POSITION

Test Switch

TEST CIRCUITS FOR ALL OUTPUTS

V

CC

Open Drain

500

Pulse

Generator

Ω

V

V

IN

OUT

D.U.T.

50pF

T

R

C

500

Ω

L

2541 drw 05

DEFINITIONS:

C

L= Load capacitance: includes jig and probe capacitance.
T = Termination resistance: should be equal to ZOUT of the Pulse

R

Disable Low

Enable Low

All Other Tests

Generator.

SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH

DATA

INPUT

TIMING

INPUT

ASYNCHRONOUS CONTROL

PRESET

CLEAR

ETC.

SYNCHRONOUS CONTROL

PRESET

CLEAR

CLOCK ENABLE

ETC.

t

t

REM

H

t

H

t

SU

t

SU

3V

1.5V
0V

3V

1.5V

0V

3V

1.5V
0V

3V

1.5V
0V

2541 drw 06

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

Closed

Open

2541 lnk 10

1.5V

t

W

1.5V

2541 drw 07

SAME PHASE

INPUT TRANSITION

OUTPUT

OPPOSITE PHASE

INPUT TRANSITION

t

PLH

t

PLH

t

t

PHL

PHL

3V

1.5V
0V

OH

V

1.5V

V

OL

3V

1.5V
0V

2541 drw 08

ENABLE AND DISABLE TIMESPROPAGATION DELAY

ENABLE DISABLE

3V

CONTROL

INPUT

t

t

PLZ

PHZ

F ≤ 2.5ns; tR ≤ 2.5ns

t

PZL

OUTPUT

NORMALLY

OUTPUT

NORMALLY

HIGH

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; t

LOW

SWITCH
CLOSED

t

PZH

SWITCH
OPEN

3.5V

1.5V

1.5V
0V

0.3V

0.3V

1.5V
0V

3.5V

V

V

0V

OL

OH

2541 drw 09

5.1 7

IDT54/74FCT16240T/AT/CT/ET,162240T/AT/CT/ET
FAST CMOS 16-BIT BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES

ORDERING INFORMATION

IDT XX

Temp. Range

FCT

XXXX

Device Type

X

Package

X

Process

Blank
B

PV
PA
PF
E

16240T
16240AT
16240CT
16240ET
162240T
162240AT
162240CT
162240ET

54
74

Commercial
MIL-STD-883, Class B

Shrink Small Outline Package (SO48-1)
Thin Shrink Small Outline Package (SO48-2)
Thin Very Small Outline Package (SO48-3)
CERPACK (E48-1)

Inverting 16-Bit Buffer/Line Driver

–55

°

C to +125°C

–40

°

C to +85°C

2541 drw 10

5.1 8