Datasheet IDT54FCT138D, IDT54FCT138DB, IDT54FCT138E, IDT54FCT138EB, IDT54FCT138L Datasheet (Integrated Device Technology Inc)

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Integrated Device Technology, Inc.
FAST CMOS 1-OF-8 DECODER WITH ENABLE
IDT54/74FCT138 IDT54/74FCT138A IDT54/74FCT138C
FEATURES:
• IDT54/74FCT138 equivalent to FAST speed
• Equivalent to FAST speeds output drive over full tem­perature and voltage supply extremes
•IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than FAST (5µA max.)
DESCRIPTION:
The IDT54/74FCT138/A/C are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ 74FCT138/A/C accept three binary weighted inputs (A0, A1, A2) and, when enabled, provide eight mutually exclusive active LOW outputs (
feature three enable inputs, two active LOW ( active HIGH (E3). All outputs will be HIGH unless are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138/A/C devices and one inverter.
O
0 - O7). The IDT54/74FCT138/A/C
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation Enhanced versions
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing # 5962-87654 is listed on this function. Refer to section 2.
FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS
E1 E2
E3A0A1A2
E E
O
GND
1
A
0
2
A
1
A
2
E
1 2 3 7
3 4 5 6 7 8
P16-1,
D16-1,
SO16-1
E16-1
E
1, E2) and one
E
1 and E2
16
Vcc
15
O
0
14
O
1
13
O
2
12
O
&
11 10
9
3
O
4 5
O O
6
DIP/SOIC/CERPACK
TOP VIEW
1
NC
20 19
NC
Vcc
0
O
18
O1
17
O
16 15 14
2
NC O3
O
4
O5O6
2581 drw 01
O0O1O2O3O4O5O6O7
2581 drw 02
INDEX
A2
E1
NC
2
E E3
A1
32
4 5 6 7 8
10 11 12 13
9
7
O
A0
L20-2
GND
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1992
1992 Integrated Device Technology, Inc. 7.3 DSC-4625/3
1
IDT54/74FCT138/A/C FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names Description
0–A2 Address Inputs
A
1, E2 Enable Inputs (Active LOW)
E
3 Enable Input (Active HIGH)
E
0O7 Outputs (Active LOW)
O
2581 tbl 05
FUNCTION TABLE
Inputs Outputs
1
E
E
H X XXXXHHH HHHHH X H XXXXHHH HHHHH X X LXXXHHH HHHHH
L L HLLLLHH HHHHH L L HHLLHLH HHHHH L L HLHLHHL HHHHH L L HHHLHHH LHHHH
L L HLLHHHHHLHHH L L HHLHHHH HHLHH L L HLHHHHH HHHLH L L HHHHHHH HHHHL
E
2 E3 A0 A1 A2
E
O
0
O
O
1 O2
O
O
3
O
O
4
O
O
5
O
O
6
O
O
7
O
2581 tbl 06
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Commercial Military Unit
(2)
V
TERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V with Respect to GND
(3)
V
TERM
Terminal Voltage –0.5 to VCC –0.5 to VCC V with Respect to GND
T
A Operating 0 to +70 –55 to +125 °C
Temperature
T
BIAS Temperature –55 to +125 –65 to +135 °C
Under Bias
T
STG Storage –55 to +125 –65 to +150 °C
Temperature
P
T Power Dissipation 0.5 0.5 W
OUT DC Output Current 120 120 mA
I
NOTES: 2581 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed V
2. Inputs and V
3. Outputs and I/O terminals only.
CC by +0.5V unless otherwise noted.
CC terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
IN Input Capacitance V IN = 0V 6 10 pF
C
OUT Output Capacitance VOUT = 0V 8 12 pF
C
NOTE: 2581 tbl 02
1. This parameter is guaranteed characterization data and not tested.
(1)
Conditions Typ. Max. Unit
7.3 2
IDT54/74FCT138/A/C FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
IH Input HIGH Level Guaranteed Logic HIGH Level 2.0 V
V
IL Input LOW Level Guaranteed Logic LOW Level 0.8 V
V I
IH Input HIGH Current VCC = Max. VI = VCC ——5µA
(1)
I= 2.7V 5
V
Min. Typ.
IIL Input LOW Current VI= 0.5V –5
VI = GND –5
IK Clamp Diode Voltage VCC = Min., IN = –18mA –0.7 –1.2 V
V
OS Short Circuit Current VCC = Max.
I V
OH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µAVHC VCC —V
CC = Min. IOH = –300µAVHC VCC
V
IN = VIH or VIL IOH = –12mA MIL. 2.4 4.3
V
OL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA GND VLC V
V
CC = Min. IOL = 300µA GND VLC
V
(3)
, VO = GND –60 –120 mA
I
OH = –15mA COM’L. 2.4 4.3
VIN = VIH or VIL IOL = 32mA MIL. 0.3 0.5
OL = 48mA COM’L. 0.3 0.5
I
NOTES: 2581 tbl 03
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
CC = 5.0V, +25°C ambient and maximum loading.
(2)
Max. Unit
(4)
(4)
(4)
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol Parameter Test Conditions
CC Quiescent Power Supply Current Vcc = Max. 0.2 1.5 mA
I
V
IN VHC; VIN VLC
ICC Quiescent Power Supply Current Vcc = Max. 0.5 2.0 mA
TTL Inputs HIGH V
ICCD Dynamic Power Supply Current
(4)
IN = 3.4V
Vcc = Max. VIN VHC 0.15 0.3 mA/MHz Outputs Open V One Output Toggling 50% Duty Cycle
I
C Total Power Supply Current
(5)
Vcc = Max. VIN VHC 1.7 4.5 mA Outputs Open V Toggle
50% Duty Cycle V f
O = 10MHz VIN = GND
One Output Toggling
NOTES: 2581 tbl 04
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
3. Per TTL driven input (V
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. I
C = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fONO)
CC = Quiescent Current
I
CC = Power Supply Current for a TTL High Input (VIN = 3.4V)
I
H = Duty Cycle for TTL Inputs High
D N
T = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
CP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
O = Output Frequency
f N
O = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
CC = 5.0V, +25°C ambient.
IN = 3.4V); all other inputs at VCC or GND.
(3)
E
1, E2 or E3 (FCT)
(1)
IN VLC
IN VLC
IN = 3.4V 2.0 5.5
Min. Typ.
(2)
Max. Unit
7.3 3
IDT54/74FCT138/A/C FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT138 IDT54/74FCT138A IDT54/74FCT138C
Com’l. Mil. Com’l. Mil. Com’l. Mil.
Symbol Parameter Condition
(1)
tPLH Propagation Delay CL = 50pF 1.5 9.0 1.5 12.0 1.5 5.8 1.5 7.8 1.5 5.1 1.5 6.0 ns t
PHL An to On RL = 500
t
PLH Propagation Delay 1.5 9.0 1.5 12.5 1.5 5.9 1.5 8.0 1.5 5.2 1.5 6.1 ns
t
PHL
E
1 or E2 to On
tPLH Propagation Delay 1.5 9.0 1.5 12.5 1.5 5.9 1.5 8.0 1.5 5.2 1.5 6.1 ns t
PHL E3 to On
NOTES: 2581 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
7.3 4
IDT54/74FCT138/A/C FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC
500
Pulse
Generator
VIN
D.U.T.
RT
VOUT
50pF
CL
500
7.0V
SWITCH POSITION
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Test Open
DEFINITIONS: 2581 tbl 08
CL = Load capacitance: includes jig and probe capacitance.
T = Termination resistance: should be equal to ZOUT of the Pulse
R
Generator.
SET-UP, HOLD AND RELEASE TIMES PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLOCK ENABLE
CLEAR
ETC.
t
tSU
SU
t
REM
t
t
H
H
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
3V
1.5V 0V
LOW-HIGH-LOW
HIGH-LOW-HIGH
PULSE
PULSE
1.5V
t
W
1.5V
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
t
t
PLH
PLH
t
t
PHL
PHL
3V
1.5V 0V
V
OH
1.5V V
OL
3V
1.5V 0V
ENABLE AND DISABLE TIMESPROPAGATION DELAY
ENABLE DISABLE
3V
CONTROL
INPUT
t
PHZ
t
PLZ
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
t
PZL
SWITCH CLOSED
t
PZH
SWITCH OPEN
3.5V
1.5V
1.5V 0V
NOTES 2581 drw 04
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate 1.0 MHz; Z t
R 2.5ns.
1.5V 0V
3.5V
0.3V
V
OL
V
OH
0.3V 0V
O 50; tF 2.5ns;
7.3 5
IDT54/74FCT138/A/C FAST CMOS 1-OF-8 DECODER-WITH ENABLE MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
XXIDT FCT
Temperature
Range
X
Device
Type
X
Package
X
Process
Blank B
P D SO E L
138 138A 138C
54 74
Commercial MIL-STD-883, Class B
Plastic DIP CERDIP Small Outline IC CERPACK Leadless Chip Carrier
1-of-8 Decoder Fast 1-of-8 Decoder Super Fast 1-of-8 Decoder
–55°C to +125°C 0°C to +70°C
2581 drw 03
7.3 6
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