Datasheet IDT74AUCR16245APA, IDT74AUCR16245APF Datasheet (Integrated Device Technology Inc)

INDUSTRIAL TEMPERATURE RANGE

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

1

OCTOBER 1999INDUSTRIAL TEMPERATURE RANGE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

© 1999 Integrated Device Technology, Inc. DSC-4736/1

FEA TURES:

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)

•VCC = 3.3V ± 0.3V, Normal Range

•VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4

µµ

µµ

µ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

• Available in SSOP, TSSOP, and TVSOP packages

FUNCTIONAL BLOCK DIAGRAM

APPLICA TIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

DRIVE FEA TURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

3.3V CMOS 16-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O

IDT74LVC16245A

DESCRIPTION:

This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro­nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate this device as either two
independent 8-bit transceivers or one 16-bit transceiver. The direction
control pin (DIR) controls the direction of data flow. The output enable pin
(OE) overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.

All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.

The LVC16245A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.

1DIR

1A1

1

A2

1

A3

1

A4

1

A5

1

A6

1

A7

1

A8

1

B8

1

B7

1

B6

1

B5

1

B4

1

B3

1

B2

1

B1

1

OE

2DIR

2A1

2

A2

2

A3

2

A4

2

A5

2

A6

2

A7

2

A8

2

B8

2

B7

2

B6

2

B5

2

B4

2

B3

2

B2

2

B1

2

OE

1

47

46

44

43

41

40

38

37

48

2

3

5

6

8

9

11

12

24

36

35

33

32

30

29

27

26

25

13

14

16

17

19

20

22

23

INDUSTRIAL TEMPERATURE RANGE

2

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SSOP/ TSSOP/ TVSOP

TOP VIEW

PIN CONFIGURATION

NOTES:

1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance

Inputs

xOE xDIR Outputs

L L Bus B Data to Bus A
L H Bus A Data to Bus B

HX Z

FUNCTION T ABLE (EACH 8-BIT SECTION)

(1)

Pin Names Description

xOE Output Enable Inputs (Active LOW)

xDIR Direction Control Input

xAx Side A Inputs or 3-State Outputs
xBx Side B Inputs or 3-State Outputs

PIN DESCRIPTION

NOTE:

1. As applicable to the device type.

Symbol Parameter

(1)

Conditions Typ. Max. Unit

CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 6.5 8 pF
C

I/O I/O Port Capacitance VIN = 0V 6.5 8 pF

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol Description Max Unit

VTERM

(2)

Terminal Voltage with Respect to GND –0.5 to +6.5 V

VTERM

(3)

Terminal Voltage with Respect to GND –0.5 to +6.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –50 to +50 mA
I

IK Continuous Clamp Current, –50 mA

IOK VI < 0 or VO < 0
I

CC Continuous Current through each ±100 mA

ISS VCC or GND

ABSOLUTE MAXIMUM RATINGS

(1)

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

2. VCC terminals.

3. All terminals except VCC.

1DIR

1B1

GND

V

CC

GND

2
3
4

5
6

7
8
9

10
11

12
13
14
15
16
17
18

19

20
21
22

23
24

39
38
37
36
35

34
33
32

31

30
29
28
27
26
25

40

41

42

43

44

45

46

47

481

1B2

1

B3

1

B4

1

B5

1

B6

1

B7

1

B8

2

B1

2

B2

GND

2B3
2

B4

2

B6

2

B5

VCC

GND

2B8

2

B7

2

DIR

1OE
1A1

GND

V

CC

GND

1A2

1

A3

1

A4

1

A5

1

A6

1

A7

1

A8

2

A1

2

A2

GND

2A3
2

A4

2

A6

2

A5

VCC

GND

2A8

2

A7

2

OE

INDUSTRIAL TEMPERATURE RANGE

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3

Symbol Parameter Test Conditions Min. Typ.

(1)

Max. Unit

VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 — — V

VCC = 2.7V to 3.6V 2 — —

V

IL Input LOW Voltage Level VCC = 2.3V to 2.7V — — 0.7 V

VCC = 2.7V to 3.6V — — 0.8

I

IH Input Leakage Current VCC = 3.6V VI = 0 to 5.5V — — ±5µA

IIL

IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V — — ±10 µA
IOZL (3-State Output pins)

IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 5.5V — — ±50 µA

VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V

VH Input Hysteresis VCC = 3.3V — 100 — mV

I

CCL Quiescent Power Supply Current VCC = 3.6V VIN = GND or VCC —— 10µA

ICCH
ICCZ 3.6 ≤ VIN ≤ 5.5V

(2)

—— 10

∆ICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND — — 500 µA

Variation

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE

Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C

NOTES:

1. Typical values are at VCC = 3.3V, +25°C ambient.

2. This applies in the disabled state only.

NOTE:

1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.

OUTPUT DRIVE CHARACTERISTICS

Symbol Parameter Test Conditions

(1)

Min. Max. Unit

VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — V

VCC = 2.3V IOH = – 6mA 2 —
VCC = 2.3V IOH = – 12mA 1.7 —
VCC = 2.7V 2.2 —
VCC = 3V 2.4 —
VCC = 3V IOH = – 24mA 2.2 —

VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 V

VCC = 2.3V IOL = 6mA — 0.4

IOL = 12mA — 0.7

VCC = 2.7V IOL = 12mA — 0.4
VCC = 3V IOL = 24mA — 0.55

INDUSTRIAL TEMPERATURE RANGE

4

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

OPERA TING CHARACTERISTICS, VCC = 3.3V ± 0.3V , TA = 25°C

Symbol Parameter Test Conditions Typical Unit

CPD Power Dissipation Capacitance per Transceiver Outputs enabled CL = 0pF, f = 10Mhz 38 pF
CPD Power Dissipation Capacitance per Transceiver Outputs disabled 4

SWITCHING CHARACTERISTICS

(1)

VCC = 2.7V VCC = 3.3V ± 0.3V

Symbol Parameter Min. Max. Min. Max. Unit

tPLH Propagation Delay — 4.7 1 4 ns
tPHL xAx to xBx, xBx to xAx
tPZH Output Enable Time — 6.7 1.5 5.5 ns
tPZL xOE to xAx or xBx
tPHZ Output Disable Time — 7.1 1.5 6.6 ns
tPLZ xOE to xAx or xBx

tSK(o ) Output Skew

(2)

——— 1ns

NOTES:

1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.

2. Skew between any two outputs of the same package and switching in the same direction.

INDUSTRIAL TEMPERATURE RANGE

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

5

Open

VLOAD

GND

VCC

Pulse

Generator

D.U.T.

500Ω

500Ω

CL

RT

VIN

VOUT

(1, 2)

LVC Link

INPUT

VIH

0V
V

OH

VOL

tPLH1

tSK (x)

OUTPUT 1

OUTPUT 2

t

PHL1

tSK (x)

tPLH2

tPHL2

VT

VT

VOH
VT

VOL

tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1

LVC Link

SAME PHASE

INPUT TRANSITION

OPPOSITE PHASE

INPUT TRANSITION

0V

0V

V

OH

VOL

tPLH

tPHL

tPHL

tPLH

OUTPUT

VIH
VT

VT

VIH
VT

LVC Link

DATA

INPUT

0V

0V

0V

0V

tREM

TIMING

INPUT

ASYNCHRONOUS

CONTROL

SYNCHRONOUS

CONTROL

t

SU

tH

tSU

tH

VIH
VT

VIH
VT

VIH
VT

VIH
VT

LVC Link

LOW-HIGH-LOW

PULSE

HIGH-LOW-HIGH

PULSE

VT

tW

VT

LVC Link

CONTROL

INPUT

tPLZ

0V

OUTPUT

NORMALLY

LOW

tPZH

0V

SWITCH

CLOSED

OUTPUT

NORMALLY

HIGH

ENABLE

DISABLE

SWITCH

OPEN

tPHZ

0V

V

OL+VLZ

VOH

VT

VT

tPZL

VLOAD/2

VLOAD/2

VIH
VT

VOL

VOH-VHZ

LVC Link

TEST CIRCUITS AND WAVEFORMS

Propagation Delay

Test Circuit for All Outputs

Enable and Disable Times

Set-up, Hold, and Release Times

NOTES:

1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.

2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

NOTES:

1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.

Output Skew - tSK(X)

Pulse Width

NOTE:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

Symbol VCC

(1)

= 3.3V±0.3V VCC

(1)

= 2.7V VCC

(2)

= 2.5V±0.2V Unit

VLOAD 6 6 2 x Vcc V

VIH 2.7 2.7 Vcc V

VT 1.5 1.5 Vcc / 2 V
VLZ 300 300 150 mV
VHZ 300 300 150 mV

C

L 50 50 30 pF

TEST CONDITIONS

SWITCH POSITION

Test Switch

Open Drain

Disable Low V

LOAD

Enable Low

Disable High GND

Enable High

All Other Tests Open

INDUSTRIAL TEMPERATURE RANGE

6

IDT74LVC16245A

3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

ORDERING INFORMATION

CORPORATE HEADQUARTERS for SALES: for Tech Support:

2975 Stender Way 800-345-7015 or 408-727-6116 [e-mail]
Santa Clara, CA 95054 fax: [phone] [phone]

www.idt.com

IDT

XX

LVC

XXXX

XX

Package

Device Type

Temp. Range

PV
PA
PF

16

74

Shrink Small Outline Package
Thin Shrink Small Outline Package
Thin Very Small Outline Package

16-Bit Bus Trans c eiv er with 3-State Outputs

-40°C to +85°C

XXX

FamilyBus-Hold

245A

No Bus-hold

Double-Density with Resistors, ±24mA

Blank