• Clamp diodes on all inputs for ringing suppression
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than AMD’s
bipolar Am29800 Series (5µA max.)
DESCRIPTION:
The IDT54/74FCT800 series is built using an advanced
dual metal CMOS technology.
The IDT54/74FCT860 series bus transceivers provide
high-performance bus interface buffering for wide
data/address paths or buses carrying parity. The
IDT54/74FCT863 9-bit transceivers have NAND-ed output
enables for maximum control flexibility.
All of the IDT54/74FCT800 high-performance interface
family are designed for high-capacitance load drive capability
while providing low-capacitance bus loading at both inputs
and outputs. All inputs have clamp diodes and all outputs are
designed for low-capacitance bus loading in the high- impedance state.
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT861IDT54/74FCT863
T
0
T
1
9
-
OERT
T
0
T
1
8
-
OERT
OER
12
R
0
R
1
OETR9-
R
0
R
1
OETR8-OET
12
2610 drw 01
PRODUCT SELECTOR GUIDE
Device
10-Bit9-Bit
Non-invertingIDT54/74FCT861IDT54/74FCT863
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGESAPRIL 1994
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS
OER
R
R
R
R
R
R
R
R
R
R
GND
1
2
0
3
1
2
3
4
5
6
7
8
9
4
5
6
7
8
9
10
11
12
P24-1,
D24-1,
E24-1
SO24-2
24
23
22
21
20
19
&
18
17
16
15
14
13
DIP/CERPACK/SOIC
TOP VIEW
IDT54/74FCT863 9-BIT TRANSCEIVERS
OER
OER
GND
1
1
2
0
R
3
R
1
R
2
R
3
4
R
R
5
R
6
R
7
R
8
2
4
5
6
7
8
9
10
11
12
P24-1,
D24-1,
E24-1
SO24-2
24
23
22
21
20
19
&
18
17
16
15
14
13
Vcc
0
T
T
1
T
2
T
3
T
4
T
5
T
6
T
7
T
8
T
9
OET
Vcc
T
T
T
T
T
T
T
T
T
OET
OET
INDEX
R2
R3
R4
NC
R
5
R6
R7
1
R0R
OER
432128 27 26
5
6
7
8
9
10
11
L28-1
12 13 14 15 16 17 18
8
R
R9
GND
NC
NC
Vcc
OET
0
T1
T
25
2
T
24
T3
23
T4
NC
22
21
T5
20
T6
19
T7
9
T8T
LCC
TOP VIEW
INDEX
0
1
2
3
4
5
6
7
8
2
1
R2
R3
R4
NC
R
R6
R7
5
1
OER
R0R
432128 27 26
5
6
7
8
9
10
11
L28-1
12 13 14 15 16 17 18
8
2
R
GND
OER
NC
NC
Vcc
1
OET
0T1
T
2
OET
25
2
T
24
T3
T4
23
NC
22
21
T5
T6
20
19
T7
8
T
2610 drw 02
DIP/CERPACK/SOIC
LOGIC SYMBOLS
OET
1010
OER
TOP VIEW
LCC
TOP VIEW
IDT54/74FCT863IDT54/74FCT861
OET1
OET2
TR
99
TR
OER1
OER2
7.232
2610 drw 03
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
NameI/ODescription
IDT54/74FCT861
OER
OET
II/O10-bit RECEIVE input/output.
R
II/O10-bit TRANSMIT input/output.
T
IDT54/74FCT863
OER
OET
R
II/O9-bit RECEIVE input/output.
II/O9-bit TRANSMIT input/output.
T
IWhen LOW in conjunction with
activates the RECEIVE mode.
IWhen LOW in conjunction with
activates the TRANSMIT mode.
IIWhen LOW in conjunction with
activates the RECEIVE mode.
IIWhen LOW in conjunction with
activates the TRANSMIT mode.
OET
OER
OET
OER
HIGH
HIGH
I HIGH
I HIGH
2610 tbl 01
FUNCTION TABLE
(1)
IDT54/74FCT861/863 (Non-inverting)
InputsOutputs
OET
OER
OET
OER
LHLN/AN/ALTransmitting
LHHN/AN/AHTransmitting
HLN/ALLN/AReceiving
HLN/AHHN/AReceiving
HHXXZZHigh Z
NOTE:2610 tbl 02
1. H = HIGH, L = LOW, Z = High Impedance, X = Don’t Care, N/A = Not
Applicable.
IT IRITI Function
R
ABSOLUTE MAXIMUM RATINGS
(1)
SymbolRatingCommercialMilitaryUnit
(2)
V
TERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0V
with Respect
to GND
(3)
V
TERM
Terminal Voltage –0.5 to VCC –0.5 to VCCV
with Respect
to GND
T
AOperating 0 to +70 –55 to +125°C
Temperature
T
BIASTemperature –55 to +125 –65 to +135°C
Under Bias
T
STGStorage –55 to +125 –65 to +150°C
Temperature
P
TPower Dissipation0.50.5W
OUTDC Output Current120120mA
I
NOTES:2610 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
2. Inputs and V
3. Outputs and I/O terminals only.
CC by +0.5V unless otherwise noted.
CC terminals only.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
SymbolParameter
INInput CapacitanceV IN = 0V610pF
C
I/OI/O CapacitanceVOUT = 0V812pF
C
NOTE:2610 tbl 04
1. This parameter is guaranteed by characterization but not tested.
(1)
Conditions Typ.Max.Unit
7.233
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERSMILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V, VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC= 5.0V ± 10%
SymbolParameterTest Conditions
IHInput HIGH LevelGuaranteed Logic HIGH Level2.0——V
V
ILInput LOW LevelGuaranteed Logic LOW Level——0.8V
V
IHInput HIGH CurrentVCC = Max.VI = VCC——5µA
I
(Except I/O pins)V
(1)
I = 2.7V——5
Min.Typ.
IILInput LOW CurrentVI = 0.5V——–5
(Except I/O pins)V
IHInput HIGH CurrentVCC = Max.VI = VCC——15
I
(I/O pins Only)V
I = GND——–5
I = 2.7V——15
IILInput LOW CurrentVI = 0.5V——–15
(I/O pins Only)VI = GND——–15
IKClamp Diode VoltageVCC = Min., IN = –18mA—–0.7–1.2V
V
OSShort Circuit CurrentVCC = Max.
I
OHOutput HIGH VoltageVCC = 3V, VIN = VLC or VHC, IOH = –32µAVHCVCC—V