Datasheet ICX096AKE Datasheet (Sony)

Page 1
Description
The ICX096AKE is an interline CCD solid-state image sensor suitable for NTSC small color cameras. Ye, Cy, Mg, and G complementary color mosaic filters are used. At the same time, high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology.
This chip features a field period readout system and an electronic shutter with variable charge­storage time.
The package is a small 12-pin SON(LCC).
Features
• High sensitivity and low dark current
• Horizontal register: 3.3 to 5.0V drive
• No voltage adjustment
(Reset gate and substrate bias are not adjusted.)
• Low smear
• Excellent antiblooming characteristics
• Continuous variable-speed shutter
• Recommended range of exit pupil distance: –10mm to –∞
• Ye, Cy, Mg, and G complementary color mosaic filters on chip
• 12-pin ceramic SON(LCC) package
Device Structure
• Interline CCD image sensor
• Image size: Diagonal 3mm (Type 1/6)
• Number of effective pixels: 510 (H) × 492 (V) approx. 250K pixels
• Total number of pixels: 537 (H) × 505 (V) approx. 270K pixels
• Chip size: 3.30mm (H) × 2.95mm (V)
• Unit cell size: 4.80µm (H) × 3.75µm (V)
• Optical black: Horizontal (H) direction: Front 2 pixels, rear 25 pixels
Vertical (V) direction: Front 12 pixels, rear 1 pixel
• Number of dummy bits: Horizontal 16
Vertical 1 (even fields only)
• Substrate material: Silicon
∗
Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor.
– 1 –
ICX096AKE
E97601A99
Diagonal 3mm (Type 1/6) CCD Image Sensor for NTSC Color Cameras
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
12 pin SON (Ceramic)
A
A
A
Pin 1
V
2
25
1
12
Pin 7
H
Optical black position
(Top View)
AAA AAA AAA
Page 2
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ICX096AKE
Block Diagram and Pin Configuration
(Top View)
Note)
Note) : Photo sensor
V
OUT
GND
Vφ
1
Vφ
2
Vφ
3
Vφ
4
V
DD
φSUB
V
L
RG
Hφ
1
Hφ
2
Horizontal register
Cy
Cy
G
G
Cy
Mg
Ye
Ye
Mg
Mg
Ye
G
Cy
Cy
G
G
Cy
Mg
Ye
Ye
Mg
Mg
Ye
G
1
5
2
3
4
6
9
11
12
8
10
7
Vertical register
Pin No.
1 2 3 4 5 6
Vφ4 Vφ3 Vφ2 Vφ1 GND VOUT
Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND Signal output
7 8
9 10 11 12
VDD φSUB VL RG Hφ1 Hφ2
Supply voltage Substrate clock Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock
Symbol Description Pin No. Description
Pin Description
Absolute Maximum Ratings
∗1
+24V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
Symbol
Against φSUB
Against GND
Against VL
Between input clock pins
Storage temperature Operating temperature
–40 to +8 –40 to +10 –50 to +15
–50 to +0.3 –40 to +0.3 –0.3 to +18
–10 to +18 –10 to +15
–0.3 to +26 –0.3 to +16
to +15 –14 to +14 –14 to +14
–30 to +80 –10 to +60
V V V V V V V V V V V V V
°C °C
VDD – φSUB VOUT, RG – φSUB Vφ1, Vφ3 – φSUB Vφ2, Vφ4, VL– φSUB Hφ1, Hφ2, GND – φSUB VDD, VOUT, RG – GND Vφ1, Vφ2, Vφ3, Vφ4 – GND Hφ1, Hφ2 – GND Vφ1, Vφ3 – VL Vφ2, Vφ4, Hφ1, Hφ2, GND – VL Voltage difference between vertical clock input pins Hφ1 – Hφ2 Hφ1, Hφ2 – Vφ4
Item Ratings Unit Remarks
∗1
Page 3
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ICX096AKE
Clock Voltage Conditions
Item
Readout clock voltage
VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2,
VVL3, VVL4 VφV VVH3 – VVH VVH4 – VVH VVHH VVHL VVLH VVLL VφH VHL
VφRG VRGLH – VRGLL VRGH VφSUB
14.55 –0.05
–0.2 –8.0
6.8 –0.25 –0.25
3.0 –0.05
4.5
VDD +
0.3
21.5
15.0 0 0
–7.5
7.5
5.0 0
5.0
VDD +
0.6
22.5
15.45
0.05
0.05 –7.0
8.05
0.1
0.1
0.3
0.3
0.3
0.3
5.25
0.05
5.5
0.8
VDD +
0.9
23.5
V V V
V V
V V V V V V V V
V V V V
1 2 2
2 2
2 2 2 2 2 2 3 3
4 4 4 5
VVH = (VVH1 + VVH2)/2
VVL = (VVL3 + VVL4)/2 VφV
= VVHn – VVLn (n = 1 to 4)
High-level coupling High-level coupling Low-level coupling Low-level coupling
Input through 0.01µF capacitance
Low-level coupling
Horizontal transfer clock voltage
Reset gate clock voltage
Substrate clock voltage
Vertical transfer clock voltage
Symbol Min.
Typ. Max.
Unit
Waveform
diagram
Remarks
Bias Conditions
Item Supply voltage Protective transistor bias Substrate clock
VDD VL φSUB
14.55
15.0
∗1 ∗2
15.45 V
Symbol Min. Typ. Max. Unit Remarks
DC Characteristics
Item Supply current IDD 4 6 mA
Symbol Min. Typ. Max. Unit Remarks
∗1
VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used.
∗2
Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD.
Page 4
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ICX096AKE
Clock Equivalent Circuit Constant
Item
Capacitance between vertical transfer clock and GND
CφV1, CφV3 CφV2, CφV4 CφV12, CφV34 CφV23, CφV41 CφV13, CφV24
CφH1, CφH2
CφHH
CφRG
CφSUB R1, R2, R3, R4
RGND RφH RφRG
270 220 180 150
62 20
30
3
150
82 15 20 39
pF pF pF pF pF
pF
pF
pF
pF
Ω Ω Ω Ω
Capacitance between vertical transfer clocks
Capacitance between horizontal transfer clock and GND
Capacitance between horizontal transfer clocks
Capacitance between reset gate clock and GND
Capacitance between substrate clock and GND
Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor
Symbol Min. Typ. Max. Unit Remarks
RφH
RφH
Hφ2
Hφ1
CφH1 CφH2
CφHH
Vφ1
CφV12
Vφ2
Vφ4 Vφ3
CφV34
CφV23CφV41
CφV13
CφV24
CφV1
CφV2
CφV4 CφV3
RGND
R4
R1
R3
R2
Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit
RφRG
RGφ
Cφ
RG
Reset gate clock equivalent circuit
Page 5
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ICX096AKE
Drive Clock Waveform Conditions (1) Readout clock waveform
(2) Vertical transfer clock waveform
II II
100%
90%
10%
0%
VVT
tr twh tf
φM
0V
φM
2
Vφ1 Vφ3
Vφ2 Vφ4
VVHH
VVH
VVHL
VVHH
VVHL
VVH1
VVL1
VVLH
VVLL
VVL
VVHH
VVH3
VVHL
VVH
VVHH
VVHL
VVL3
VVL
VVLL
VVLH
VVHH VVHH
VVH
VVHL
VVHL
VVH2
VVLH
VVL2
VVLL
VVL
VVHH VVHH
VVHL
VVH4
VVHL
VVH
VVL
VVLH
VVLL
VVL4
VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VφV = VVHn – VVLn (n = 1 to 4)
Page 6
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ICX096AKE
tr twh tf
90%
10%
twl
Vφ
H
VHL
(3) Horizontal transfer clock waveform
twl
Vφ
RG
VRGH
VRGL + 0.5V V
RGL
VRGLH
VRGLL
twhtr tf
10%
Point A
RG waveform
Hφ
1 waveform
(4) Reset gate clock waveform
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGH – VRGL
(5) Substrate clock waveform
90%
100%
10%
0%
V
SUB
tr twh tf
φM
φM
2
VφSUB
(A bias generated within the CCD)
Page 7
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ICX096AKE
∗1
When vertical transfer clock driver CXD1267AN is used.
∗2
When VφH = 3.0V. tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be at least VφH/2 [V].
Clock Switching Characteristics
Item
Readout clock Vertical transfer
clock
Reset gate clock
Substrate clock
VT Vφ1, Vφ2,
Vφ3, Vφ4
Hφ
Hφ1 Hφ2
φRG
φSUB
2.3
41
11
1.5
2.5
46
5.6
14
1.65
417646
5.6 80
0.1
6.5
0.007
0.007
6.0
9.5
0.5
5
0.1
6.5
0.007
0.007
5.0
250
9.5
0.5
µs
ns
ns
µs
ns
µs
During readout
∗1
∗2
During drain charge
Symbol
twh
Min. Typ.
Max.
Min. Typ.
Max.
Min. Typ.
Max.
Min. Typ.
Max.
twl tr tf
Unit Remarks
Horizontal
transfer clock
During imaging
During parallel-serial conversion
Page 8
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ICX096AKE
Measurement System
CCD C.D.S
LPF1
LPF2
AMP
CCD signal output
Y signal output
Chroma signal output
(3dB down 4MHz)
(3dB down 1MHz)
S
H
Note) Adjust the amplifier gain so that the gain between [∗A] and [∗Y] , and between [∗A] and [∗C] equals 1.
[∗A]
[∗Y]
[∗C]
S
H
Zone Definition of Video Signal Shading
10
9
492 (V)
810
V
10
H
8
H 8
V
10
Effective pixel region
Ignored region
Zone 0, I
Zone II, II'
510 (H)
Image Sensor Characteristics (Ta = 25°C)
Item
Sensitivity
Sensitivity ratio
Saturation signal Smear
Video signal shading
Uniformity between video signal channels
Dark signal Dark signal shading Flicker Y Flicker R-Y Flicker B-Y Line crawl R Line crawl G Line crawl B Line crawl W Lag
S RMgG RYeCy Ysat Sm
SHy
∆Sr ∆Sb
Ydt ∆Ydt Fy Fcr Fcb Lcr Lcg Lcb Lcw Lag
260
0.93
1.15 600
330
0.009
1.35
1.48
0.015 20 25 10 10
2 1 2 5 5 3 3 3 3
0.5
mV
mV
% % % %
% mV mV
%
%
%
%
%
%
%
%
1 2 2 3 4 5 5 6 6 7 8 9 9
9 10 10 10 10 11
Ta = 60°C
Zone 0 and I Zone 0 to II'
Ta = 60°C Ta = 60°C
Symbol Min. Typ. Max. Unit Measurement method Remarks
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ICX096AKE
Image Sensor Characteristics Measurement Method
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions.
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output or chroma signal output of the measurement system.
Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals
As shown in the left figure, fields are read out. The charge is mixed by pairs such as A1 and A2 in the A field. (pairs such as B in the B field) As a result, the sequence of charges output as signals from the horizontal shift register (Hreg) is, for line A1, (G + Cy), (Mg + Ye), (G + Cy), and (Mg + Ye).
These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words, the approximation:
Y = {(G + Cy) + (Mg + Ye)} × 1/2
= 1/2 {2B + 3G + 2R}
is used for the Y signal, and the approximation:
R – Y = {(Mg + Ye) – (G + Cy)}
= {2R – G}
is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are
(Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye).
The Y signal is formed from these signals as follows:
Y = {(G + Ye) + (Mg + Cy)} × 1/2
= 1/2 {2B + 3G + 2R} This is balanced since it is formed in the same way as for line A1. In a like manner, the chroma (color difference) signal is approximated as follows:
– (B – Y) = {(G + Ye) – (Mg + Cy)}
= – {2B – G} In other words, the chroma signal can be retrieved according to the sequence of lines from R – Y and – (B – Y) in alternation. This is also true for the B field.
Cy Ye
G
Mg
Cy Ye
G
Mg
Cy Ye
G
Mg
Cy Ye
G
Mg
A1
A2
B
Hreg
Color Coding Diagram
Page 10
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ICX096AKE
Definition of standard imaging conditions
1) Standard imaging condition I: Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity.
2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
3) Standard imaging condition III: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
1. Sensitivity Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s, measure the Y signal (Ys) at the center of the screen and substitute the value into the following formula.
S = Ys × [mV]
2. Sensitivity ratio Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the Mg signal output (SMg [mV]) and G signal output (SG [mV]), and Ye signal output (SYe [mV]) and Cy signal output (SCy [mV]) at the center of the screen with frame readout method. Substitute the values into the following formula.
RMgG = SMg/SG RYeCy = SYe/SCy
3. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with average value of the Y signal output, 200mV, measure the minimum value of the Y signal.
4. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with average value of the Y signal output, 200mV. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value YSm [mV] of the Y signal output and substitute the value into the following formula.
5. Video signal shading Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and minimum (Ymin [mV]) values of the Y signal and substitute the values into the following formula.
SHy = (Ymax – Ymin)/200 × 100 [%]
6. Uniformity between video signal channels Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin [mV]) values of the R – Y and B – Y channels of the chroma signal and substitute the values into the following formula.
∆Sr = | (Crmax – Crmin)/200 | × 100 [%] ∆Sb = | (Cbmax – Cbmin)/200 | × 100 [%]
Sm =
× 100 [%] (1/10V method conversion value)
× ×
200
YSm
500
1
10
1
60
250
Page 11
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ICX096AKE
Ylag (lag)Y signal output 200mV
Light
FLD
V1
Strobe light
timing
Output
7. Dark signal Measure the average value of the Y signal output (Ydt [mV]) with the device ambient temperature 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
8. Dark signal shading After measuring 7, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the Y signal output and substitute the values into the following formula.
∆Ydt = Ydmax – Ydmin [mV]
9. Flicker
1) Fy Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the difference in the signal level between fields (∆Yf [mV]). Then substitute the value into the following formula.
Fy = (∆Yf/200) × 100 [%]
2) Fcr, Fcb Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, insert an R or B filter, and then measure both the difference in the signal level between fields of the chroma signal (∆Cr, ∆Cb) as well as the average value of the chroma signal output (CAr, CAb). Substitute the values into the following formula.
Fci = (∆Ci/CAi) × 100 [%] (i = r, b)
10. Line crawls Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then insert a white subject and R, G, and B filters and measure the difference between Y signal lines for the same field (∆Ylw, ∆Ylr, ∆Ylg, ∆Ylb [mV]). Substitute the values into the following formula.
Lci = (∆Yli/200) × 100 [%] (i = w, r, g, b)
11. Lag Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Ylag). Substitute the value into the following formula.
Lag = (Ylag/200) × 100 [%]
Page 12
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ICX096AKE
6
CXD1267AN
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
22/16V
3.3/20V
0.01
0.01
100
3.9k
–7.5V
3.3/16V
1/35 V
0.1
1M
2SK523
(BOTTOM VIEW)
11 910
1 2 3 4 5
8
Hφ
1
Hφ
2
RG
V
L
φSUB
V
DD
Vφ
4
Vφ
3
Vφ
2
Vφ
1
GND
V
OUT
22/20V
CCD OUT
1/20V
100k
15V
XSUB
XV2
XV1
XSG1
XV3
XSG2
XV4
Hφ
1
Hφ2
RG
1500p
100k
7
ICX096AKE
12
Drive Circuit
Page 13
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ICX096AKE
Spectral Sensitivity Characteristics
(excludes both lens characteristics and light source characteristics)
700650600550500450400
Wave Length [nm]
Relative Response
1.0
0.8
0.6
0.4
0.2
0.0
Ye
Cy
G
Mg
Sensor Readout Clock Timing Chart
Unit : µs
Odd Field
Even Field
V1
V2
V3
V4
V1
V2
V3
V4
2.5
1.5 2.5 2.0
1.2
0.3
31.3
Page 14
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ICX096AKE
HD
520
525
1
2
3
4
5
10
15
20
260
265
270
275
280
BLK
VD
FLD
V1
V2
V3
V4
492
491
1
2
3
4
5
6
1
2
4
5
6
3
491
492
1
5 3
2 4
6
1
5 3
2 4
6
CCD
OUT
Drive Timing Chart (Vertical Sync)
Page 15
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ICX096AKE
HD
BLK
H1
H2
RG
V1
V2
V3
V4
SUB
500
505
510
1
2
3
5
10
15
20
25
1
2
3
5
10
15
16
1
2
5
1
2
3
10
Drive Timing Chart (Horizontal Sync)
Page 16
ICX096AKE
Notes on Handling
1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering a) Make sure the upper surface of ceramic package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
4) Installing (attaching) a) If a load is applied to the entire surface by a hard component, bending stress may be generated and the
package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for
installation, use either an elastic load, such as a spring plate, or an adhesive. b) The adhesive may cause the marking on the rear surface to disappear. c) If the metal, etc., clash or rub against the package, the dust may be generated by the fragments of
package. d) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-
acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives.
(reference)
5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high
luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
– 16 –
Page 17
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ICX096AKE
Package Outline Unit: mm
PACKAGE STRUCTURE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
Ceramic
GOLD PLATING
1
6
7
12
16
7 12
(Recommendatory pin pitch)
A
H
V
B
D
C
1.5
4.0
5.52
9.25 ± 0.2
6.82
8.00 ± 0.2
1.8
2.30 ± 0.3
2.43
+0.13
- 0
11 -
1.0
12 -
1.35
90°
3.36
10 - 1.27
2.43
12-
0.60
3.53
8.22
0.40
0.50
2 -
ø 1.0
4.11
12pin SON
(Recommendatory
pin size)
0.44g
Pilot pin
1.0
Guide pin
1. “A” is the center of the effective image area.
2. The straight line “B” which passes through the center of the pilot pin and the middle
point of the width of the notch for the guide pin is the reference axis of vertical direction (V).
The straight line “C” which passes through the center of the pilot pin at right angle to
vertical reference line“B” is the reference axis of horizontal direction (H).
3. The bottom “D” of the package is the height reference.
4. The center of the effective image area, relative to“B” and “C” is
(H, V) = (4.11,0) ± 0.15mm.
5. The rotation angle of the effective image area relative to the line“B” is ± 1°.
6. The height from the bottom “D” to the effective image area is 1.03 ± 0.15mm.
7. The tilt of the effective image area relative to the bottom“D” is less than 25µm.
8. The thickness of the cover glass is 0.5mm, and the refractive index is 1.5.
9. Notches for the pilot pin and the guide pin must not be used for fixing.
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