Datasheet ICX084AK Datasheet (Sony)

Page 1
Description
The ICX084AK is a diagonal 6mm (Type 1/3) interline CCD solid-state image sensor with a square pixel array which supports VGA format. Progressive scan allows all pixels signals to be output independently within approximately 1/30 second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (Hole-Accumulation Diode) sensors.
This chip is suitable for applications such as electronic still cameras, PC input cameras, etc.
Features
• Progressive scan allows individual readout of the
image signals from all pixels.
• High vertical resolution (480TV-lines) still image
without a mechanical shutter.
• Square pixel unit cell
• Supports VGA format
• Horizontal drive frequency: 12.27MHz
• No voltage adjustments
(reset gate and substrate bias are not adjusted.)
• R, G, B primary color mosaic filters on chip
• High resolution, high color reproductivity, high
sensitivity, low dark current
• Continuous variable-speed shutter
1/30 (typ.) to 1/10000s
• Low smear
• Excellent antiblooming characteristics
• Horizontal register: 5V drive
• 16-pin high precision plastic package (enables dual-
surface standard)
Device Structure
• Interline CCD image sensor
• Image size: Diagonal 6mm (Type 1/3)
• Number of effective pixels: 659 (H) × 494 (V) approx. 330K pixels
• Total number of pixels: 692 (H) × 504 (V) approx. 350K pixels
• Chip size: 5.84mm (H) × 4.94mm (V)
• Unit cell size: 7.4µm (H) × 7.4µm (V)
• Optical black: Horizontal (H) direction: Front 2 pixels, rear 31 pixels
Vertical (V) direction: Front 8 pixels, rear 2 pixels
• Number of dummy bits: Horizontal 16
Vertical 5
• Substrate material: Silicon
– 1 –
ICX084AK
E95101E99
Diagonal 6mm (Type 1/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
16 pin DIP (Plastic)
A
A
A
Pin 1
V
2
31
2
8
Pin 9
H
Optical black position
(Top View)
∗
Wfine CCD is a registered trademark of Sony Corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel.
AAA AAA AAA
Page 2
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ICX084AK
Pin No. Symbol Description Pin No. Symbol Description
1 2 3
4 5 6 7 8
Vφ3 Vφ2 Vφ1
NC GND CGG GND VOUT
Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock
GND Output amplifier gate
∗1
GND Signal output
9 10 11
12 13 14 15 16
VDD SUBCIR GND
φSUB VL RG Hφ1 Hφ2
Supply voltage Supply voltage for the substrate
voltage generation GND
Substrate clock Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock
Pin Description
1
2
3
4
5
6
7
8
Note)
Note) : Photo sensor
V
OUT
GND
C
GG
GND
NC
Vφ
1
Vφ
2
Vφ
3
V
DD
SUBCIR
GND
φSUB
V
L
RG
Hφ
1
Hφ
2
Horizontal register
G B G B R G R G G B G B R G R G G B G B R G R G
Vertical register
10
11
12
13
14 15
16
9
Block Diagram and Pin Configuration
(Top View)
Item
–0.3 to +36 –0.3 to +18
–22 to +9
–15 to +16
to +10 to +15
to +16 –16 to +16 –10 to +15 –55 to +10
–65 to +0.3 –0.3 to +27.5 –0.3 to +20.5 –0.3 to +17.5
–30 to +80 –10 to +60
V V V V V V V V V V V V V
V °C °C
∗2
Ratings Unit Remarks
Absolute Maximum Ratings
∗2
+24V (Max.) when clock width < 10µs, clock duty factor < 0.1%.
Substrate clock φSUB – GND
VDD, VOUT, CGG, SUBCIR – GND
Supply voltage
VDD, VOUT, CGG, SUBCIR – φSUB Vφ1, Vφ2, Vφ3 – GND
Clock input voltage
Vφ1, Vφ2, Vφ3 – φSUB Voltage difference between vertical clock input pins Voltage difference between horizontal clock input pins Hφ1, Hφ2 – Vφ3 Hφ1, Hφ2 – GND Hφ1, Hφ2 – φSUB VL – φSUB Vφ2, Vφ3 – VL RG– GND Vφ1, Hφ1, Hφ2, GND– VL Storage temperature Operating temperature
∗1
DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1000pF or more.
Page 3
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ICX084AK
Item
VDD VL φSUB
14.55 15.4515.0
∗1 ∗2
V
Symbol Min. Typ. Max. Unit Remarks
Bias Conditions
DC Characteristics
Supply voltage Protective transistor bias Substrate clock
Item
Supply current IDD 6 8 mA
Symbol Min. Typ. Max.
Unit
Remarks
Item
Readout clock voltage
VVT VVH02 VVH1, VVH2, VVH3 VVL1, VVL2, VVL3 Vφ1, Vφ2, Vφ3 I VVL1 – VVL3 I VVHH VVHL VVLH VVLL VφH VHL
VφRG VRGLH – VRGLL VRGH VφSUB
14.55 –0.05
–0.2 –8.0
6.8
4.75
–0.05
4.5
VDD
+0.4
21.5
15.0 0 0
–7.5
7.5
5.0 0
5.0
VDD
+0.6
22.5
15.45
0.05
0.05 –7.0
8.05
0.1
1.0
2.3
1.0
1.0
5.25
0.05
5.5
0.8
VDD
+0.8
23.5
V V V V V V V V V V V V
V V
V V
1 2 2 2 2 2 2 2 2 2 3 3
4
4 4
5
VVH = VVH02
VVL = (VVL1 + VVL3)/2
High-level coupling High-level coupling Low-level coupling Low-level coupling
Input through 0.01µF capacitance
Low-level coupling
Horizontal transfer clock voltage
Reset gate clock voltage
Substrate clock voltage
Vertical transfer clock voltage
Symbol Min. Typ. Max. Unit
Waveform
diagram
Remarks
Clock Voltage Conditions
∗1
VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used.
∗2
Set SUBCIR pin to open when applying a DC bias to the substrate clock pin.
Page 4
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ICX084AK
Clock Equivalent Circuit Constant
Item
Capacitance between vertical transfer clock and GND
CφV1 CφV2 CφV3 CφV12 CφV23 CφV31
CφH1, CφH2
CφHH
CφRG
CφSUB R1, R2
R3 RGND RφH1, RφH2 RφRG
560
470 1500 1500 1500 1000
43
39
5
570
20 56 43 10 39
pF pF pF pF pF pF
pF
pF
pF
pF
Ω Ω Ω Ω Ω
Capacitance between vertical transfer clocks
Capacitance between horizontal transfer clock and GND
Vertical transfer clock series resistor
Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor
Symbol Min. Typ. Max. Unit
Remarks
Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit
RφRG
RGφ
Cφ
RG
Reset gate clock equivalent circuit
RφH1 RφH2
Hφ2
CφH1 CφH2
CφHH
Vφ1
CφV12
Vφ2
Vφ3
CφV2
RGND
R3
R1
R2
CφV1
Cφv31
Cφv23
Hφ1
CφV3
Capacitance between horizontal transfer clocks
Capacitance between reset gate clock and GND
Capacitance between substrate clock and GND
Page 5
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ICX084AK
Drive Clock Waveform Conditions
(1) Readout clock waveform
(2) Vertical transfer clock waveform
II II
100%
90%
10%
0%
VVT
tr twh tf
φM
0V
φM
2
Vφ1
Vφ3
Vφ2
VVH1
VVHH VVH
VVHL
VVLH
VVL1
VVL01
VVL
VVLL
VVH3
VVHH
VVH
VVHL
VVLH
VVL03
VVL
VVLL
VφV1 = VVH1 – VVL01 VφV2 = VVH02 – VVL2 VφV3 = VVH3 – VVL03
VVH = VVH02 VVL = (VVL01 + VVL03)/2 VVL3 = VVL03
VVLH
VVL2
VVLL
VVL
VVH
VVHH
VVH02
VVH2
VVHL
VT
Note) Readout clock is used by composing vertical transfer clocks Vφ2 and Vφ3.
Page 6
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ICX084AK
(3) Horizontal transfer clock waveform
tr twh tf
90%
10%
twl
Vφ
H
VHL
Hφ1, Hφ2
(4) Reset gate clock waveform
Point A
twl
Vφ
RG
VRGH
VRGL + 0.5V V
RGL
VRGLH
RG waveform
VRGLL
Hφ1 waveform
twhtr tf
φ
RG
2.5V
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VφRG = VRGH – VRGL
(5) Substrate clock waveform
90%
100%
10%
0%
V
SUB
tr twh tf
φM
φM
2
φSUB
VφSUB
(A bias generated within the CCD)
Page 7
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ICX084AK
Readout clock Vertical transfer
clock
During imaging
During parallel­serial conversion
Reset gate clock
Substrate clock
VT Vφ1,
Vφ2, Vφ3 Hφ1 Hφ2 Hφ1 Hφ2
φRG
φSUB
2.3
24
26.5
11
1.5
2.5
30
31.5
13
1.8
25 25
31.5 30
62.5
0.5
10 10
0.01
0.01 3
17.5 15
0.5
15
0.5
10 10
0.01
0.01 3
350
17.5 15
0.5
µs
ns
ns
µs
ns
µs
During readout
∗1
∗2
During drain charge
Horizontal transfer clock
Item Symbol
twh twl tr tf
Min. Typ.
Max.
Min. Typ.
Max.
Min. Typ.
Max.
Min. Typ.
Max.
Unit Remarks
Horizontal transfer clock Hφ1, Hφ2 21.5 25.5
ns
∗3
Item
Symbol
two
Min. Typ.
Max.
Unit
Remarks
∗1
When vertical transfer clock driver CXD1267AN is used.
∗2
tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be at least 2.5V.
∗3
The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
Clock Switching Characteristics
Page 8
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ICX084AK
Image Sensor Characteristics (Ta = 25°C)
Item
G sensitivity Sensitivity
comparison Saturation signal
Smear
Video signal shading
Uniformity between video signal channels
Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag
Sg Rr Rb Vsat Sm
SHg
∆Srg ∆Sbg
Vdt ∆Vdt Lcg Lcr Lcb Lag
300
0.3
0.4
500
450
0.45
0.55
0.005
0.6
0.7
0.015 20 25
8 8 4 1
3.8
3.8
3.8
0.5
mV
mV
% % % %
% mV mV
%
%
%
%
1 1 1 2 3 4 4 5 5 6 7 8 8 8 9
Ta = 60°C
Zone 0 and I
Zone 0 to II'
Ta = 60°C Ta = 60°C
Symbol Min. Typ. Max. Unit
Measurement method
Remarks
Zone Definition of Video Signal Shading
10
12
494 (V)
1212
659 (H)
V
10
H
8
H 8
V
10
Effective pixel region
Zone 0, I
Zone II, II'
Ignored region
R B
Measurement System
CCD
C.D.S
S/H
AMP
CCD signal output [∗A]
Gr/Gb channel signal output [∗B]
Gr/Gb
S/H
R/B
R/B channel signal output [∗C]
Note) Adjust the amplifier gain so that the gain between [∗A] and [∗B], and between [∗A] and [∗C] equals 1.
Page 9
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ICX084AK
Image Sensor Characteristics Measurement Method
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions.
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system.
Color coding and readout of this image sensor
The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively.
All pixels signals are output successively in a 1/30s period. The R signal and Gr signal lines and the Gb signal and B signal lines are output successively.
Horizontal register
Gb
R
Gb
R
B
Gr
B
Gr
Gb
R
Gb
R
B
Gr
B
Gr
Color Coding Diagram
Page 10
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ICX084AK
Definition of standard imaging conditions
1) Standard imaging condition I : Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source ) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity.
2) Standard imaging condition II : Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
1. G sensitivity, sensitivity comparison Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screens, and substitute the values into the following formula.
VG = (VGr + VGb)/2 Sg = VG × [mV] Rr = VR/VG Rb = VB/VG
2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs.
3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra and Ba), and then adjust the luminous intensity to 500 times the intensity with average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]), independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula.
Sm = VSm ÷ × × × 100 [%] (1/10V method conversion value)
4. Video signal shading Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula.
SHg = (Grmax – Grmin)/150 × 100 [%]
100
30
1
500
Gra + Gba + Ra + Ba
4
1
10
Page 11
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ICX084AK
5. Uniformity between video signal channels After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of the R signal and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of the B signal, and substitute the values into the following formula.
∆Srg = (Rmax – Rmin)/150 × 100 [%] ∆Sbg = (Bmax – Bmin)/150 × 100 [%]
6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula.
∆Vdt = Vdmax – Vdmin [mV]
8. Line crawl Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G, and B filters and measure the difference between G signal lines (∆Glr, ∆Glg, ∆Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula.
Lci = × 100 [%] (i = r, g, b)
9. Lag Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula.
Lag = (Vlag/150) × 100 [%]
Vlag (Lag)Gr signal output 150mV
Light
VD
V2
Strobe light
timing
Output
∆Gli
Gai
Page 12
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ICX084AK
Drive Circuit
CCD OUT
Hφ
1
Hφ
2
CXD1267AN
0.01
100
3.9k
–7.5V
1M
2SK523
ICX084
( BOTTOM VIEW )
Hφ
2
Hφ
1
RG
V
L
φSUB
GND
SUBCIR
V
DD
Vφ
3
Vφ
2
Vφ
1
NC
GND
C
GG
GND
V
OUT
22/16V
3.3/16V
3.3/20V
0.01
15V
XV1
XV2
XSG
XV3
RG
XSUB
22/20V
1/20V
100k
0.1
1/35V
100k
2200p
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
1000p
Page 13
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ICX084AK
Wave Length [nm]
Relative Response
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
400 500 600 700
R
G
B
Spectral Sensitivity Characteristics
(Includes lens characteristics, excludes light source characteristics)
Sensor Readout Clock Timing Chart
HD
V1
V2
V3
42.4µs (520 bits)
2.53µs (31 bits)
2.04µs (25 bits)
XV1 XV2 XV3
XSG
Sensor readout clock XSG is used by composing XV2 and XV3.
Page 14
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ICX084AK
Drive Timing Chart (Vertical Sync)
HD
V1
V2
V3
CCD
OUT
508
1
5 6 7 8 1 21 2 3 4 3 4
14
15
510
VD
525
525
1
1 2 3
7
7
494
Page 15
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ICX084AK
Drive Timing Chart (Horizontal Sync)
V1
V2
V3
RG
SHP
SHD
CLK
HD/SYNC
BLK
78
132
SUB
H1
H2
1
36
1
36
1 12
1
36
1 24
1 24
1
36
1 12
1
37
1
780
11
35
35
1
107
72
1
12316
125
1
1
23
1 12
Page 16
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ICX084AK
Notes on Handling
1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized
air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for
electrostatic protection. Do not reuse the tape.
4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more
than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the
package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive.
Compressive strength
50N
Cover glass
Plastic package
50N
1.2Nm
Torsional strength
Page 17
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ICX084AK
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated
voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution.
d) The notch of the package is used for directional index, and that can not be used for reference of fixing.
In addition, the cover glass and seal resin may overlap with the notch of the package.
e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be
generated by the fragments of resin.
f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-
acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference)
5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high
luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD
characteristics.
Page 18
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ICX084AK
Package Outline Unit: mm
PACKAGE STRUCTURE
0.3
16pin DIP (450mil)
H
V
2.5
2.5
8.4
0.5
1.2
5.7
6.1
10.3
12.2 ± 0.1
9.5
11.4 ± 0.1
11.43
0.25
0° to 9°
8
1
16
9
2-R0.5
2.5
11.6
9.2
2.5
1.2
3.35 ± 0.15
3.1
1.27
3.5 ± 0.3
0.46
0.3
1.27
0.69
(For the first pin only)
1. “A” is the center of the effective image area.
2. The two points “B” of the package are the horizontal reference.
The point “B'” of the package is the vertical reference.
3. The bottom “C” of the package, and the top of the cover glass “D”
are the height reference.
4. The center of the effective image area relative to “B” and “B'”
is (H, V) = (6.1, 5.7) ± 0.15mm.
5. The rotation angle of the effective image area relative to H and V is ± 1°.
6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm.
The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm.
7. The tilt of the effective image area relative to the bottom “C” is less than 50µm.
The tilt of the effective image area relative to the top “D” of the cover glass is less than 50µm.
8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5.
9. The notches on the bottom of the package are used only for directional index, they must
not be used for reference of fixing.
C
B
A
D
M
B'
~
~
~
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE WEIGHT
Plastic
GOLD PLATING
42 ALLOY
0.9g
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