Datasheet ICS9159M-06 Datasheet (ICST)

Integrated

ICS9159-06

Circuit
Systems, Inc.

Preliminary Product Preview

Frequency Generator and Buffer for Pentium Systems

General Description

The ICS9159-06 is a low cost frequency generator designed
specifically for Pentium systems. The integrated buffer minimizes
skew and provides the early CPU clock required by some
chipsets such as the OPTi VIPER. A 14.318 MHz XTA L oscillator
provides the reference clock to generate standard Pentium
frequencies. The CPU clock makes gradual frequency transitions
without violating the PLL timing of internal microprocessor
clock multipliers.

Asynchronous 33.3 MHz PCI bus operation is supported,
in-dependent of the CPU operating frequency. Green PC
systems are supported through power-down, doze, and
glitch-free stop clock modes.

Block Diagram

Features

 Four CPU clocks operate up to 66 MHz at 3.3V with

glitch-free start and stop plus smooth transitions

 3-6ns early CPU clock supports OPTi VIPER systems

 Selection of 8 frequencies, tristate, or power-down

 Six BUS clocks support asynchronous PCI bus

operation

 ±250ps skew between synchronous outputs

 Integrated buffer outputs drive up to 30pF loads

 3.1V -5.5V supply range

 28-pin 300-mil SOIC package

Applications

 Ideal for green Pentium and 486 PCI systems

Functionality

3.1 to 5.5V, 0-70° Crystal=14.318 MHz input

CPU(0:1)

STP0# STP1# DOZE# FS(0:1)

1 X 1 00 66.6* 66.6* 33.3 14.318
1 X 1 01 60* 60* 33.3 14.318
1 X 1 10 50 50 33.3 14.318
1 X 1 11 40 40 33.3 14.318
1 X 0 00 33.3 33.3 16.7 14.318
1 X 0 01 30 30 16.7 14.318
1 X 0 10 25 25 16.7 14.318
1 X 0 11 22.5 22.5 16.7 14.318
0 1 1 - - Stop Run Run 14.318
0 0 1 X X Stop Stop Stop 14.318
0 0* 0* X X Low L ow Low 14.318
0 1 0 X X Tristate Tristate Tristate 14.318

(MHz)

CPU2,
ECPU

BUS(0:5)

(MHz)

REF(0:3)

(MHz)

9159-06 Rev C 091897

* 3.3 volt operation only. ** 000 mode powers-down the
PLL sections and forces the outputs low. To ensure glitch­free start and stop of the CPU and BUS clocks enter 000
from 001 and exit 000 through 001.

COMPAQ is a trademark of Compaq Computers.
Pentium is a trademark of Intel Corporation.

PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.

ICS9159-06

Preliminary Product Preview

Pin Configuration

28-Pin 300-mil SOIC

Pin Descriptions

PIN NUMBER PIN NAME TYPE DESCRIPTION

8, 26 VDD PWR Power for l ogic, CPU and fixed f requency output bu ffers.

1X1 IN
2 X2 OUT XTAL output which includes XTAL load capacitance.**

3, 11, 23 GND PWR Ground fo r logic, CPU and fixed frequency output buffers.

6, 7, 9 CPU(0:2) OUT

4, 5 FS(0:1) IN

20 VDDB PWR Power for BUS output bu ffers.

15, 16, 18 19,

21, 22

24, 25, 27, 28 REF(0:3) OUT

10 ECPU OUT

12 DOZE# IN

13, 14 STP 0#, STP1# IN

17 GNDB PWR

BUS(0:5) OUT Bu s clock outputs are f ixed at 33.3 or 16.7 MHz.*

XTAL or external reference frequ ency input. This input incl udes XTAL load
capacitance and fe edback bias for a 0. 5 - 20 MHz XTAL.**

Processor clock outp uts which are a multiple o f the input reference frequenc y as
shown in the table.
Frequency multiplie r select pins. See table. These inputs have internal pull-up
devices.

REF is a buffered copy of the crystal oscillator or reference input clock,
nominally 14.31818 MHz.*
Early processor clock output which is the same frequency as CPU(0:2). This clock
leads CPU(0:2) by 3-6nS.
Reduces CPU, ECPU and BUS clock outputs as shown in the functionality table
when at a logic low level.
Synchronously sto ps the CPU, ECPU and BUS cl ocks per the descript ion in the
functionality table. Can also be used to tristate all outputs when the DOZE pin is
low.
This ground return path is brought on separately to permit separating the noise
impulses from high output buffers from affecting sensitive internal circuitry.***

* Assuming 14.31818 MHz input clock or crystal.
** Device provides 18pF load for crystal load capacitance at each pin.
*** Ground for bus clock buffers.

2

ICS9159-06

Preliminary Product Preview

Absolute Maximum Ratings

Supply Voltage .......................................................................................................... 7.0 V

Logic Inputs ....................................................................... GND 0.5 V to VDD +0.5 V

Ambient Operating Temperature ............................................................. 0°C to +70°C

Storage Temperature ........................................................................... 65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only and functional operation of the device at these or any other conditions above those listed
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.

Electrical Characteristics at 3.3V

VDD = 3.0  3.7 V, TA = 0  70° C unless otherwise stated

DC Characteristics

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Input Low Voltage V
Input High Voltage V
Input Low Current I

Input High Current I
Output Low Current
Output High Current
Output Low Current
Output High Current

1

1

1

1

Output Low Voltage V
Output High Voltage

1

Output Low Voltage V
Output High Voltage

1

Supply Current I
Supply Current, Power-down I
Supply Current, Stop M ode I

IL - - 0.2VDD V

IH 0.7VDD --V
IL VIN=0V -28.0 -10.5 - µA
IH VIN=VDD -5.0 - 5.0 µA

IOL VOL=0.8V; for CPU & BUS 30.0 47.0 - mA
IOH VOL=2.0V; for CPU & BUS - -66.0 -4 2.0 mA
IOL V OL=0.8V; for REF 25.0 38.0 - mA
I

OH

OL IOL=15mA; for CPU & BUS - 0.30 .4 V

VOL=2.0V; for REF - -47.0 -3 0.0 mA

VOH IOH=-30mA; for CPU & BUS 2.4 2.8 - V

OL IOL=12.5mA; for REF - 0.30 .4 V

VOH IOH=-20mA; for REF 2.4 2.8 - V

DD @66.66 MHz; all outputs unl oaded - 55 110 mA

DD (PD) @000 Mode (Power-d own) - 8 20 mA

DD (STOP) @001 Mode (Stop Mode) - 35 70 mA

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

3

ICS9159-06

Preliminary Product Preview

Electrical Characteristics at 3.3V

VDD = 3.1  3.7 V, TA = 0  70°C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Rise Time
Fall Time
Rise Time
Fall Time
Duty Cycle

Jitter, One Sigma

Jitter, Absolute

Jitter, One Sigma

Jitter, Absolute

Input Freque ncy

1

1

1

1

1

1

1

1

1

1

Crystal Oscillator Capacitance
Power-on Time

Frequency Settling Time

Clock Skew Window
Clock Skew Window

Clock Skew Window

1

1

1

1

1

1

Tr1 20 pF load, 0.8 to 2. 0V, C PU & BUS - 0.9 1.5 ns
Tf1 20 pF load, 2.0 to 0.8V, CPU & BUS - 0.8 1.4 ns
Tr2 20 pF load, 20% to 80%, CPU & BUS - 1 .5 2.5 ns
Tf2 20 pF load, 80% to 20%, C PU & BUS - 1. 4 2.4 ns

Dt 20pF load; @VOUT=1.4V 40 50 60 %

CPU; ECPU

Tj1s

Load=20pF;
FOUT >25 MHz
CPU; ECPU

Tjab

Load=20pF,
FOUT >25 MHz

Tj1s

BUS(0:2); RE F(0:3); CPU ≥25 MHz;
Load=20pF; Comp. to the period
BUS(0:2); REF( 0:3); CPU ≥ 25 MHz;

Tjab

Load=20pF;
Comp. to the period

Fi

0.5 14.318 20 MH z Logic Input
Capacitance 1 CIN Logic i nput pins

CINX X1, X2 pins - 18 - pF

ton

ts

Tsk1
Tsk2

Tsk3

From VDD=1.6V to 1 st crossing of

66.6 MHz V
From 1 st crossing of acquisition to
<1% settling
CPU to CPU;
Load=20pF; @1 .4V
BUS to BUS and REF to REF;
Load=20pF; @1 .4V
ECPU to CPU(0:2);
Load=20pF; @1 .4V

AC Characteristics

DD supply ramp < 40ms

-60150ps

-350 - 350 ps

-0.72.0%

-3.0 - 3.0 %

-5-pF

-2.54.5ms

-2.04.0ms

-150250ps

-300500ps

3.0 5.0 6.0 ns

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

4

Electrical Characteristics at 5.5V

VDD = 4.5  5.5 V, TA = 0  70° C

PARAMETER SYMBOL TEST CONDITIONS MI N TYP MAX U NITS

ICS9159-06

Preliminary Product Preview

DC Charac teri st ics

Input Low Voltage V
Input Hi gh Voltage V
Input Low Current I

Input Hi gh Current I
Output Low Current
Output High Current
Output Low Current
Output High Current

1

1

1

1

Output Low Voltage V
Output High Voltage

1

Output Low Voltage V
Output High Voltage

1

Supply Current I
Supply Current, Power-down I
Supply Curr ent, Stop Mode I

DD(PD) @000 Mode (Power- down) - 16. 0 40.0 mA

DD(STOP) @001 Mode (Stop Mode) - 70 .0 140 .0 mA

IL --0.2VDD V

IH 0.7VDD --V
IL VIN = 0V -40.0 16.0 - µA
IH VIN = VDD -5.0 - 5.0 µ A

IOL VOL = 0.8V; for CPU & BUS 40.0 62.0 - mA
IOH VOL = 2.0V; for CPU & BUS - -140.0 -90.0 mA
IOL VOL = 0.8V; for REF 30.0 50.0 - mA
IOH VOL = 2.0V; for REF - -100.0 -60.0 mA

OL IOL = 20mA; for CPU & BUS - 0.3 0.4 V

VOH IOH = -70mA; for CPU & BUS 2.4 2.8 - V

OL IOL = 15mA; for REF - 0.30 .4 V

VOH IOH=-50mA; for REF 2.4 2.8 - V

DD @50. 0 MHz; all out puts unl oaded - 95.0 200.0 mA

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

5

ICS9159-06

Preliminary Product Preview

Electrical Characteristics at 5.5V

VDD = 4.5  5.5 V, TA = 0  70° C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Rise Time
Fall Time
Rise Time
Fall Time
Duty Cycl e
Duty Cycl e
Jitter, One Sigma

Jitter, Absolute

Jitter, One Sigma

Jitter, Absolute

Input Frequency
Logic Input Capacitance

1

1

1

1

1

1

1

1

1

1

1

1

Crystal Oscillator Capacitance
Power-on Time

Frequency Settling Time

Clock Skew Window

Clock Skew Window

Clock Skew Window

1

1

1

1

1

1

Tr1 20pF load, 0.8 to 2.0V, CPU & BUS - 0.55 0.95 ns
Tf1 20pF load, 2.0 to 0.8V, CPU & BUS - 0.52 0.90 ns
Tr2 20pF load, 20% to 80%, CPU & BUS - 1 .2 2.1 ns
Tf2 20pF load, 80% to 20%, CPU & BUS - 1 .1 2.0 ns
Dt1 20pF load; @VOUT=1.4V 50 56 70 %
Dt2 20pF load; @VOUT =50% 40 50 60 %
Tj1s

Tjab

CPU; ECPU
Load=20pF; FOUT > 25 MHz
CPU; ECPU
Load=20pF, FOUT > 25 MHz
BUS(0:2); REF(0:3);

Tj1s

CPU

≥25 MHz; Load=20pF; Comp. to

the period
BUS(0:2); REF(0:3);

Tjab

CPU

≥25 MHz; Load=20pF;

Comp. to the period

Fi 0.5 14.318 20 MHz

CIN Logi c input pins - 5 - pF

CINX X1, X2 pins - 8 - pF

ton

ts

Tsk1

Tsk2

Tsk3

From VDD=1.6V to 1st cross ing of

50.0 MHz V
From 1 st crossing of acquisition to
< 1% settling
CPU to CPU;
Load=20pF; @1.4V
BUS to BUS and REF t o REF;
Load=20pF; @1.4V
ECPU to CPU(0:2);
Load=20pF; @1.4V

AC Characteristics

supply ramp < 40ms

DD

- 60 150 ps

-350 - 350 ps

-0.72.0%

-3.0 - 3.0 %

-2.54.5ms

-2.04.0ms

- 150 250 ps

- 300 500 ps

3.0 5.0 6.0 ns

Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.

6

ICS9159-06

Preliminary Product Preview

Ordering Information

ICS9159M-06

Example:

ICS XXXX M-PPP

LEAD COUNT 28L

DIMENSIONL 0.704

SOIC Package

Pattern Number(2 or 3 digit number for parts with ROM code patterns)

Package Type

M=SOIC, SOP

Device Type (consists of 3 or 4 digit numbers)

Prefix

ICS=Standard Device

PRODUCT PREVIEW documents contain information on new

7

products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.