The ICS9120-46 is a high performance frequency generator
designed to support the clock requirements of communication
and audio interfaces. It offers the clock frequencies required
by 28.8 baud modem plus sound system. These frequencies
are synthesized from 14.7456 MHz reference oscillator whose
buffered output is available for the reference.
High accuracy, low-jitter PLLs meet the -96dB signal-tonoise ratios required by 16-bit audio systems. Fast output
clock edge rates minimize board induced jitter.
The on-chip XT AL oscillator accuracy is better than ±100ppm
for an AT cut, 18pF load crystal with initial accuracy of ppm
plus TC, aging and load variation of ±20ppm each assuming
33pF ±5% external load capacitors.
Block Diagram
Features
•Generates 49.92 MHz, 40.32 MHz and 14.7456 MHz
•Single 14.7456 MHz crystal reference
•49.92 MHz accuracy tracks 40.32 MHz reference
•80ps one sigma jitter maintains 16-bit performance
•Output rise/fall times less than 1.5ns
•On-chip loop filter components
•3.0-5.5V supply range
•8-pin, 150-mil SOIC package
Applications
•Specifically designed to support the high performance
requirements of communication and audio interfaces.
9120-46 Rev B 052497P
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
Page 2
ICS9120-46
Pin Configuration
8-Pin SOIC
Functionality
The ICS9120-46 incorporates a crystal oscillator circuit designed
to provide 50% duty cycle over a range of operating conditions,
including the addition of external crystal load capacitors to pins
X1 and X2.
For the crystal oscillator, the crystal load capacitance must be
connected externally by adding a capacitor from each of the X1
and X2 pins to ground. A parallel resonant 14.7456 MHz crystal is
recommended.
Duty cycle is also maintained when using an external clock source
(connected to X1, X2 left unconnected) as long as the external
clock has good duty cycle.
Functionality
Pin Descriptions for ICS9120-46
PIN
NUMBER
1 X1 Input
2 VDD Power+Power supply input.
3 GND Power Ground return for Pin 2.
Cr ystal or ex tern al clo ck s our ce. H as fe edba ck b ias f or cr ystal.
Nominally 14.7456<N>MH z input applied. (No internal load cap;
m ust co nnect externa l load cap to groun d for crysta l oscilla tor.)
Crystal output drive (leave this pin unconnected when using an
external clock). (No internal load cap; must connect external load cap
to g round for cr ystal os cillator).
X1 (MHz)
PD#
CLK1
(MHz)
CLK2
(MHz)
REF
(MHa)
-0LowLowLow
14.7456149.9240.3214.7456
2
Page 3
ICS9120-46
Absolute Maximum Ratings
A VDD , VDD referenced to GND .......................................................................... 7V
Operating temperature under bias .................................................... 0oC to +70oC
Storage temperature..................................................................... -65oC to +150oC
Voltage on I/O pins referenced to GND ...................... GND -0.5V to VDD +0. 5V
Power dissipation...................................................................................... 0.5 Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect product reliability.
Electrical Characteristics at 5 V
VDD = +4.5 to +5.5 V , TA = 0 to 70oC unless otherwise stated
DC Characteristics
PARAMETE R SYMBOLTEST COND ITIONS MIN TYP MAX UNI TS
0 to 40.3 MHz-5.512.0ms
X1 (Pin 1),X2 (Pin 8)-5-pF
- - 0.8V
2.0 - - V
--5.0µA
45.050.0 55.0 %
40.045.0 60.0 %
-70.090.0ps
300.0270300.0ps
11.014.017.0MHz
11.0-58.0MHz
*Parameter is guaranteed by design and characterization. Not 100% tested in production.
3
Page 4
ICS9120-46
Electrical Characteristics at 3.3 V
VDD = +3.0 to +3.7 V , TA = 0OC-70oC unless otherwise stated
DC Characteristics
PARAMETE R SY MBOLTES T COND ITIONS MIN TYP M AX U NITS
Input Low VoltageV
Input High VoltageV
Input Low Current I
Input High CurrentI
Output Low VoltageV
Output High VoltageV
Output Low CurrentI
Output High CurrentI
Supply CurrentI
Supply Current Power-
down
I
DDPD
IH
OL
OH
OL
OH
DD
IL
IH
IL
VIN=0V-8.0-3.6 -µ A
VIN=VDD--5.0µA
IOL=6.0mA-0.0 5V
IOH=4.0mA0.85VDD0.94V
VOL=0. 2V
VOH=0.7V
DD
DD
Unloaded-20.040.0mA
Unloaded; Pin 5=0V-200.0400.0µ A
Pull-up Resistor Va lueRpu-620.0900.0k ohm
AC Characteristics
Rise TimeT
Fall TimeT
Rise TimeT
Fall TimeT
Duty CycleD
Duty CycleD
Jitter, One SigmaT
Jitter AbsoluteT
Jitter, One SigmaT
Jitter, AbsoluteT
Input Frequency RangeF
Output Frequency RangeF
Power-up TimeT
Crystal Input CapacitanceC
*Parameter is guaranteed by design and characterization. Not 100% tested in production.
r
*15pF load 2.0 to 0.8V-1.22.5ns
f
r
f
t
t
j1s
jab
j1s
jab
i
o
pu
inx
15pF load 0.8 to 2.0V-2.23.5ns
15pF load 20% to 80%-2.34.0ns
15pF load 80% to 20%-1.23.0ns
15pF load @ 50% of
VDD; Except REFCLK
15pF load @ 50% of
VDD; REFCLK only
For all frequencies
except REFCLK
For all frequencies
except REFCLK
REFCLK only-380.0500.0ps
REFCLK only-1.00.81.0ns
0 to 40.3 MHz-5.512.0ms
X1 (Pin 1), X2 (Pin 8)-5-pF
- - 0.2V
0.7V
DD
- - V
DD
DD
DD
1.1V
-V
15.024.0-mA
--13.0-8.0mA
45.050.0 55.0 %
40.045.0 60.0 %
-80.0100.0ps
-350.0±300.0350.0ps
11.014.74515.0MHz
14.0-51.0MHz
V
4
Page 5
ICS9120-46
Ordering Information
ICS9120M-46
Example:
ICS XXXX M-PPP
8 Pin SOIC Package
Pattern Number(2 or 3 digit number for parts with ROM code patterns)
Package Type
M=SOIC
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS=Standard Device
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the latest
5
version of all device data to verify that any information being relied upon by the
customer is current and accurate.
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