
PRELIMINARY
PRELIMINARY
INFORMATION
INFORMATION
Description Features
ICS650-05
HDTV Clock Synthesizer
The ICS650-05 is a low cost, low jitter, high
performance clock synthesizer designed to
produce 74.175824 MHz and 74.250000 MHz as
necessary for HDTV applications. Using our
patented analog Phase-Locked Loop (PLL)
techniques, the device uses a 27.0 MHz clock or
fundamental crystal input to produce buffered,
fixed clocks and a selectable frame rate clock for
HDTV systems.
Block Diagram
Clock
Synthesis
FRS
and
Control
Circuit
• Packaged in 20 pin tiny SSOP (QSOP)
• Input Frequency of 27.0 MHz
• Zero ppm synthesis error in output clocks
• Provides fixed 13.5 MHz, dual 27.0 MHz, and
54.0 MHz output clocks with a selectable Frame
Rate Clock of 74.175824 MHz or
74.250000 MHz
• Ideal for HDTV applications
• 3.3 V or 5.0 V operating voltage
Output
Buffer
Output
Buffer
Output
Buffers
FRCLK
54.0 MHz
13.5 MHz
Input
27.0 MHz
MDS 650-05 A 1 Revision 081199 Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax
Buffer/Crystal
Oscillator
Output
Buffers
Output
Buffer
OE (all outputs)
27.0 MHz
27.0 MHz

Pin Assignment
PRELIMINARY
PRELIMINARY
INFORMATION
INFORMATION
HDTV Clock Synthesizer
ICS650-05
VDD
X2
X1/ICLK
VDD
VDD
GND
NC
27M
13.5M
GND
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
1110
VDD
OE
FRS
FRCLK
VDD
GND
GND
54M
27M
GND
FRCLK Output Select Table (in MHz)
FRS Pin 18 FRCLK Pin 17
0 74.175824
1 74.250000
20 pin SSOP (QSOP)
Pin Descriptions
Pin # Name Type Description
1 VDD P Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
2 X2 XO Crystal connection to a 27.0 MHz crystal or leave unconnected for clock input
3 X1/ICLK XI Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input.
4 VDD P Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
5 VDD P Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
6 GND P Connect to ground.
7 NC - No Connect. Do not connect anything to this pin.
8 27M O 27 MHz buffered oscillator clock output.
9 13.5M O 13.5 MHz clock output.
10 GND P Connect to ground.
11 GND P Connect to ground.
12 27M O 27 MHz buffered clock output.
13 54M O 54 MHz buffered clock output.
14 GND P Connect to ground.
15 GND P Connect to ground.
16 VDD P Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
17 FRCLK O Frame Rate Clock as shown on table.
18 FRS I Frame Rate Frequency Select input pin. Determines FRCLK output as shown on table.
19 OE I Output Enable. Tri-states all clocks when low.
20 VDD P Connect to +3.3 V or +5.0 V. Must be same as other VDDs.
Key: I = Input with internal pull-up; O = output; P = power supply connection; XI, XO = crystal
connections
MDS 650-05 A 2 Revision 081199 Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax

PRELIMINARY
ABSOLUTE MAXIMUM RATINGS (note 1)
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
PRELIMINARY
INFORMATION
INFORMATION
ICS650-05
HDTV Clock Synthesizer
Electrical Specifications
Parameter Conditions Minimum Typical Maximum Units
Supply voltage, VDD Referenced to GND 7 V
Inputs and Clock Outputs Referenced to GND -0.5 VDD+0.5 V
Ambient Operating Temperature 0 70
Soldering Temperature Max of 10 seconds 260
Storage temperature -65 150
Operating Voltage, VDD 3.0 5.5 V
Input High Voltage, VIH FRS, OE 2 V
Input Low Voltage, VIL FRS, OE 0.8 V
Output High Voltage, VOH VDD=3.3V, IOH=-8mA 2.4 V
Output Low Voltage, VOL VDD=3.3V, IOL=8mA 0.4 V
Output High Voltage, VOH, VDD = 3.3 or 5V IOH=-8mA VDD-0.4 V
Operating Supply Current, IDD, at 5V No Load 26 mA
Operating Supply Current, IDD, at 3.3V No Load 14 mA
Short Circuit Current, VDD = 3.3 V Each output ±50 mA
Input Capacitance Except X1 7 pF
°C
°C
°C
Input Crystal or Clock Frequency 27 MHz
Output Clocks Accuracy (synthesis error) All clocks 1 ppm
Output Clock Rise Time 0.8 to 2.0V 1.5 ns
Output Clock Fall Time 2.0 to 0.8V 1.5 ns
Output Clock Duty Cycle At VDD/2 40 50 60 %
One Sigma Jitter, ACLK VDD= 3.3 V 100 ps
VDD= 5.0 V 40 ps
Absolute Clock Period Jitter VDD= 3.3 V ±300 ps
VDD= 5.0 V ±200 ps
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD and GND on pins 4 and 6, and 16 and 14, and a 33 Ω
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
MDS 650-05 A 3 Revision 081199 Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax

PRELIMINARY
PRELIMINARY
Package Outline and Package Dimensions
E H
h x 45°
D
INFORMATION
INFORMATION
HDTV Clock Synthesizer
20 pin SSOP
Symbol Min Max
ICS650-05
A 1.55 1.73
b 0.203 0.305
c 0.190 0.254
D 8.560 8.740
E 3.810 4.000
H 5.840 6.200
e
h 0.410
L 0.016 0.035
Q 0.127 0.250
Q
c
e
b
L
A
Ordering Information
Part/Order Number Marking Package Shipping Temperature
ICS650R-05 ICS650R-05 20 pin SSOP Tubes 0 to 70 °C
ICS650R-05T ICS650R-05 20 pin SSOP Tape and Reel 0 to 70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 650-05 A 4 Revision 081199 Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax